2. Cnnecst-Why the use of FPGA?
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Convolutional neural networks are well-suited for hardware acceleration through FPGAs. FPGAs allow reconfigurability to implement different CNN models and select the optimal one directly in hardware. This reconfigurability explores a large design space to find the model that achieves the best trade-off between performance and power consumption, quantified as GOPs/Watt.
2. Cnnecst-Why the use of FPGA?
- 1. 1 andrea.solazzo@mail.polimi.it CNN2ECST Andrea Solazzo Matteo De Silvestri Irene De Rose matteo.desilvestri@mail.polimi.it irene.derose@mail.polimi.it Thursday, March 17, 2016 XOHW16 Meeting
- 2. 2 HW acceleration Convolutional Neural Networks have a data-flow computation pattern that results to be highly suitable for hardware acceleration Zhang, Chen, et al. "Optimizing fpga-based accelerator design for deep convolutional neural networks." Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. ACM, 2015.
- 3. 3 Why FPGA? ● CNNs have a huge design space ● Finding the “optimal” model requires some tuning ● Many “degrees of freedom” (#layers, #neurons, …)
- 4. 3 Why FPGA? ✓ Reconfigurability allows to implement different models and select the best one directly in hardware ● CNNs have a huge design space ● Finding the “optimal” model requires some tuning ● Many “degrees of freedom” (#layers, #neurons, …)
- 5. 4 A. Dundar, J. Jin, V. Gokhale, B. Krishnamurthy, A. Canziani, B. Martini, and E. Culurciello. Accelerating Deep Neural Networks on Mobile Processor with Embedded Programmable Logic. In Proc. NIPS’13, 2013. Why FPGA?
- 6. 5 A. Dundar, J. Jin, V. Gokhale, B. Krishnamurthy, A. Canziani, B. Martini, and E. Culurciello. Accelerating Deep Neural Networks on Mobile Processor with Embedded Programmable Logic. In Proc. NIPS’13, 2013. The proper trade-off between performances and power consumption reflects on a high embeddable factor, calculated as performance over Watt (GOP/s /W) Why FPGA?