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CHAPTER 1
INTRODUCTION
An operational amplifier (op-amp) is a DC-coupled high-gain electronic voltage amplifier with a
differential input and, usually, a single-ended output.[1] In this configuration, an op-amp produces
an output potential (relative to circuit ground) that is typically hundreds of thousands of times
larger than the potential difference between its input terminals.[2]
Operational amplifiers had their origins in analog computers, where they were used to do
mathematical operations in many linear, non-linear and frequency-dependent circuits.
Characteristics of a circuit using an op-amp are set by external components with little
dependence on temperature changes or manufacturing variations in the op-amp itself, which
makes op-amps popular building blocks for circuit design.
Op-amps are among the most widely used electronic devices today, being used in a vast array of
consumer, industrial, and scientific devices. Many standard IC op-amps cost only a few cents in
moderate production volume; however some integrated or hybrid operational amplifiers with
special performance specifications may cost over $100 US in small quantities.[3] Op-amps may
be packaged as components, or used as elements of more complex integrated circuits.
The op-amp is one type of differential amplifier. Other types of differential amplifier include
the fully differential amplifier (similar to the op-amp, but with two outputs), the instrumentation
amplifier (usually built from three op-amps), the isolation amplifier (similar to the
instrumentation amplifier, but with tolerance to common-mode voltages that would destroy an
ordinary op-amp), and negative feedback amplifier (usually built from one or more op-amps and
a resistive feedback network).
1.1 OPERATION
An op-amp without negative feedback (a comparator)
The amplifier's differential inputs consist of a non-inverting input (+) with voltage V+ and an
inverting input (–) with voltage V−; ideally the op-amp amplifies only the difference in voltage
between the two, which is called the differential input voltage. The output voltage of the op-
amp Vout is given by the equation:
where AOL is the open-loop gain of the amplifier (the term "open-loop" refers to the absence of a
feedback loop from the output to the input).
1.2 OPEN LOOP AMPLIFIER
The magnitude of AOL is typically very large—100,000 or more for integrated circuit op-amps—
and therefore even a quite small difference between V+ and V− drives the amplifier output nearly
to the supply voltage. Situations in which the output voltage is equal to or greater than the supply
voltage are referred to as saturation of the amplifier. The magnitude of AOL is not well controlled
by the manufacturing process, and so it is impractical to use an operational amplifier as a stand-
alone differential amplifier.
Without negative feedback, and perhaps with positive feedback for regeneration, an op-amp acts
as a comparator. If the inverting input is held at ground (0 V) directly or by a resistor Rg, and the
input voltage Vin applied to the non-inverting input is positive, the output will be maximum
positive; if Vin is negative, the output will be maximum negative. Since there is no feedback
from the output to either input, this is an open loop circuit acting as a comparator.
1.3 CLOSED LOOP
An op-amp with negative feedback (a non-inverting amplifier)
If predictable operation is desired, negative feedback is used, by applying a portion of the output
voltage to the inverting input. The closed loop feedback greatly reduces the gain of the circuit.
When negative feedback is used, the circuit's overall gain and response becomes determined
mostly by the feedback network, rather than by the op-amp characteristics. If the feedback
network is made of components with values small relative to the op amp's input impedance, the
value of the op-amp's open loop response AOLdoes not seriously affect the circuit's performance.
The response of the op-amp circuit with its input, output, and feedback circuits to an input is
characterized mathematically by a transfer function; designing an op-amp circuit to have a
desired transfer function is in the realm of electrical engineering. The transfer functions are
important in most applications of op-amps, such as in analog computers. High inputimpedance at
the input terminals and low output impedance at the output terminal(s) are particularly useful
features of an op-amp.
In the non-inverting amplifier on the right, the presence of negative feedback via the voltage
divider Rf, Rgdetermines the closed-loop gain ACL = Vout / Vin. Equilibrium will be established
when Vout is just sufficient to "reach around and pull" the inverting input to the same voltage
as Vin. The voltage gain of the entire circuit is thus 1 + Rf/Rg. As a simple example, ifVin = 1 V
and Rf = Rg, Vout will be 2 V, exactly the amount required to keep V− at 1 V. Because of the
feedback provided by the Rf, Rg network, this is a closed loop circuit.
Another way to analyze this circuit proceeds by making the following (usually valid)
assumptions:[4]
 When an op-amp operates in linear (i.e., not saturated) mode, the difference in voltage
between the non-inverting (+) pin and the inverting (−) pin is negligibly small.
 The input impedance between (+) and (−) pins is much larger than other resistances in the
circuit.
The input signal Vin appears at both (+) and (−) pins, resulting in a current i through Rg equal
to Vin/Rg.
Since Kirchhoff's current law states that the same current must leave a node as enter it, and since
the impedance into the (−) pin is near infinity, we can assume practically all of the same
current i flows through Rf, creating an output voltage
By combining terms, we determine the closed-loop gain ACL:
1.4 OPAMP CHARACTERSTICS
Ideal op-amps
An equivalent circuit of an operational amplifier that models some resistive non-ideal
parameters.
An ideal op-amp is usually considered to have the following properties:
 Infinite open-loop gain G = vout / 'vin
 Infinite input impedance Rin, and so zero input current
 Zero input offset voltage
 Infinite voltage range available at the output
 Infinite bandwidth with zero phase shift and infinite slew rate
 Zero output impedance Rout
 Zero noise
 Infinite Common-mode rejection ratio (CMRR)
 Infinite Power supply rejection ratio.
These ideals can be summarized by the two "golden rules":
I. The output attempts to do whatever is necessary to make the voltage difference between the
inputs zero .
II. The inputs draw no current.
The first rule only applies in the usual case where the op-amp is used in a closed-loop design
(negative feedback, where there is a signal path of some sort feeding back from the output to the
inverting input). These rules are commonly used as a good first approximation for analyzing or
designing op-amp circuits.
None of these ideals can be perfectly realized. A real op-amp may be modeled with non-infinite
or non-zero parameters using equivalent resistors and capacitors in the op-amp model. The
designer can then include these effects into the overall performance of the final circuit. Some
parameters may turn out to have negligible effect on the final design while others represent
actual limitations of the final performance that must be evaluated.
Real op-amps
Real op-amps differ from the ideal model in various aspects.
DC imperfections
Real operational amplifiers suffer from several non-ideal effects:
Finite gain
Open-loop gain is infinite in the ideal operational amplifier but finite in real operational
amplifiers. Typical devices exhibit open-loop DC gain ranging from 100,000 to over 1 million.
So long as the loop gain (i.e., the product of open-loop and feedback gains) is very large, the
circuit gain will be determined entirely by the amount of negative feedback (i.e., it will be
independent of open-loop gain). In cases where closed-loop gainmust be very high, the feedback
gain will be very low, and the low feedback gain causes low loop gain; in these cases, the
operational amplifier will cease to behave ideally.
1.5 FINITE INPUT IMPEDENCE
The differential input impedance of the operational amplifier is defined as the
impedance between its two inputs; the common-mode input impedance is the impedance from
each input to ground. MOSFET-input operational amplifiers often have protection circuits that
effectively short circuit any input differences greater than a small threshold, so the input
impedance can appear to be very low in some tests. However, as long as these operational
amplifiers are used in a typical high-gain negative feedback application, these protection circuits
will be inactive. The input bias and leakage currents described below are a more important
design parameter for typical operational amplifier applications.
1.6 NON ZERO OUTPUT IMPDENCE
Low output impedance is important for low-impedance loads; for these loads, the voltage drop
across the output impedance effectively reduces the open loop gain. In configurations with a
voltage-sensing negative feedback, the output impedance of the amplifier is effectively lowered;
thus, in linear applications, op-amp circuits usually exhibit a very low output impedance indeed.
Low-impedance outputs typically require high quiescent (i.e., idle) current in the output stage
and will dissipate more power, so low-power designs may purposely sacrifice low output
impedance.
1.7 INPUT CURRENT
Due to biasing requirements or leakage, a small amount of current (typically ~10 nanoamperes
for bipolar op-amps, tens of picoamperes (pA) for JFET input stages, and only a few pA
for MOSFET input stages) flows into the inputs. When large resistors or sources with high
output impedances are used in the circuit, these small currents can produce large unmodeled
voltage drops. If the input currents are matched, andthe impedance looking out of both inputs are
matched, then the voltages produced at each input will be equal. Because the operational
amplifier operates on the difference between its inputs, these matched voltages will have no
effect. It is more common for the input currents to be slightly mismatched. The difference is
called input offset current, and even with matched resistances a small offset voltage (different
from the input offset voltage below) can be produced. This offset voltage can create offsets or
drifting in the operational amplifier.
1.8 INPUT OFFSET VOLTAGE
This voltage, which is what is required across the op-amp's input terminals to drive the output
voltage to zero,[6][nb 1] is related to the mismatches in input bias current. In the perfect amplifier,
there would be no input offset voltage. However, it exists in actual op-amps because of
imperfections in the differential amplifier that constitutes the input stage of the vast majority of
these devices. Input offset voltage creates two problems: First, due to the amplifier's high voltage
gain, it virtually assures that the amplifier output will go into saturation if it is operated without
negative feedback, even when the input terminals are wired together. Second, in a closed loop,
negative feedback configuration, the input offset voltage is amplified along with the signal and
this may pose a problem if high precision DC amplification is required or if the input signal is
very small.[nb 2]
1.9 COMMON MODE GAIN
A perfect operational amplifier amplifies only the voltage difference between its two inputs,
completely rejecting all voltages that are common to both. However, the differential input stage
of an operational amplifier is never perfect, leading to the amplification of these common
voltages to some degree. The standard measure of this defect is called the common-mode
rejection ratio (denoted CMRR). Minimization of common mode gain is usually important in
non-inverting amplifiers (described below) that operate at high amplification.
2.0 POWER REJECTION
The output of a perfect operational amplifier will be completely independent from ripples that
arrive on its power supply inputs. Every real operational amplifier has a specified power supply
rejection ratio (PSRR) that reflects how well the op-amp can reject changes in its supply voltage.
Copious use of bypass capacitors can improve the PSRR of many devices, including the
operational amplifier.
2.1 TEMPERATURE EFFECT
All parameters change with temperature. Temperature drift of the input offset voltage is
especially important.
2.2 DRIFT
Real op-amp parameters are subject to slow change over time and with changes in temperature,
input conditions, etc.
2.3 NOICE
Amplifiers generate random voltage at the output even when there is no signal applied. This can
be due to thermal noise and flicker noise of the devices. For applications with high gain or high
bandwidth, noise becomes a very important consideration.
2.4 AC IMPERFECTION
The op-amp gain calculated at DC does not apply at higher frequencies. Thus, for high-speed
operation, more sophisticated considerations must be used in an op-amp circuit design.
2.5 FINITE BANDWIDTH
All amplifiers have finite bandwidth. To a first approximation, the op-amp has the frequency
response of an integrator with gain. That is, the gain of a typical op-amp is inversely proportional
to frequency and is characterized by its gain–bandwidth product (GBWP). For example, an op-
amp with a GBWP of 1 MHz would have a gain of 5 at 200 kHz, and a gain of 1 at 1 MHz. This
dynamic response coupled with the very high DC gain of the op-amp gives it the characteristics
of a first-order low-pass filter with very high DC gain and low cutoff frequency given by the
GBWP divided by the DC gain.
The finite bandwidth of an op-amp can be the source of several problems, including:
Stability. Associated with the bandwidth limitation is a phase difference between the input signal
and the amplifier output that can lead tooscillation in some feedback circuits. For example, a
sinusoidal output signal meant to interfere destructively with an input signal of the same
frequency will interfere constructively if delayed by 180 degrees forming positive feedback. In
these cases, the feedback circuit can bestabilized by means of frequency compensation, which
increases the gain or phase margin of the open-loop circuit. The circuit designer can implement
this compensation externally with a separate circuit component. Alternatively, the compensation
can be implemented within the operational amplifier with the addition of a dominant pole that
sufficiently attenuates the high-frequency gain of the operational amplifier. The location of this
pole may be fixed internally by the manufacturer or configured by the circuit designer using
methods specific to the op-amp. In general, dominant-pole frequency compensation reduces the
bandwidth of the op-amp even further. When the desired closed-loop gain is high, op-amp
frequency compensation is often not needed because the requisite open-loop gain is sufficiently
low; consequently, applications with high closed-loop gain can make use of op-amps with higher
bandwidths.
Noise, Distortion, and Other Effects. Reduced bandwidth also results in lower amounts of
feedback at higher frequencies, producing higher distortion, noise, and output impedance and
also reduced output phase linearity as the frequency increases.
Typical low-cost, general-purpose op-amps exhibit a GBWP of a few megahertz. Specialty and
high-speed op-amps exist that can achieve a GBWP of hundreds of megahertz. For very high-
frequency circuits, a current-feedback operational amplifier is often used.
2.6 INPUT CAPACITANCE
Most important for high frequency operation because it further reduces the open-loop bandwidth
of the amplifier.
Non-linear imperfections
The input (yellow) and output (green) of a saturated op amp in an inverting amplifier
2.7 SATURATION
Output voltage is limited to a minimum and maximum value close to the power
supply voltages. The output of older op-amps can reach to within one or two volts of the supply
rails. The output of newer so-called "rail to rail" op-amps can reach to within millivolts of the
supply rails when providing low output currents.
2.8 SLEWING
The amplifier's output voltage reaches its maximum rate of change, the slew rate, usually
specified in volts per microsecond. When slewing occurs, further increases in the input signal
have no effect on the rate of change of the output. Slewing is usually caused by the input stage
saturating; the result is a constant current i driving a capacitance C in the amplifier (especially
those capacitances used to implement its frequency compensation); the slew rate is limited
by dv/dt=i/C.
Slewing is associated with the large-signal performance of an op-amp. Consider for, example an
op-amp configured for a gain of 10. Let the input be a 1 V, 100 kHz sawtooth wave. That is, the
amplitude is 1 V and the period is 10 microseconds. Accordingly, the rate of change (i.e., the
slope) of the input is 0.1 V per microsecond. After 10x amplification, the output should be a 10
V, 100 kHz sawtooth, with a corresponding slew rate of 1 V per microsecond. However, the
classic 741 op-amp has a 0.5 V per microsecond slew rate specification, so that its output can
rise to no more than 5 V in the sawtooth's 10 microsecond period. Thus, if one were to measure
the output, it would be a 5 V, 100 kHz sawtooth, rather than a 10 V, 100 kHz sawtooth.
Next consider the same amplifier and 100 kHz sawtooth, but now the input amplitude is 100 mV
rather than 1 V. After 10x amplification the output is a 1 V, 100 kHz sawtooth with a
corresponding slew rate of 0.1 V per microsecond. In this instance the 741 with its 0.5 V per
microsecond slew rate will amplify the input properly.
Modern high speed op-amps can have slew rates in excess of 5,000 V per microsecond.
However, it is more common for op-amps to have slew rates in the range 5-100 V per
microsecond. For example, the general purpose TL081 op-amp has a slew rate of 13 V per
microsecond. As a general rule, low power and small bandwidth op-amps have low slew rates.
As an example, the LT1494 micropower op-amp consumes 1.5 microamp but has a 2.7 kHz
gain-bandwidth product and a 0.001 V per microsecond slew rate.
2.9 NON –LINEAR INPUT OUTPUT RELATIONSHIP
The output voltage may not be accurately proportional to the difference between the input
voltages. It is commonly called distortion when the input signal is a waveform. This effect will
be very small in a practical circuit where substantial negative feedback is used.
3.0 PHASE REVERSAL
In some integrated op-amps, when the published common mode voltage is violated (e.g. by one
of the inputs being driven to one of the supply voltages), the output may slew to the opposite
polarity from what is expected in normal operation.Under such conditions, negative feedback
becomes positive, likely causing the circuit to "lock up" in that state.
3.1 POWER CONSIDERATION
3.2 LIMITED OUTPUT CURRENT
The output current must be finite. In practice, most op-amps are designed to limit the output
current so as not to exceed a specified level – around 25 mA for a type 741 IC op-amp – thus
protecting the op-amp and associated circuitry from damage. Modern designs are electronically
more rugged than earlier implementations and some can sustain direct short circuits on their
outputs without damage.
3.3 OUTPUT SINK CURRENT
The output sink current is the maximum current allowed to sink into the output stage. Some
manufacturers show the output voltage vs. the output sink current plot, which gives an idea of the
output voltage when it is sinking current from another source into the output pin.
3.4 LIMITED DESSIPIATION POWER
The output current flows through the op-amp's internal output impedance, dissipating heat. If the
op-amp dissipates too much power, then its temperature will increase above some safe limit. The
op-amp may enter thermal shutdown, or it may be destroyed.
Modern integrated FET or MOSFET op-amps approximate more closely the ideal op-amp than
bipolar ICs when it comes to input impedance and input bias currents. Bipolars are generally
better when it comes to input voltage offset, and often have lower noise. Generally, at room
temperature, with a fairly large signal, and limited bandwidth, FET and MOSFET op-amps now
offer better performance.
Internal circuitry of 741-type op-amp
A component-level diagram of the common 741 op-amp. Dotted lines outline:current
mirrors (red); differential amplifier (blue); class A gain stage (magenta); voltage level shifter
(green); output stage (cyan).
Sourced by many manufacturers, and in multiple similar products, an example of a bipolar
transistor operational amplifier is the 741 integrated circuit designed by Dave Fullagar
at Fairchild Semiconductor after Bob Widlar's LM301 integrated circuit design.[9] In this
discussion, we use the parameters of the Hybrid-pi model to characterize the small-signal,
grounded emitter characteristics of a transistor. In this model, the current gain of a transistor is
denoted hfe, more commonly called the β.[10]
3.5 ARCHITECTURE
A small-scale integrated circuit, the 741 op-amp shares with most op-amps an internal structure
consisting of three gain stages:
1:- Differential amplifier (outlined blue) — provides high differential amplification (gain), with
rejection of common-mode signal, low noise, high input impedance, and drives a
Voltage amplifier (outlined magenta) — provides high voltage gain, a single-pole frequency roll-
off, and in turn drives the
Output amplifier (outlined cyan and green) — provides high current gain (low output
impedance), along with output current limiting, and output short-circuit protection.
Additionally, it contains current mirror (outlined red) bias circuitry and a gain-stabilization
capacitor (30 pF).
3.6 DIFFERENTIAL AMPLIFIER
A cascaded differential amplifier followed by a current-mirror active load, the input stage
(outlined in blue) is a transconductance amplifier, turning a differential voltage signal at the
bases of Q1, Q2 into a current signal into the base of Q15.
It entails two cascaded transistor pairs, satisfying conflicting requirements. The first stage
consists of the matched NPN emitter follower pair Q1, Q2 that provide high input impedance.
The second is the matched PNP common-base pair Q3, Q4 that eliminates the undesirable Miller
effect; it drives an active load Q7 plus matched pair Q5, Q6.
That active load is implemented as a modified Wilson current mirror; its role is to convert the
(differential) input current signal to a single-ended signal without the attendant 50% losses
(increasing the op-amp's open-loop gain by 3dB).[nb 4] Thus, a small-signal differential current in
Q3 versus Q4 appears summed (doubled) at the base of Q15, the input of the voltage gain stage.
3.7 VOLTAGE AMPLIFIER
The (class-A) voltage gain stage (outlined in magenta) consists of the two NPN transistors
Q15/Q19 connected in a Darlington configuration and uses the output side of current mirror
Q12/Q13 as its collector (dynamic) load to achieve its high voltage gain. The output sink
transistor Q20 receives its base drive from the common collectors of Q15 and Q19; the level-
shifter Q16 provides base drive for the output source transistor Q14. .
The transistor Q22 prevents this stage from delivering excessive current to Q20 and thus limits
the output sink current.
3.8 OUTPUT AMPLIFIER
The output stage (Q14, Q20, outlined in cyan) is a Class AB push-pull emitter follower
amplifier. It provides an output drive with impedance of ≈50Ω, in essence, current gain.
Transistor Q16 (outlined in green) provides the quiescent current for the output transistors, and
Q17 provides output current limiting.
3.9 BIASING CIRCUIT
Provide appropriate quiescent current for each stage of the op-amp.
The resistor (39 kΩ) connecting the (diode-connected) Q11 and Q12, and the given supply
voltage (VS+−VS−), determine the current in the current mirrors, (matched pairs) Q10/Q11 and
Q12/Q13. The collector current of Q11, i11 * 39 kΩ = VS+ − VS− − 2 VBE. For the typical VS =
±20 V, the standing current in Q11/Q12 (as well as in Q13) would be ≈1 mA. A supply current
for a typical 741 of about 2 mA agrees with the notion that these two bias currents dominate the
quiescent supply current.
Transistors Q11 and Q10 form a Widlar current mirror, with quiescent current in Q10 i10 such
that ln( i11 / i10 ) = i10 * 5 kΩ / 28 mV, where 5 kΩ represents the emitter resistor of Q10, and
28 mV is VT, the thermal voltage at room temperature. In this case i10 ≈ 20 μA.
4.0 DIFFERENTIAL AMPLIFIER
The biasing circuit of this stage is set by a feedback loop that forces the collector currents of Q10
and Q9 to (nearly) match. The small difference in these currents provides the drive for the
common base of Q3/Q4 (note that the base drive for input transistors Q1/Q2 is the input bias
current and must be sourced externally). The summed quiescent currents of Q1/Q3 plus Q2/Q4 is
mirrored from Q8 into Q9, where it is summed with the collector current in Q10, the result being
applied to the bases of Q3/Q4.
The quiescent currents of Q1/Q3 (resp., Q2/Q4) i1 will thus be half of i10, of order ≈ 10 μA. Input
bias current for the base of Q1 (resp. Q2) will amount to i1 / β; typically ≈50 nA, implying a
current gain hfe ≈ 200 for Q1(Q2).
This feedback circuit tends to draw the common base node of Q3/Q4 to a voltage Vcom − 2 * VBE,
where Vcom is the input common-mode voltage. At the same time, the magnitude of the quiescent
current is relatively insensitive to the characteristics of the components Q1–Q4, such as hfe, that
would otherwise cause temperature dependence or part-to-part variations.
Transistor Q7 drives Q5 and Q6 into conduction until their (equal) collector currents match that
of Q1/Q3 and Q2/Q4. The quiescent current in Q7 isVBE / 50 kΩ, about 35μA, as is the quiescent
current in Q15, with its matching operating point. Thus, the quiescent currents are pairwise
matched in Q1/Q2, Q3/Q4, Q5/Q6, and Q7/Q15.
4.1 VOLTAGE AMPLIFIER
Quiescent currents in Q16 and Q19 are set by the current mirror Q12/Q13, which is running at ≈
1 mA. Through some (?) mechanism, the collector current in Q19 tracks that standing current.
4.2 OUTPUT AMPLIFIER
In the circuit involving Q16 (variously named rubber diode or VBE multiplier), the 4.5 kΩ
resistor must be conducting about 100 μA, with the Q16VBE roughly 700 mV. Then the VCB must
be about 0.45 V and VCE at about 1.0 V. Because the Q16 collector is driven by a current source
and the Q16 emitter drives into the Q19 collector current sink, the Q16 transistor establishes a
voltage difference between Q14 base and Q20 base of ≈ 1 V, regardless of the common-mode
voltage of Q14/Q20 base. The standing current in Q14/Q20 will be a factor exp(100 mV / VT ) ≈
36 smaller than the 1 mA quiescent current in the class A portion of the op amp. This (small)
standing current in the output transistors establishes the output stage in class AB operation and
reduces the crossover distortion of this stage.
4.3 SMALL SIGNAL DIFFERENTIAL MODE
A small differential input voltage signal gives rise, through multiple stages of current
amplification, to a much larger voltage signal on output.
4.4 INPUT IMPEDENCE
The input stage with Q1 and Q3 is similar to a emitter-coupled pair (long-tailed pair), with Q2
and Q4 adding some degenerating impedance. The input impedance is relatively high because of
the small current through Q1-Q4. A typical 741 op amp has an differential input impedance of
about 2 MΩ. The common mode input impedance is even higher, as the input stage works at an
essentially constant current.
4.5 Differential Amplifier
A differential voltage VIn at the op-amp inputs (pins 3 and 2, respectively) gives rise to a small
differential current in the bases of Q1 and Q2 iIn ≈ VIn/ ( 2 hie * hfe). This differential base current
causes a change in the differential collector current in each leg by iIn * hfe. Introducing the
transconductance of Q1, gm = hfe / hie, the (small-signal) current at the base of Q15 (the input of
the voltage gain stage) is VIn * gm / 2.
This portion of the op amp cleverly changes a differential signal at the op amp inputs to a single-
ended signal at the base of Q15, and in a way that avoids wastefully discarding the signal in
either leg. To see how, notice that a small negative change in voltage at the inverting input (Q2
base) drives it out of conduction, and this incremental decrease in current passes directly from
Q4 collector to its emitter, resulting in an decrease in base drive for Q15. On the other hand, a
small positive change in voltage at the non-inverting input (Q1 base) drives this transistor into
conduction, reflected in an increase in current at the collector of Q3. This current drives Q7
further into conduction, which turns on current mirror Q5/Q6. Thus, the increase in Q3 emitter
current is mirrored in an increase in Q6 collector current, resulting also in a decrease in base
drive for Q15. Besides avoiding wasting 3dB of gain here, this technique decreases common-
mode gain and feed through of power supply noise.
4.6 VOLTAGE AMPLIFIER
A current signal i at Q15's base gives rise to a current in Q19 of order i * β2 (the product of
the hfe of each of Q15 and Q19, which are connected in a Darlington pair). This current signal
develops a voltage at the bases of output transistors Q14/Q20 proportional to the hie of the
respective transistor.
4.7 OUTPUT AMPLIFIER
Output transistors Q14 and Q20 are each configured as an emitter follower, so no voltage gain
occurs there; instead, this stage provides current gain, equal to the hfe of Q14 (resp. Q20).
The output impedance is not zero, as it would be in an ideal op-amp, but with negative feedback
it approaches zero at low frequencies.
4.8 OVEROOL VOLTAGE GAIN LOOP
The net open-loop small-signal voltage gain of the op amp involves the product of the current
gain hfe of some 4 transistors. In practice, the voltage gain for a typical 741-style op amp is of
order 200,000, and the current gain, the ratio of input impedance (≈2−6 MΩ) to output
impedance (≈50Ω) provides yet more (power) gain.
Other linear characteristics
4.9 SMALL SIGNAL COMMON MODE GAIN
The ideal op amp has infinite common-mode rejection ratio, or zero common-mode gain.
In the present circuit, if the input voltages change in the same direction, the negative feedback
makes Q3/Q4 base voltage follow (with 2VBE below) the input voltage variations. Now the
output part (Q10) of Q10-Q11 current mirror keeps up the common current through Q9/Q8
constant in spite of varying voltage. Q3/Q4 collector currents, and accordingly the output current
at the base of Q15, remain unchanged.
In the typical 741 op amp, the common-mode rejection ratio is 90dB, implying an open-loop
common-mode voltage gain of about 6.
5.0 FREQUENCY COMPENSATION
The innovation of the Fairchild μA741 was the introduction of frequency compensation via an
on-chip (monolithic) capacitor, simplifying application of the op amp by eliminating the need for
external components for this function. The 30 pF capacitor stabilizes the amplifier via Miller
compensationand functions in a manner similar to an op-amp integrator circuit. Also known as
'dominant pole compensation' because it introduces a pole that masks (dominates) the effects of
other poles into the open loop frequency response; in a 741 op amp this pole can be as low as
10 Hz (where it causes a −3 dB loss of open loop voltage gain).
This internal compensation is provided to achieve unconditional stability of the amplifier in
negative feedback configurations where the feedback network is non-reactive and the closed
loop gain is unity or higher. By contrast, amplifiers requiring external compensation, such as the
μA748, may require external compensation or closed-loop gains significantly higher than unity.
5.1 INPUT OFFSET VOLTAGE
The "offset null" pins may be used to place external resistors (typically in the form of the two
ends of a potentiometer, with the slider connected toVS–) in parallel with the emitter resistors of
Q5 and Q6, to adjust the balance of the Q5/Q6 current mirror. The potentiometer is adjusted such
that the output is null (midrange) when the inputs are shorted together.
5.2 NON LINEAR CHARACTERSTICS
5.2.1 INPUT BREAKDOWN VOLTAGE
The transistors Q3, Q4 help to increase the reverse VBE rating: the base-emitter junctions of the
NPN transistors Q1 and Q2 break down at around 7V, but the PNP transistors Q3 and Q4
have VBE breakdown voltages around 50 V.
5.2.2 OUTPUT STAGE VOLTAGE SWINFG AND CURRENT LIMITING
Variations in the quiescent current with temperature, or between parts with the same type
number, are common, so crossover distortion andquiescent current may be subject to significant
variation.
The output range of the amplifier is about one volt less than the supply voltage, owing in part
to VBE of the output transistors Q14 and Q20.
The 25 Ω resistor at the Q14 emitter, along with Q17, acts to limit Q14 current to about 25 mA;
otherwise, Q17 conducts no current.
Current limiting for Q20 is performed in the voltage gain stage: Q22 senses the voltage across
Q19's emitter resistor (50Ω); as it turns on, it diminishes the drive current to Q15 base.
Later versions of this amplifier schematic may show a somewhat different method of output
current limiting.
6.1 APPLICABILITY CONSIDERATION
Note: while the 741 was historically used in audio and other sensitive equipment, such use is
now rare because of the improved noiseperformance of more modern op-amps. Apart from
generating noticeable hiss, 741s and other older op-amps may have poor common-mode
rejection ratios and so will often introduce cable-borne mains hum and other common-mode
interference, such as switch 'clicks', into sensitive equipment.
The "741" has come to often mean a generic op-amp IC (such as μA741, LM301, 558, LM324,
TBA221 — or a more modern replacement such as the TL071). The description of the 741
output stage is qualitatively similar for many other designs (that may have quite different input
stages), except:
Some devices (μA748, LM301, LM308) are not internally compensated (require an external
capacitor from output to some point within the operational amplifier, if used in low closed-loop
gain applications).
Some modern devices have "rail-to-rail output" capability, meaning that the output can range
from within a few millivolts of the positive supply voltage to within a few millivolts of the
negative supply voltage
6.2 CLASSIFICATION :-
Op-amps may be classified by their construction:
discrete (built from individual transistors or tubes/valves)
IC (fabricated in an Integrated circuit) — most common
Hybrid IC op-amps may be classified in many ways, including:
Military, Industrial, or Commercial grade (for example: the LM301 is the commercial grade
version of the LM101, the LM201 is the industrial version). This may define operating
temperature ranges and other environmental or quality factors.
Classification by package type may also affect environmental hardiness, as well as
manufacturing options; DIP, and other through-hole packages are tending to be replaced
by surface-mount devices.
Classification by internal compensation: op-amps may suffer from high frequency instability in
some negative feedback circuits unless a small compensation capacitor modifies the phase and
frequency responses. Op-amps with a built-in capacitor are termed "compensated", or perhaps
compensated for closed-loop gains down to (say) 5. All others are considered uncompensated.
Single, dual and quad versions of many commercial op-amp IC are available, meaning 1, 2 or 4
operational amplifiers are included in the same package.
Rail-to-rail input (and/or output) op-amps can work with input (and/or output) signals very close
to the power supply rails.
CMOS op-amps (such as the CA3140E) provide extremely high input resistances, higher
than JFET-input op-amps, which are normally higher than bipolar-input op-amps.
other varieties of op-amp include programmable op-amps (simply meaning the quiescent current,
gain, bandwidth and so on can be adjusted slightly by an external resistor).
manufacturers often tabulate their op-amps according to purpose, such as low-noise pre-
amplifiers, wide bandwidth amplifiers, and so on.
6.3 APPLICATIONS :-
DIP pinout for 741-type operational amplifier
Main article: Operational amplifier applications
6.4 USE IN ELECTRONICS SYTEM DESIGN
The use of op-amps as circuit blocks is much easier and clearer than specifying all their
individual circuit elements (transistors, resistors, etc.), whether the amplifiers used are integrated
or discrete circuits. In the first approximation op-amps can be used as if they were ideal
differential gain blocks; at a later stage limits can be placed on the acceptable range of
parameters for each op-amp.
Circuit design follows the same lines for all electronic circuits. A specification is drawn up
governing what the circuit is required to do, with allowable limits. For example, the gain may be
required to be 100 times, with a tolerance of 5% but drift of less than 1% in a specified
temperature range; the input impedance not less than one megohm; etc.
A basic circuit is designed, often with the help of circuit modeling (on a computer). Specific
commercially available op-amps and other components are then chosen that meet the design
criteria within the specified tolerances at acceptable cost. If not all criteria can be met, the
specification may need to be modified.
A prototype is then built and tested; changes to meet or improve the specification, alter
functionality, or reduce the cost, may be made.
6.5 APPLICATIONS WITHOUT USING ANY FEEDBACK
That is, the op-amp is being used as a voltage comparator. Note that a device designed primarily
as a comparator may be better if, for instance, speed is important or a wide range of input
voltages may be found, since such devices can quickly recover from full on or full off
("saturated") states.
A voltage level detector can be obtained if a reference voltage Vref is applied to one of the op-
amp's inputs. This means that the op-amp is set up as a comparator to detect a positive voltage. If
the voltage to be sensed, Ei, is applied to op amp's (+) input, the result is a noninverting positive-
level detector: when Ei is above Vref, VO equals +Vsat; when Ei is below Vref, VO equals −Vsat.
If Ei is applied to the inverting input, the circuit is an inverting positive-level detector:
When Ei is above Vref, VO equals −Vsat.
A zero voltage level detector (Ei = 0) can convert, for example, the output of a sine-wave from a
function generator into a variable-frequency square wave. If Ei is a sine wave, triangular wave,
or wave of any other shape that is symmetrical around zero, the zero-crossing detector's output
will be square. Zero-crossing detection may also be useful in triggering TRIACs at the best time
to reduce mains interference and current spikes.
6.6 POSIITVE FEEDBACK APPLICATION
Another typical configuration of op-amps is with positive feedback, which takes a fraction of the
output signal back to the non-inverting input. An important application of it is the comparator
with hysteresis, the Schmitt trigger. Some circuits may use Positive feedback
and Negative feedback around the same amplifier, for example Triangle
wave oscillators and active filters.
Because of the wide slew-range and lack of positive feedback, the response of all the open-loop
level detectors described above will be relatively slow. External overall positive feedback may
be applied but (unlike internal positive feedback that may be applied within the latter stages of a
purpose-designed comparator) this markedly affects the accuracy of the zero-crossing detection
point. Using a general-purpose op-amp, for example, the frequency of Ei for the sine to square
wave converter should probably be below 100 Hz.
Negative feedback applications
Non-inverting amplifier
An op-amp connected in the non-inverting amplifier configuration
In a non-inverting amplifier, the output voltage changes in the same direction as the input
voltage.
The gain equation for the op-amp is:
If is very large, this simplifies to
.
The non-inverting input of the operational amplifier needs a path for DC to ground; if the signal
source does not supply a DC path, or if that source requires a given load impedance, then the
circuit will require another resistor from the non-inverting input to ground. When the operational
amplifier's input bias currents are significant, then the DC source resistances driving the inputs
should be balanced. The ideal value for the feedback resistors (to give minimum offset voltage)
will be such that the two resistances in parallel roughly equal the resistance to ground at the non-
inverting input pin. That ideal value assumes the bias currents are well-matched, which may not
be true for all op-amps.
CHAPTER 2
LITERTURE REVIEW
PAPER 1 :- “COMPARATIVE STUDY ON CMOS BASED OPERATIONAL
AMPLIFIER” .
This paper describes about the various parameters like Gain, Phase margin and slew rate of
CMOS based two stage single ended operational amplifierunder 0.35um, 0.18um and 100nm
CMOS technology. Designing of high gain CMOS operational amplifier with decreasing length
CMOS is a challenge for designer. All the work has been carried out on Tanner EDA V14.1
software. Circuit designing has been done on S-edit and simulation has been carried out using T-
spice. Waveform has been obtained on W-edit. The simulation result for different CMOS Op
Amp have been compared and analyzed.
Op-amp is a high gain differential amplifier. By high we mean a value that is adequate for the
application. The gain could be anywhere from 101 to 106. Op-amps are usually used to realize a
feedback system. An amplifier has an input port and an output port. In a linear amplifier .
The circuit symbol for an op-amp is shown to the right, where:
V+ : non-inverting input
V− : inverting input
V out: output
VS + : positive power supply
VS − : negative power supply
Equivalent circuit of op-amp
Example of an ideal operational amplifier is shown in figure 1.2. The main part in an amplifier is
the dependent voltage source that increases in relation to the voltage drop across Rin, thus
amplifying the voltage difference between V+ and V− . Many uses have been found for
operational amplifiers and an ideal op-amp seeks to characterize the physical phenomena that
make op-amps useful. Supply voltages Vcc + and Vcc − are used internally to implement the
dependent voltage sources. The positive source Vs + acts as an upper bound on the output, and
the negative source Vs − acts as a lower bound on the output. The internal Vs + and Vs −
connections are not shown here and will vary by implementation of the operational amplifier.The
two-stage op-amp topology follows the classical differential input, single-ended output
framework, with included Miller compensation capacitor and zeronulling resistor. The
parameters will be compared via tables to the actual specifications achieved.
BLOCK DIAGRAM OF TWO STAGE SINGLE ENDED OPERATIONAL AMPLIFIER
Report
CHAPTER 3
PROPOSED WORK
We are working on operational amplifier for results about the various parameters like area , delay
, power consumption for CMOS based two stage single ended operational amplifier under 100nm
CMOS technology. Designing of high gain CMOS operational amplifier with decreasing length
CMOS is a challenge for designer. All the work has been carried out on Tanner EDA V14.1
software. Circuit designing has been done on S-edit and simulation has been carried out using T-
spice. Waveform has been obtained on W-edit. The simulation result for different CMOS Op
Amp have been compared and analyzed .
CHAPTER 3
CONCLUSION
The amplifier presented in this paper operates in saturation mode and regulates its bias current.
When a signal is applied the current in the amplifier increases so that these amplifiers have very
high driving current. The op-amp has low power as well as low voltage. Its slew rate is higher
than reported. Low power low voltage amplifier is designed at 1μm technology whose gain is
80dB and phase margin assuming a feedback factor of 0.5 is obtained 60 degrees. The unity gain
bandwidth is obtained 400MHz. The maximum differential output swing was between 2.5V to -
2.5V.
REFERENCES
[1] G. Palmisano and G. Palumbo, “A compensation strategy for two-stage CMOS OPAMPs
based on current buffer,”. IEEE trans. Circuits sys.I, Fundam. Theory Appl., vol. 44, no. 3 , pp.
257-262, mar1997.
[2] J. Mahattanakul, “Design procedure for two stage CMOS operational amplifier employing
current buffer”, IEEE trans. Circuits sys. II, Express Briefs, vol 52, no.11 nov 2005.
[3] G. Palmisano, G. Palumbo and S. Pennisi “Design Procedure for Two-Stage CMOS
Transconductance Operational Amplifiers: A Tutorial”; Analog Integrated Circuits and Signal
Processing, 27, 179–189, 2001.
[4] B. Razavi, Design of Analog CMOS Integrated Circuits. McGraw-Hill, 2002.
[5] P.E. Allen and D.R. Holberg, CMOS Analog Circuit Design. Oxford University Press, 2002.
[6] B. Ahuja, “An improved frequency compensation technique for CMOS operational
amplifiers,” IEEE J. Solid-State Circuits, Vol. SC-18, pp. 629-633, Dec, 1983.
[7] D.A Johns and K. Martin, Analog Integrated Circuit Design. New York Willey, 1997.
[8] Kang Sung-Mo, Leblebici Yusuf, “CMOS Digital Integrated Circuits, Analysis and design”,
Tata McGraw-Hill Edition 2003, Third Edition
[9] G. Palmisano and G. Palumbo “A Compensation Strategy for Two-Stage CMOS opamps
Based on Current Buffer”; IEEE Transactions on circuits and systems—I: Fundamental theory
and applications, Vol. 44, No. 3, March. 1997.
[10] R. Jacob Baker, Harry W.Li, David E. Boyce: CMOS circuit design, layout and simulation;
IEEE press series on microelectronic systems.
[11] R. Castello, “CMOS buffer amplifier,” in Analog Circuit Design, J.Huijsing, R. van der
Plassche, and W. Sansen, Eds. Boston, MA: Kluwer Academic, 1993, pp. 113–138.
[12] Gregorian R., and Temes, G.C. “Analog MOS Integrated Circuits for Signal Processing”,
John Wiley and Sons, 1986.
[13] Huijsing J., Hogervorst R. and de Langen K., “Low-power low-voltage VLSI operational
amplifier cells”. IEEE Transactions on circuits and systems-II, 42, pp.841-852, nov-1995
[14] G. Palmisano and G. Palumbo “A very efficient CMOS low voltage output stage” , IEEE
Electronic Letters 31(21). pp 1830-1831, 1995
[15] G. Palmisano and G. Palumbo and R. Salerno “CMOS output stages for low voltage power
supply” IEEE Trans. On CAS part-II 47(2), pp 96-104, feb 2000
[16] Yavari, M. and Shoaei, O. (2004) “Low-Voltage Low-Power Fast-Settling CMOS
Operational Transconductance Amplifiers for Switched Capacitor Applications”. IEEE
Proceedings - Circuits Devices Systems p. 151.
[17] Johns, D. A. and Martin, K. (1997) Analog Integrated Circuit Design John Wiley & Sons ,
New York, USA
[18] Mahattanakul, J. and Chutichatuporn, J. (2005) ” Design Procedure for Two-Stage CMOS
OPAMP with Flexible Noise-Power Balancing Scheme”. IEEE Transaction on Circuits and
Systems-I: Regular Paper 52, pp. 1508-1514.
[19] Pugliese, A. , Cappuccino, G. and Cocorullo, G. (2008) ” Design Procedure for Settling
Time Minimization in Three-Stage Nested Miller Amplifiers”. IEEE Transaction on Circuits and
Systems-II 55, pp. 1-5.
[20] Turchetti, C. and Masetti, G. (1983) “A Macromodel for Integrated All-MOS Operational
Amplifiers”. IEEE Journal of Solid-State Circuits SC-18 , pp. 389-394.
[21] Yang, H. C. and Allstot, D. J. (1990) “Considerations for Fast Settling Operational
Amplifiers”. IEEE Transactions on Circuits and Systems 37, pp. 326-334.
[22] Yavari, M., Maghari, N. and Shoaei, O. (2005) “An Accurate Analysis of Slew Rate for
Twostage CMOS Opamps”. IEEE Transactions on Circuits and Systems - II: Express Briefs 52,
pp. 164-167.
[23] C. Makris and C. Toumazou, “Current-mode active compensation techniques, ”Electron.
Letters, vol. 26, no. 21, pp. 1792–1794, Oct. 11, 1990.

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  • 1. CHAPTER 1 INTRODUCTION An operational amplifier (op-amp) is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output.[1] In this configuration, an op-amp produces an output potential (relative to circuit ground) that is typically hundreds of thousands of times larger than the potential difference between its input terminals.[2] Operational amplifiers had their origins in analog computers, where they were used to do mathematical operations in many linear, non-linear and frequency-dependent circuits. Characteristics of a circuit using an op-amp are set by external components with little dependence on temperature changes or manufacturing variations in the op-amp itself, which makes op-amps popular building blocks for circuit design. Op-amps are among the most widely used electronic devices today, being used in a vast array of consumer, industrial, and scientific devices. Many standard IC op-amps cost only a few cents in moderate production volume; however some integrated or hybrid operational amplifiers with special performance specifications may cost over $100 US in small quantities.[3] Op-amps may be packaged as components, or used as elements of more complex integrated circuits. The op-amp is one type of differential amplifier. Other types of differential amplifier include the fully differential amplifier (similar to the op-amp, but with two outputs), the instrumentation amplifier (usually built from three op-amps), the isolation amplifier (similar to the instrumentation amplifier, but with tolerance to common-mode voltages that would destroy an ordinary op-amp), and negative feedback amplifier (usually built from one or more op-amps and a resistive feedback network). 1.1 OPERATION An op-amp without negative feedback (a comparator) The amplifier's differential inputs consist of a non-inverting input (+) with voltage V+ and an inverting input (–) with voltage V−; ideally the op-amp amplifies only the difference in voltage
  • 2. between the two, which is called the differential input voltage. The output voltage of the op- amp Vout is given by the equation: where AOL is the open-loop gain of the amplifier (the term "open-loop" refers to the absence of a feedback loop from the output to the input). 1.2 OPEN LOOP AMPLIFIER The magnitude of AOL is typically very large—100,000 or more for integrated circuit op-amps— and therefore even a quite small difference between V+ and V− drives the amplifier output nearly to the supply voltage. Situations in which the output voltage is equal to or greater than the supply voltage are referred to as saturation of the amplifier. The magnitude of AOL is not well controlled by the manufacturing process, and so it is impractical to use an operational amplifier as a stand- alone differential amplifier. Without negative feedback, and perhaps with positive feedback for regeneration, an op-amp acts as a comparator. If the inverting input is held at ground (0 V) directly or by a resistor Rg, and the input voltage Vin applied to the non-inverting input is positive, the output will be maximum positive; if Vin is negative, the output will be maximum negative. Since there is no feedback from the output to either input, this is an open loop circuit acting as a comparator. 1.3 CLOSED LOOP An op-amp with negative feedback (a non-inverting amplifier) If predictable operation is desired, negative feedback is used, by applying a portion of the output voltage to the inverting input. The closed loop feedback greatly reduces the gain of the circuit. When negative feedback is used, the circuit's overall gain and response becomes determined mostly by the feedback network, rather than by the op-amp characteristics. If the feedback network is made of components with values small relative to the op amp's input impedance, the value of the op-amp's open loop response AOLdoes not seriously affect the circuit's performance.
  • 3. The response of the op-amp circuit with its input, output, and feedback circuits to an input is characterized mathematically by a transfer function; designing an op-amp circuit to have a desired transfer function is in the realm of electrical engineering. The transfer functions are important in most applications of op-amps, such as in analog computers. High inputimpedance at the input terminals and low output impedance at the output terminal(s) are particularly useful features of an op-amp. In the non-inverting amplifier on the right, the presence of negative feedback via the voltage divider Rf, Rgdetermines the closed-loop gain ACL = Vout / Vin. Equilibrium will be established when Vout is just sufficient to "reach around and pull" the inverting input to the same voltage as Vin. The voltage gain of the entire circuit is thus 1 + Rf/Rg. As a simple example, ifVin = 1 V and Rf = Rg, Vout will be 2 V, exactly the amount required to keep V− at 1 V. Because of the feedback provided by the Rf, Rg network, this is a closed loop circuit. Another way to analyze this circuit proceeds by making the following (usually valid) assumptions:[4]  When an op-amp operates in linear (i.e., not saturated) mode, the difference in voltage between the non-inverting (+) pin and the inverting (−) pin is negligibly small.  The input impedance between (+) and (−) pins is much larger than other resistances in the circuit. The input signal Vin appears at both (+) and (−) pins, resulting in a current i through Rg equal to Vin/Rg. Since Kirchhoff's current law states that the same current must leave a node as enter it, and since the impedance into the (−) pin is near infinity, we can assume practically all of the same current i flows through Rf, creating an output voltage By combining terms, we determine the closed-loop gain ACL:
  • 4. 1.4 OPAMP CHARACTERSTICS Ideal op-amps An equivalent circuit of an operational amplifier that models some resistive non-ideal parameters. An ideal op-amp is usually considered to have the following properties:  Infinite open-loop gain G = vout / 'vin  Infinite input impedance Rin, and so zero input current  Zero input offset voltage  Infinite voltage range available at the output  Infinite bandwidth with zero phase shift and infinite slew rate  Zero output impedance Rout  Zero noise  Infinite Common-mode rejection ratio (CMRR)  Infinite Power supply rejection ratio. These ideals can be summarized by the two "golden rules": I. The output attempts to do whatever is necessary to make the voltage difference between the inputs zero . II. The inputs draw no current. The first rule only applies in the usual case where the op-amp is used in a closed-loop design (negative feedback, where there is a signal path of some sort feeding back from the output to the inverting input). These rules are commonly used as a good first approximation for analyzing or designing op-amp circuits. None of these ideals can be perfectly realized. A real op-amp may be modeled with non-infinite or non-zero parameters using equivalent resistors and capacitors in the op-amp model. The designer can then include these effects into the overall performance of the final circuit. Some
  • 5. parameters may turn out to have negligible effect on the final design while others represent actual limitations of the final performance that must be evaluated. Real op-amps Real op-amps differ from the ideal model in various aspects. DC imperfections Real operational amplifiers suffer from several non-ideal effects: Finite gain Open-loop gain is infinite in the ideal operational amplifier but finite in real operational amplifiers. Typical devices exhibit open-loop DC gain ranging from 100,000 to over 1 million. So long as the loop gain (i.e., the product of open-loop and feedback gains) is very large, the circuit gain will be determined entirely by the amount of negative feedback (i.e., it will be independent of open-loop gain). In cases where closed-loop gainmust be very high, the feedback gain will be very low, and the low feedback gain causes low loop gain; in these cases, the operational amplifier will cease to behave ideally. 1.5 FINITE INPUT IMPEDENCE The differential input impedance of the operational amplifier is defined as the impedance between its two inputs; the common-mode input impedance is the impedance from each input to ground. MOSFET-input operational amplifiers often have protection circuits that effectively short circuit any input differences greater than a small threshold, so the input impedance can appear to be very low in some tests. However, as long as these operational amplifiers are used in a typical high-gain negative feedback application, these protection circuits will be inactive. The input bias and leakage currents described below are a more important design parameter for typical operational amplifier applications. 1.6 NON ZERO OUTPUT IMPDENCE Low output impedance is important for low-impedance loads; for these loads, the voltage drop across the output impedance effectively reduces the open loop gain. In configurations with a voltage-sensing negative feedback, the output impedance of the amplifier is effectively lowered; thus, in linear applications, op-amp circuits usually exhibit a very low output impedance indeed. Low-impedance outputs typically require high quiescent (i.e., idle) current in the output stage and will dissipate more power, so low-power designs may purposely sacrifice low output impedance. 1.7 INPUT CURRENT Due to biasing requirements or leakage, a small amount of current (typically ~10 nanoamperes for bipolar op-amps, tens of picoamperes (pA) for JFET input stages, and only a few pA
  • 6. for MOSFET input stages) flows into the inputs. When large resistors or sources with high output impedances are used in the circuit, these small currents can produce large unmodeled voltage drops. If the input currents are matched, andthe impedance looking out of both inputs are matched, then the voltages produced at each input will be equal. Because the operational amplifier operates on the difference between its inputs, these matched voltages will have no effect. It is more common for the input currents to be slightly mismatched. The difference is called input offset current, and even with matched resistances a small offset voltage (different from the input offset voltage below) can be produced. This offset voltage can create offsets or drifting in the operational amplifier. 1.8 INPUT OFFSET VOLTAGE This voltage, which is what is required across the op-amp's input terminals to drive the output voltage to zero,[6][nb 1] is related to the mismatches in input bias current. In the perfect amplifier, there would be no input offset voltage. However, it exists in actual op-amps because of imperfections in the differential amplifier that constitutes the input stage of the vast majority of these devices. Input offset voltage creates two problems: First, due to the amplifier's high voltage gain, it virtually assures that the amplifier output will go into saturation if it is operated without negative feedback, even when the input terminals are wired together. Second, in a closed loop, negative feedback configuration, the input offset voltage is amplified along with the signal and this may pose a problem if high precision DC amplification is required or if the input signal is very small.[nb 2] 1.9 COMMON MODE GAIN A perfect operational amplifier amplifies only the voltage difference between its two inputs, completely rejecting all voltages that are common to both. However, the differential input stage of an operational amplifier is never perfect, leading to the amplification of these common voltages to some degree. The standard measure of this defect is called the common-mode rejection ratio (denoted CMRR). Minimization of common mode gain is usually important in non-inverting amplifiers (described below) that operate at high amplification. 2.0 POWER REJECTION The output of a perfect operational amplifier will be completely independent from ripples that arrive on its power supply inputs. Every real operational amplifier has a specified power supply rejection ratio (PSRR) that reflects how well the op-amp can reject changes in its supply voltage. Copious use of bypass capacitors can improve the PSRR of many devices, including the operational amplifier. 2.1 TEMPERATURE EFFECT All parameters change with temperature. Temperature drift of the input offset voltage is especially important.
  • 7. 2.2 DRIFT Real op-amp parameters are subject to slow change over time and with changes in temperature, input conditions, etc. 2.3 NOICE Amplifiers generate random voltage at the output even when there is no signal applied. This can be due to thermal noise and flicker noise of the devices. For applications with high gain or high bandwidth, noise becomes a very important consideration. 2.4 AC IMPERFECTION The op-amp gain calculated at DC does not apply at higher frequencies. Thus, for high-speed operation, more sophisticated considerations must be used in an op-amp circuit design. 2.5 FINITE BANDWIDTH All amplifiers have finite bandwidth. To a first approximation, the op-amp has the frequency response of an integrator with gain. That is, the gain of a typical op-amp is inversely proportional to frequency and is characterized by its gain–bandwidth product (GBWP). For example, an op- amp with a GBWP of 1 MHz would have a gain of 5 at 200 kHz, and a gain of 1 at 1 MHz. This dynamic response coupled with the very high DC gain of the op-amp gives it the characteristics of a first-order low-pass filter with very high DC gain and low cutoff frequency given by the GBWP divided by the DC gain. The finite bandwidth of an op-amp can be the source of several problems, including: Stability. Associated with the bandwidth limitation is a phase difference between the input signal and the amplifier output that can lead tooscillation in some feedback circuits. For example, a sinusoidal output signal meant to interfere destructively with an input signal of the same frequency will interfere constructively if delayed by 180 degrees forming positive feedback. In these cases, the feedback circuit can bestabilized by means of frequency compensation, which increases the gain or phase margin of the open-loop circuit. The circuit designer can implement this compensation externally with a separate circuit component. Alternatively, the compensation can be implemented within the operational amplifier with the addition of a dominant pole that sufficiently attenuates the high-frequency gain of the operational amplifier. The location of this pole may be fixed internally by the manufacturer or configured by the circuit designer using methods specific to the op-amp. In general, dominant-pole frequency compensation reduces the bandwidth of the op-amp even further. When the desired closed-loop gain is high, op-amp frequency compensation is often not needed because the requisite open-loop gain is sufficiently low; consequently, applications with high closed-loop gain can make use of op-amps with higher bandwidths.
  • 8. Noise, Distortion, and Other Effects. Reduced bandwidth also results in lower amounts of feedback at higher frequencies, producing higher distortion, noise, and output impedance and also reduced output phase linearity as the frequency increases. Typical low-cost, general-purpose op-amps exhibit a GBWP of a few megahertz. Specialty and high-speed op-amps exist that can achieve a GBWP of hundreds of megahertz. For very high- frequency circuits, a current-feedback operational amplifier is often used. 2.6 INPUT CAPACITANCE Most important for high frequency operation because it further reduces the open-loop bandwidth of the amplifier. Non-linear imperfections The input (yellow) and output (green) of a saturated op amp in an inverting amplifier 2.7 SATURATION Output voltage is limited to a minimum and maximum value close to the power supply voltages. The output of older op-amps can reach to within one or two volts of the supply rails. The output of newer so-called "rail to rail" op-amps can reach to within millivolts of the supply rails when providing low output currents. 2.8 SLEWING The amplifier's output voltage reaches its maximum rate of change, the slew rate, usually specified in volts per microsecond. When slewing occurs, further increases in the input signal have no effect on the rate of change of the output. Slewing is usually caused by the input stage saturating; the result is a constant current i driving a capacitance C in the amplifier (especially those capacitances used to implement its frequency compensation); the slew rate is limited by dv/dt=i/C.
  • 9. Slewing is associated with the large-signal performance of an op-amp. Consider for, example an op-amp configured for a gain of 10. Let the input be a 1 V, 100 kHz sawtooth wave. That is, the amplitude is 1 V and the period is 10 microseconds. Accordingly, the rate of change (i.e., the slope) of the input is 0.1 V per microsecond. After 10x amplification, the output should be a 10 V, 100 kHz sawtooth, with a corresponding slew rate of 1 V per microsecond. However, the classic 741 op-amp has a 0.5 V per microsecond slew rate specification, so that its output can rise to no more than 5 V in the sawtooth's 10 microsecond period. Thus, if one were to measure the output, it would be a 5 V, 100 kHz sawtooth, rather than a 10 V, 100 kHz sawtooth. Next consider the same amplifier and 100 kHz sawtooth, but now the input amplitude is 100 mV rather than 1 V. After 10x amplification the output is a 1 V, 100 kHz sawtooth with a corresponding slew rate of 0.1 V per microsecond. In this instance the 741 with its 0.5 V per microsecond slew rate will amplify the input properly. Modern high speed op-amps can have slew rates in excess of 5,000 V per microsecond. However, it is more common for op-amps to have slew rates in the range 5-100 V per microsecond. For example, the general purpose TL081 op-amp has a slew rate of 13 V per microsecond. As a general rule, low power and small bandwidth op-amps have low slew rates. As an example, the LT1494 micropower op-amp consumes 1.5 microamp but has a 2.7 kHz gain-bandwidth product and a 0.001 V per microsecond slew rate. 2.9 NON –LINEAR INPUT OUTPUT RELATIONSHIP The output voltage may not be accurately proportional to the difference between the input voltages. It is commonly called distortion when the input signal is a waveform. This effect will be very small in a practical circuit where substantial negative feedback is used. 3.0 PHASE REVERSAL In some integrated op-amps, when the published common mode voltage is violated (e.g. by one of the inputs being driven to one of the supply voltages), the output may slew to the opposite polarity from what is expected in normal operation.Under such conditions, negative feedback becomes positive, likely causing the circuit to "lock up" in that state. 3.1 POWER CONSIDERATION 3.2 LIMITED OUTPUT CURRENT The output current must be finite. In practice, most op-amps are designed to limit the output current so as not to exceed a specified level – around 25 mA for a type 741 IC op-amp – thus protecting the op-amp and associated circuitry from damage. Modern designs are electronically
  • 10. more rugged than earlier implementations and some can sustain direct short circuits on their outputs without damage. 3.3 OUTPUT SINK CURRENT The output sink current is the maximum current allowed to sink into the output stage. Some manufacturers show the output voltage vs. the output sink current plot, which gives an idea of the output voltage when it is sinking current from another source into the output pin. 3.4 LIMITED DESSIPIATION POWER The output current flows through the op-amp's internal output impedance, dissipating heat. If the op-amp dissipates too much power, then its temperature will increase above some safe limit. The op-amp may enter thermal shutdown, or it may be destroyed. Modern integrated FET or MOSFET op-amps approximate more closely the ideal op-amp than bipolar ICs when it comes to input impedance and input bias currents. Bipolars are generally better when it comes to input voltage offset, and often have lower noise. Generally, at room temperature, with a fairly large signal, and limited bandwidth, FET and MOSFET op-amps now offer better performance. Internal circuitry of 741-type op-amp A component-level diagram of the common 741 op-amp. Dotted lines outline:current mirrors (red); differential amplifier (blue); class A gain stage (magenta); voltage level shifter (green); output stage (cyan).
  • 11. Sourced by many manufacturers, and in multiple similar products, an example of a bipolar transistor operational amplifier is the 741 integrated circuit designed by Dave Fullagar at Fairchild Semiconductor after Bob Widlar's LM301 integrated circuit design.[9] In this discussion, we use the parameters of the Hybrid-pi model to characterize the small-signal, grounded emitter characteristics of a transistor. In this model, the current gain of a transistor is denoted hfe, more commonly called the β.[10] 3.5 ARCHITECTURE A small-scale integrated circuit, the 741 op-amp shares with most op-amps an internal structure consisting of three gain stages: 1:- Differential amplifier (outlined blue) — provides high differential amplification (gain), with rejection of common-mode signal, low noise, high input impedance, and drives a Voltage amplifier (outlined magenta) — provides high voltage gain, a single-pole frequency roll- off, and in turn drives the Output amplifier (outlined cyan and green) — provides high current gain (low output impedance), along with output current limiting, and output short-circuit protection. Additionally, it contains current mirror (outlined red) bias circuitry and a gain-stabilization capacitor (30 pF). 3.6 DIFFERENTIAL AMPLIFIER A cascaded differential amplifier followed by a current-mirror active load, the input stage (outlined in blue) is a transconductance amplifier, turning a differential voltage signal at the bases of Q1, Q2 into a current signal into the base of Q15. It entails two cascaded transistor pairs, satisfying conflicting requirements. The first stage consists of the matched NPN emitter follower pair Q1, Q2 that provide high input impedance. The second is the matched PNP common-base pair Q3, Q4 that eliminates the undesirable Miller effect; it drives an active load Q7 plus matched pair Q5, Q6. That active load is implemented as a modified Wilson current mirror; its role is to convert the (differential) input current signal to a single-ended signal without the attendant 50% losses (increasing the op-amp's open-loop gain by 3dB).[nb 4] Thus, a small-signal differential current in Q3 versus Q4 appears summed (doubled) at the base of Q15, the input of the voltage gain stage. 3.7 VOLTAGE AMPLIFIER The (class-A) voltage gain stage (outlined in magenta) consists of the two NPN transistors Q15/Q19 connected in a Darlington configuration and uses the output side of current mirror Q12/Q13 as its collector (dynamic) load to achieve its high voltage gain. The output sink
  • 12. transistor Q20 receives its base drive from the common collectors of Q15 and Q19; the level- shifter Q16 provides base drive for the output source transistor Q14. . The transistor Q22 prevents this stage from delivering excessive current to Q20 and thus limits the output sink current. 3.8 OUTPUT AMPLIFIER The output stage (Q14, Q20, outlined in cyan) is a Class AB push-pull emitter follower amplifier. It provides an output drive with impedance of ≈50Ω, in essence, current gain. Transistor Q16 (outlined in green) provides the quiescent current for the output transistors, and Q17 provides output current limiting. 3.9 BIASING CIRCUIT Provide appropriate quiescent current for each stage of the op-amp. The resistor (39 kΩ) connecting the (diode-connected) Q11 and Q12, and the given supply voltage (VS+−VS−), determine the current in the current mirrors, (matched pairs) Q10/Q11 and Q12/Q13. The collector current of Q11, i11 * 39 kΩ = VS+ − VS− − 2 VBE. For the typical VS = ±20 V, the standing current in Q11/Q12 (as well as in Q13) would be ≈1 mA. A supply current for a typical 741 of about 2 mA agrees with the notion that these two bias currents dominate the quiescent supply current. Transistors Q11 and Q10 form a Widlar current mirror, with quiescent current in Q10 i10 such that ln( i11 / i10 ) = i10 * 5 kΩ / 28 mV, where 5 kΩ represents the emitter resistor of Q10, and 28 mV is VT, the thermal voltage at room temperature. In this case i10 ≈ 20 μA. 4.0 DIFFERENTIAL AMPLIFIER The biasing circuit of this stage is set by a feedback loop that forces the collector currents of Q10 and Q9 to (nearly) match. The small difference in these currents provides the drive for the common base of Q3/Q4 (note that the base drive for input transistors Q1/Q2 is the input bias current and must be sourced externally). The summed quiescent currents of Q1/Q3 plus Q2/Q4 is mirrored from Q8 into Q9, where it is summed with the collector current in Q10, the result being applied to the bases of Q3/Q4. The quiescent currents of Q1/Q3 (resp., Q2/Q4) i1 will thus be half of i10, of order ≈ 10 μA. Input bias current for the base of Q1 (resp. Q2) will amount to i1 / β; typically ≈50 nA, implying a current gain hfe ≈ 200 for Q1(Q2). This feedback circuit tends to draw the common base node of Q3/Q4 to a voltage Vcom − 2 * VBE, where Vcom is the input common-mode voltage. At the same time, the magnitude of the quiescent current is relatively insensitive to the characteristics of the components Q1–Q4, such as hfe, that would otherwise cause temperature dependence or part-to-part variations. Transistor Q7 drives Q5 and Q6 into conduction until their (equal) collector currents match that of Q1/Q3 and Q2/Q4. The quiescent current in Q7 isVBE / 50 kΩ, about 35μA, as is the quiescent
  • 13. current in Q15, with its matching operating point. Thus, the quiescent currents are pairwise matched in Q1/Q2, Q3/Q4, Q5/Q6, and Q7/Q15. 4.1 VOLTAGE AMPLIFIER Quiescent currents in Q16 and Q19 are set by the current mirror Q12/Q13, which is running at ≈ 1 mA. Through some (?) mechanism, the collector current in Q19 tracks that standing current. 4.2 OUTPUT AMPLIFIER In the circuit involving Q16 (variously named rubber diode or VBE multiplier), the 4.5 kΩ resistor must be conducting about 100 μA, with the Q16VBE roughly 700 mV. Then the VCB must be about 0.45 V and VCE at about 1.0 V. Because the Q16 collector is driven by a current source and the Q16 emitter drives into the Q19 collector current sink, the Q16 transistor establishes a voltage difference between Q14 base and Q20 base of ≈ 1 V, regardless of the common-mode voltage of Q14/Q20 base. The standing current in Q14/Q20 will be a factor exp(100 mV / VT ) ≈ 36 smaller than the 1 mA quiescent current in the class A portion of the op amp. This (small) standing current in the output transistors establishes the output stage in class AB operation and reduces the crossover distortion of this stage. 4.3 SMALL SIGNAL DIFFERENTIAL MODE A small differential input voltage signal gives rise, through multiple stages of current amplification, to a much larger voltage signal on output. 4.4 INPUT IMPEDENCE The input stage with Q1 and Q3 is similar to a emitter-coupled pair (long-tailed pair), with Q2 and Q4 adding some degenerating impedance. The input impedance is relatively high because of the small current through Q1-Q4. A typical 741 op amp has an differential input impedance of about 2 MΩ. The common mode input impedance is even higher, as the input stage works at an essentially constant current. 4.5 Differential Amplifier A differential voltage VIn at the op-amp inputs (pins 3 and 2, respectively) gives rise to a small differential current in the bases of Q1 and Q2 iIn ≈ VIn/ ( 2 hie * hfe). This differential base current causes a change in the differential collector current in each leg by iIn * hfe. Introducing the transconductance of Q1, gm = hfe / hie, the (small-signal) current at the base of Q15 (the input of the voltage gain stage) is VIn * gm / 2. This portion of the op amp cleverly changes a differential signal at the op amp inputs to a single- ended signal at the base of Q15, and in a way that avoids wastefully discarding the signal in
  • 14. either leg. To see how, notice that a small negative change in voltage at the inverting input (Q2 base) drives it out of conduction, and this incremental decrease in current passes directly from Q4 collector to its emitter, resulting in an decrease in base drive for Q15. On the other hand, a small positive change in voltage at the non-inverting input (Q1 base) drives this transistor into conduction, reflected in an increase in current at the collector of Q3. This current drives Q7 further into conduction, which turns on current mirror Q5/Q6. Thus, the increase in Q3 emitter current is mirrored in an increase in Q6 collector current, resulting also in a decrease in base drive for Q15. Besides avoiding wasting 3dB of gain here, this technique decreases common- mode gain and feed through of power supply noise. 4.6 VOLTAGE AMPLIFIER A current signal i at Q15's base gives rise to a current in Q19 of order i * β2 (the product of the hfe of each of Q15 and Q19, which are connected in a Darlington pair). This current signal develops a voltage at the bases of output transistors Q14/Q20 proportional to the hie of the respective transistor. 4.7 OUTPUT AMPLIFIER Output transistors Q14 and Q20 are each configured as an emitter follower, so no voltage gain occurs there; instead, this stage provides current gain, equal to the hfe of Q14 (resp. Q20). The output impedance is not zero, as it would be in an ideal op-amp, but with negative feedback it approaches zero at low frequencies. 4.8 OVEROOL VOLTAGE GAIN LOOP The net open-loop small-signal voltage gain of the op amp involves the product of the current gain hfe of some 4 transistors. In practice, the voltage gain for a typical 741-style op amp is of order 200,000, and the current gain, the ratio of input impedance (≈2−6 MΩ) to output impedance (≈50Ω) provides yet more (power) gain. Other linear characteristics 4.9 SMALL SIGNAL COMMON MODE GAIN The ideal op amp has infinite common-mode rejection ratio, or zero common-mode gain. In the present circuit, if the input voltages change in the same direction, the negative feedback makes Q3/Q4 base voltage follow (with 2VBE below) the input voltage variations. Now the output part (Q10) of Q10-Q11 current mirror keeps up the common current through Q9/Q8 constant in spite of varying voltage. Q3/Q4 collector currents, and accordingly the output current at the base of Q15, remain unchanged. In the typical 741 op amp, the common-mode rejection ratio is 90dB, implying an open-loop common-mode voltage gain of about 6.
  • 15. 5.0 FREQUENCY COMPENSATION The innovation of the Fairchild μA741 was the introduction of frequency compensation via an on-chip (monolithic) capacitor, simplifying application of the op amp by eliminating the need for external components for this function. The 30 pF capacitor stabilizes the amplifier via Miller compensationand functions in a manner similar to an op-amp integrator circuit. Also known as 'dominant pole compensation' because it introduces a pole that masks (dominates) the effects of other poles into the open loop frequency response; in a 741 op amp this pole can be as low as 10 Hz (where it causes a −3 dB loss of open loop voltage gain). This internal compensation is provided to achieve unconditional stability of the amplifier in negative feedback configurations where the feedback network is non-reactive and the closed loop gain is unity or higher. By contrast, amplifiers requiring external compensation, such as the μA748, may require external compensation or closed-loop gains significantly higher than unity. 5.1 INPUT OFFSET VOLTAGE The "offset null" pins may be used to place external resistors (typically in the form of the two ends of a potentiometer, with the slider connected toVS–) in parallel with the emitter resistors of Q5 and Q6, to adjust the balance of the Q5/Q6 current mirror. The potentiometer is adjusted such that the output is null (midrange) when the inputs are shorted together. 5.2 NON LINEAR CHARACTERSTICS 5.2.1 INPUT BREAKDOWN VOLTAGE The transistors Q3, Q4 help to increase the reverse VBE rating: the base-emitter junctions of the NPN transistors Q1 and Q2 break down at around 7V, but the PNP transistors Q3 and Q4 have VBE breakdown voltages around 50 V. 5.2.2 OUTPUT STAGE VOLTAGE SWINFG AND CURRENT LIMITING Variations in the quiescent current with temperature, or between parts with the same type number, are common, so crossover distortion andquiescent current may be subject to significant variation. The output range of the amplifier is about one volt less than the supply voltage, owing in part to VBE of the output transistors Q14 and Q20. The 25 Ω resistor at the Q14 emitter, along with Q17, acts to limit Q14 current to about 25 mA; otherwise, Q17 conducts no current. Current limiting for Q20 is performed in the voltage gain stage: Q22 senses the voltage across Q19's emitter resistor (50Ω); as it turns on, it diminishes the drive current to Q15 base.
  • 16. Later versions of this amplifier schematic may show a somewhat different method of output current limiting. 6.1 APPLICABILITY CONSIDERATION Note: while the 741 was historically used in audio and other sensitive equipment, such use is now rare because of the improved noiseperformance of more modern op-amps. Apart from generating noticeable hiss, 741s and other older op-amps may have poor common-mode rejection ratios and so will often introduce cable-borne mains hum and other common-mode interference, such as switch 'clicks', into sensitive equipment. The "741" has come to often mean a generic op-amp IC (such as μA741, LM301, 558, LM324, TBA221 — or a more modern replacement such as the TL071). The description of the 741 output stage is qualitatively similar for many other designs (that may have quite different input stages), except: Some devices (μA748, LM301, LM308) are not internally compensated (require an external capacitor from output to some point within the operational amplifier, if used in low closed-loop gain applications). Some modern devices have "rail-to-rail output" capability, meaning that the output can range from within a few millivolts of the positive supply voltage to within a few millivolts of the negative supply voltage 6.2 CLASSIFICATION :- Op-amps may be classified by their construction: discrete (built from individual transistors or tubes/valves) IC (fabricated in an Integrated circuit) — most common Hybrid IC op-amps may be classified in many ways, including: Military, Industrial, or Commercial grade (for example: the LM301 is the commercial grade version of the LM101, the LM201 is the industrial version). This may define operating temperature ranges and other environmental or quality factors. Classification by package type may also affect environmental hardiness, as well as manufacturing options; DIP, and other through-hole packages are tending to be replaced by surface-mount devices. Classification by internal compensation: op-amps may suffer from high frequency instability in some negative feedback circuits unless a small compensation capacitor modifies the phase and
  • 17. frequency responses. Op-amps with a built-in capacitor are termed "compensated", or perhaps compensated for closed-loop gains down to (say) 5. All others are considered uncompensated. Single, dual and quad versions of many commercial op-amp IC are available, meaning 1, 2 or 4 operational amplifiers are included in the same package. Rail-to-rail input (and/or output) op-amps can work with input (and/or output) signals very close to the power supply rails. CMOS op-amps (such as the CA3140E) provide extremely high input resistances, higher than JFET-input op-amps, which are normally higher than bipolar-input op-amps. other varieties of op-amp include programmable op-amps (simply meaning the quiescent current, gain, bandwidth and so on can be adjusted slightly by an external resistor). manufacturers often tabulate their op-amps according to purpose, such as low-noise pre- amplifiers, wide bandwidth amplifiers, and so on. 6.3 APPLICATIONS :- DIP pinout for 741-type operational amplifier Main article: Operational amplifier applications 6.4 USE IN ELECTRONICS SYTEM DESIGN The use of op-amps as circuit blocks is much easier and clearer than specifying all their individual circuit elements (transistors, resistors, etc.), whether the amplifiers used are integrated or discrete circuits. In the first approximation op-amps can be used as if they were ideal differential gain blocks; at a later stage limits can be placed on the acceptable range of parameters for each op-amp. Circuit design follows the same lines for all electronic circuits. A specification is drawn up governing what the circuit is required to do, with allowable limits. For example, the gain may be required to be 100 times, with a tolerance of 5% but drift of less than 1% in a specified temperature range; the input impedance not less than one megohm; etc.
  • 18. A basic circuit is designed, often with the help of circuit modeling (on a computer). Specific commercially available op-amps and other components are then chosen that meet the design criteria within the specified tolerances at acceptable cost. If not all criteria can be met, the specification may need to be modified. A prototype is then built and tested; changes to meet or improve the specification, alter functionality, or reduce the cost, may be made. 6.5 APPLICATIONS WITHOUT USING ANY FEEDBACK That is, the op-amp is being used as a voltage comparator. Note that a device designed primarily as a comparator may be better if, for instance, speed is important or a wide range of input voltages may be found, since such devices can quickly recover from full on or full off ("saturated") states. A voltage level detector can be obtained if a reference voltage Vref is applied to one of the op- amp's inputs. This means that the op-amp is set up as a comparator to detect a positive voltage. If the voltage to be sensed, Ei, is applied to op amp's (+) input, the result is a noninverting positive- level detector: when Ei is above Vref, VO equals +Vsat; when Ei is below Vref, VO equals −Vsat. If Ei is applied to the inverting input, the circuit is an inverting positive-level detector: When Ei is above Vref, VO equals −Vsat. A zero voltage level detector (Ei = 0) can convert, for example, the output of a sine-wave from a function generator into a variable-frequency square wave. If Ei is a sine wave, triangular wave, or wave of any other shape that is symmetrical around zero, the zero-crossing detector's output will be square. Zero-crossing detection may also be useful in triggering TRIACs at the best time to reduce mains interference and current spikes. 6.6 POSIITVE FEEDBACK APPLICATION Another typical configuration of op-amps is with positive feedback, which takes a fraction of the output signal back to the non-inverting input. An important application of it is the comparator with hysteresis, the Schmitt trigger. Some circuits may use Positive feedback and Negative feedback around the same amplifier, for example Triangle wave oscillators and active filters. Because of the wide slew-range and lack of positive feedback, the response of all the open-loop level detectors described above will be relatively slow. External overall positive feedback may be applied but (unlike internal positive feedback that may be applied within the latter stages of a purpose-designed comparator) this markedly affects the accuracy of the zero-crossing detection point. Using a general-purpose op-amp, for example, the frequency of Ei for the sine to square wave converter should probably be below 100 Hz.
  • 19. Negative feedback applications Non-inverting amplifier An op-amp connected in the non-inverting amplifier configuration In a non-inverting amplifier, the output voltage changes in the same direction as the input voltage. The gain equation for the op-amp is: If is very large, this simplifies to . The non-inverting input of the operational amplifier needs a path for DC to ground; if the signal source does not supply a DC path, or if that source requires a given load impedance, then the circuit will require another resistor from the non-inverting input to ground. When the operational amplifier's input bias currents are significant, then the DC source resistances driving the inputs should be balanced. The ideal value for the feedback resistors (to give minimum offset voltage) will be such that the two resistances in parallel roughly equal the resistance to ground at the non- inverting input pin. That ideal value assumes the bias currents are well-matched, which may not be true for all op-amps.
  • 20. CHAPTER 2 LITERTURE REVIEW PAPER 1 :- “COMPARATIVE STUDY ON CMOS BASED OPERATIONAL AMPLIFIER” . This paper describes about the various parameters like Gain, Phase margin and slew rate of CMOS based two stage single ended operational amplifierunder 0.35um, 0.18um and 100nm CMOS technology. Designing of high gain CMOS operational amplifier with decreasing length CMOS is a challenge for designer. All the work has been carried out on Tanner EDA V14.1 software. Circuit designing has been done on S-edit and simulation has been carried out using T- spice. Waveform has been obtained on W-edit. The simulation result for different CMOS Op Amp have been compared and analyzed. Op-amp is a high gain differential amplifier. By high we mean a value that is adequate for the application. The gain could be anywhere from 101 to 106. Op-amps are usually used to realize a feedback system. An amplifier has an input port and an output port. In a linear amplifier . The circuit symbol for an op-amp is shown to the right, where: V+ : non-inverting input V− : inverting input V out: output VS + : positive power supply VS − : negative power supply
  • 21. Equivalent circuit of op-amp Example of an ideal operational amplifier is shown in figure 1.2. The main part in an amplifier is the dependent voltage source that increases in relation to the voltage drop across Rin, thus amplifying the voltage difference between V+ and V− . Many uses have been found for operational amplifiers and an ideal op-amp seeks to characterize the physical phenomena that make op-amps useful. Supply voltages Vcc + and Vcc − are used internally to implement the dependent voltage sources. The positive source Vs + acts as an upper bound on the output, and the negative source Vs − acts as a lower bound on the output. The internal Vs + and Vs − connections are not shown here and will vary by implementation of the operational amplifier.The two-stage op-amp topology follows the classical differential input, single-ended output framework, with included Miller compensation capacitor and zeronulling resistor. The parameters will be compared via tables to the actual specifications achieved. BLOCK DIAGRAM OF TWO STAGE SINGLE ENDED OPERATIONAL AMPLIFIER
  • 23. CHAPTER 3 PROPOSED WORK We are working on operational amplifier for results about the various parameters like area , delay , power consumption for CMOS based two stage single ended operational amplifier under 100nm CMOS technology. Designing of high gain CMOS operational amplifier with decreasing length CMOS is a challenge for designer. All the work has been carried out on Tanner EDA V14.1 software. Circuit designing has been done on S-edit and simulation has been carried out using T- spice. Waveform has been obtained on W-edit. The simulation result for different CMOS Op Amp have been compared and analyzed .
  • 24. CHAPTER 3 CONCLUSION The amplifier presented in this paper operates in saturation mode and regulates its bias current. When a signal is applied the current in the amplifier increases so that these amplifiers have very high driving current. The op-amp has low power as well as low voltage. Its slew rate is higher than reported. Low power low voltage amplifier is designed at 1μm technology whose gain is 80dB and phase margin assuming a feedback factor of 0.5 is obtained 60 degrees. The unity gain bandwidth is obtained 400MHz. The maximum differential output swing was between 2.5V to - 2.5V.
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