8086 in minimum mode
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The document provides an overview of the 8086 microprocessor functioning in minimum mode, highlighting its control over address, data, and control buses. It describes the multiplexed pins, their roles in sending addresses and data, and the timing states involved in bus cycles. Additionally, it explains the use of latches and decoders for managing signal control in the microprocessor's operation.
8086 in minimum mode
- 1. 8086 in minimum mode Sridari Iyer St. Francis Inst. of Tech Borivali (W), Mumbai
- 2. Minimum Mode •Single Processor Mode •The Processor is in control of all the three buses – address, data and control.
- 3. Multiplexed Pins •Multiplexed pins perform different functions at different time intervals •These functions will never be required by the μp or its peripherals simultaneously. •E.g., Address and Data pins are multiplexed. •The μp first sends out address, and then from that location/ to that location, the μp sends/ receives data. •Same pins act as address lines in one time state (T1), and data lines in another time state (T3)
- 4. Time in μP •T-state is the smallest unit of time in a μp •1 clock cycle = 1 T-state •In 8086, 1 machine cycle = 4 T-states •1 machine cycle (or bus cycle) is the time required to • T1 – send out an address – on address bus • T2 – send out a signal (read/ write) – on control bus • T3 – read/ write data on that location – on data bus • T4 – release all buses •1 instruction cycle = n machine cycles (depends on the instruction)
- 5. What is a “BUS” in real? • Bus is a way of transport • Are these pins or electrical wires?
- 6. • The 8086 ALU sets the pins A0 – A19 to match the 20-bit address of the location it wants to access • This value is not stored on these pins for a long time • This value gets rewritten as D0 – D15 and status lines within the next fraction of a second • Where is A0 – A19 after that? • In the address bus! • How to get pure address from AD0 – AD15? (Demultiplex) By using a LATCH to save only the address from these pins, and remain cut-off when data is on them.
- 7. 8086 80868086 STB (3) 8282 Latch 8-bit ALE AD0 – AD15 A16/S3 – A19/S6 𝐵𝐻𝐸 / S7 1 GND A0 – A19 𝑂𝐸 010 AD0 – AD15, A16/S3 – A19/S6, 𝑩𝑯𝑬/S7 Pure Address
- 8. 8086 80868086 STB (3) 8282 Latch 8-bit ALE AD0 – AD15 A16/S3 – A19/S6 𝐵𝐻𝐸 / S7 AD0 – AD15, A16/S3 – A19/S6, 𝑩𝑯𝑬/S7 1 GND A0 – A19 𝑂𝐸 D0 – D158086 (2) 8286 Transreciever 8-bit 𝑂𝐸 TDT/ 𝑅 𝐷𝐸𝑁 AD0–AD15 Pure Data
- 9. 8086 80868086 STB (3) 8282 Latch 8-bit ALE AD0 – AD15 A16/S3 – A19/S6 𝑩𝑯𝑬 / S7 AD0 – AD15, A16/S3 – A19/S6, 𝑩𝑯𝑬/S7 1 GND A0 – A19 𝑂𝐸 D0 – D158086 (2) 8286 Transreciever 8-bit 𝑂𝐸 TDT/ 𝑹 𝑫𝑬𝑵 AD0–AD15 74138 3:8 Decoder C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 M/𝑰𝑶 𝑹𝑫 𝑾𝑹 IOR IOW MEMR MEMW 0 0 1 1 IOR IOW MR MW 0 1 0 1 1 0 1 0 Control Signals
- 10. 8086 80868086 STB (3) 8282 Latch 8-bit ALE AD0 – AD15 A16/S3 – A19/S6 𝑩𝑯𝑬 / S7 AD0 – AD15, A16/S3 – A19/S6, 𝑩𝑯𝑬/S7 1 GND A0 – A19 𝑂𝐸 D0 – D158086 (2) 8286 Transreciever 8-bit 𝑂𝐸 TDT/ 𝑹 𝑫𝑬𝑵 AD0–AD15 74138 3:8 Decoder C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 M/𝑰𝑶 𝑹𝑫 𝑾𝑹 IOR IOW MEMR MEMW 0 0 1 1 IOR IOW MR MW 0 1 0 1 1 0 1 0 Control Signals Address Bus Data Bus Control Bus
- 11. 8086 at 6MHz 80868086 STB (3) 8282 Latch 8-bit ALE AD0 – AD15 A16/S3 – A19/S6 𝑩𝑯𝑬 / S7 AD0 – AD15, A16/S3 – A19/S6, 𝑩𝑯𝑬 / S 1 GND A0 – A19 𝑂𝐸 D0 – D15 8086 (2) 8286 Transreciever 8-bit 𝑂𝐸 TDT/ 𝑹 𝑫𝑬𝑵 AD0–AD15 74138 3:8 Decoder C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 M/𝑰𝑶 𝑹𝑫 𝑾𝑹 IOR IOW MEMR MEMW 0 0 1 1 IOR IOW MR MW 0 1 0 1 1 0 1 0 Control Signals 8284 Clock 18 MHz CLK READY RESET CLK RESET RDY
- 12. 8086 at 6MHz 80868086 STB (3) 8282 Latch 8-bit ALE AD0 – AD15 A16/S3 – A19/S6 𝑩𝑯𝑬 / S7 AD0 – AD15, A16/S3 – A19/S6, 𝑩𝑯𝑬/ S7 1 GND A0 – A19 𝑂𝐸 D0 – D15 8086 (2) 8286 Transreciever 8-bit 𝑂𝐸 TDT/ 𝑹 𝑫𝑬𝑵 AD0–AD15 74138 3:8 Decoder C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 M/𝑰𝑶 𝑹𝑫 𝑾𝑹 IOR IOW MEMR MEMW 0 0 1 1 IOR IOW MR MW 0 1 0 1 1 0 1 0 Control Signals 8284 Clock 18 MHz CLK READY RESET CLK RESET RDY MN/𝑴𝑿Vcc NMI INTA INTR HLDA HOLD Interrupts DMAC 𝑻𝑬𝑺𝑻
- 13. 8086 at 6MHz 8086 8086 STB (3) 8282 Latch 8-bit ALE AD0 – AD15 A16/S3 – A19/S6 𝑩𝑯𝑬 / S7 AD0 – AD15, A16/S3 – A19/S6, 𝑩𝑯𝑬 / S7 1 GND A0 – A19 𝑂𝐸 D0 – D15 8086(2) 8286 Transreciever 8-bit 𝑂𝐸 TDT/ 𝑹 𝑫𝑬𝑵 AD0–AD15 74138 3:8 Decoder C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 M/𝑰𝑶 𝑹𝑫 𝑾𝑹 IOR IOW MEMR MEMW 0 0 1 1 IOR IOW MR MW 0 1 0 1 1 0 1 0 Control Signals 8284 Clock 18 MHz CLK READY RESET CLK RESET RDY MN/𝑴𝑿Vcc NMI INTA INTR HLDA HOLD Interrupts DMAC 𝑻𝑬𝑺𝑻 8086 in Minimum Mode!