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ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011



    A Temperature-insensitive Simple Current-mode
   Multiplier/Divider Employing Only Multiple-output
                        CDTA
                                              P. Silapan1, and C. Chanapormma2
   1, 2
          Uttaradit Rajabhat University/Department of Electrical Computer and Industrial, Faculty of Industrial Technology ,
                                                     Uttaradit, THAILAND
                                       Email: phamorn@mail.uru.ac.th1 chaiyanc@uru.ac.th2

Abstract— This article presents a new current-mode                 the circuit topology: the circuit is ideally insensitive to
multiplier/divider based on MO-CDTA (Multiple output               temperature variations: the output current can be controlled
current conveyor transconductance amplifier). The circuit          via input bias currents.; magnitude of output signal is ideally
description is very simple, its construction consists of only      temperature-insensitive; the proposed circuit consists of 4
one MO-CDTA. Without external passive elements, the                CC-CDBAs and without any passive element, which is ap-
proposed circuit is then suitable for IC architecture. The
                                                                   propriate to fabricate in integrated circuit architecture. The
PSpice simulation and experimental results are depicted, and
agree well with the theoretical anticipation. From simulation
                                                                   PSpice simulation and experimental results are also shown,
results, the maximum power consumption is approximately            which are in correspondence with the theoretical analysis.
2.14mW at ±2V power supply voltages.

Index Terms— multiplier/divider, current-mode, MO-CDTA

                          I. INTRODUCTION
    A multiplier and divider has been found for wide
usefulness in analog instrumentation and measurement
systems, such amplitude modulator, and de modulator [1-3].
From literature review, it found that several implementations
of square-rooting circuits using different high-performance
active building blocks such as, OTAs [4], current conveyors
(CCIIs) [5], current controlled current conveyors [6], current
differencing buffered amplifiers (CDBAs) [7], have been
reported. Unfortunately, these reported circuits suffer from
one or more of following weaknesses:
    Excessive use of the active/passive elements,
        especially external resistors [4-6].
    Depending on ambient temperature of output [4,7].
Presently, a current-mode technique [8] has being been more
popular than voltage-mode one. This is due to requirements
in low-voltage environment such as in portable and battery-              Figure 1. The MO-CDTA (a) symbol (b) equivalent circuit
powered equipments. Since a low-voltage operating circuit
becomes necessary, the current–mode technique is ideally
suited for this purpose. Presently, there is a growing interest                      II. PRINCIPLE OF OPERATION
in synthesizing the current-mode circuits because of more           A. Basic Concept of MO-CDTA
their potential advantages such as larger dynamic range,                Since the proposed circuit based on MO-CDTA, a brief
higher signal bandwidth, greater linearity, simpler circuitry       review of the MO-CDTA is given in this section. The voltage
and lower power consumption [8-9]. The current differencing
                                                                    and current relationships of MO-CDTA are shown in (1)
transconductance amplifier (CDTA) [10] seems to be a
versatile component in the realization of a class of analog
signal processing circuits. It is really current-mode element
whose input and output signals are currents. In addition, it
can be adjusted the output current gain. The purpose of this
paper is to introduce a novel current-mode multiplier/divider
based on use of MO-CDTA. The features of the proposed
multiplier/divider are that; the proposed multiplier/divider can
multiply and divide two current signals throughout four-
quadrant and two-quadrant, respectively, without changing
© 2011 ACEEE                                                     42
DOI: 01.IJEPE.02.03.17
ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011


where                                                                                    mode 4 quadrant multiplier because I A and I C can be either
                             I B1           I B2        I B3                             a positive or a negative value. If either I A or I C and I D are
                    gm1          , g m 2  2V , g m3  2V .                 (2)
                             2VT               T           T                             the input currents, the proposed circuit can work as a cur-
g m1 , gm 2 , and g m3 are the transconductances of the MO-                              rent-mode divider. Due to being a positive value of I D , the
                                                                                         proposed circuit can be 2 quadrant divider. Furthermore, in
CDTA. VT is the thermal voltage. The symbol and the equiva-                              ideal case, it is temperature-insensitive owing to no term of
lent circuit of the MO-CDTA are illustrated in Figs. 1(a) and
                                                                                         VT .
(b), respectively.
                                                                                         C. Non Ideal Case
                                                                                               For non-ideal case, the MO-CDTA can be characterized
                                                                                         by.

                                                                                                  V p   0         0      0       0 0 0  I p 
                                                                                                                                          
                                                                                                  Vn   0          0      0       0 0 0  I n 
                                                                                                                                          
                                                                                                   I   p      n      0        0 0 0  Vz 
                                                                                                   z                                   
                                                                                                   I x1   0       0     g m1    0 0 0  Vx1 
                                                                                                                                                       (8)
                                                                                                  I   0           0     g m2    0 0 0  Vx 2 
  Figure. 2. Circuit diagram of proposed current-mode multiplier/                                  x2                                   
                              divider                                                              I x3   0       0    g m 3   0 0 0  Vx 3 
                                                                                                                                        
B. The proposed Current-mode Multiplier/Divider
    The proposed current-mode multiplier/divider using the                               where     p ,  n and  are transferred values, these values
MO-CDTA is displayed in Fig. 2. By routine analysis circuit
                                                                                         can be deviated from one. In the case of non-ideal and
in Fig. 2 and using the properties of MO-CDTA in Section
                                                                                         reanalyzing the proposed multiplier/divider in Fig. 2, it yields
II.A, the output current at z terminal of MO-CDTA is obtained
                                                                                         the output current as
by
                   I z  I A   I x3 .                                     (3)                                      p I A IC
                                                                                                          I out               .                       (9)
Then, the output voltage at z terminal Vz  of MO-CDTA can                                                             ID
be found to be                                                                           From (9), it is found that the proposed multiplier/divider still
                                                                                         functions as a multiplier/divider. These deviated values effect
                             I x 3 2VT I A
                   Vz                   .                                (4)
                             g m3   I B3                                                 on only output magnitude. Practically, the         p ,  n and 
From Fig. 2, it is found that I B1  IC , I B 2   I C and I B3  I D                   originate from intrinsic resistances and stray capacitances in
                                                                                         the MO-CDTA. These errors affect the sensitivity to
Thus, the I x1 and I x 2 can be obtained by                                              temperature and high frequency response of the proposed
                                                                                         circuit. Consequently, the MO-CDTA should be carefully
                                        I A IC                                          designed to achieve these errors as low as possible.
       g V             if     IC  0                      if     IC  0
I x1   m1 z                          ID
       0               if     IC  0                                      , (5)
                                                                   IC  0                           II. SIMULATION AND EXPERIMENTAL RESULTS
                                       0                   if
and                                                                                          To prove the performances of the proposed multiplier/
                                                                                         divider circuit, the PSpice simulation program was used for
                                      0               if        IC  0                  the first examination. The PNP and NPN transistors employed
       0             if      IC  0  
I x2                                I A IC                                           in the proposed circuit were simulated by respectively using
        g m 2Vz       if     IC  0                  if        I C  0 . (6)           the parameter of the NR200N and PR200N bipolar transistors
                                       ID                                               of ALA400 transistor array from AT&T [12]. Fig. 3 depicts
From (5)-(6), the output current  I out  of the multiplier/divider                     schematic description of the MO-CDTA used in the
                                                                                         simulations. The MO-CDTA was biased with 2V , where IA
is displayed as
                                                                                         was set to 100  A . The DC transfer characteristic of the
                                          I A IC                                         proposed circuit is shown in Fig. 4.
                I out  I x1  I x 2              .                        (7)
                                            ID                                               The results in transient responses of the multiplier/divider
                                                                                         circuit for sinusoidal and triangular inputs are displayed in
From (7), it is clearly seen that, if I A and I C are assigned to
                                                                                         Fig. 5.
be input currents, the proposed circuit serves as a current-

© 2011 ACEEE                                                                        43
DOI: 01.IJEPE.02.03.17
ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011




                                               Figure. 3. Internal Construction of MO-CDTA




   Figure4. DC transfer characteristic of the proposed multiplier/
                             divider                                      Figure 5. Transient responses of the proposed multiplier/divider
Fig. 7 shows the output signal of the proposed circuit relative
to temperature variations from 27C , 50C and 100C . It is
clearly seem that the output current is slightly dependent on
the temperature variations due to the intrinsic resistances
and stray capacitances in the MO-CDTA, as depicted in
Section II.C.




                                                                          Figure 6. The output current deviations for different temperature
                                                                                                       values
© 2011 ACEEE                                                         44
DOI: 01.IJEPE.02.03. 17
ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011


                                                                        circuit are that: output gain can be adjusted via input bias
                                                                        current; magnitude of output signal is theoretically
                                                                        temperature-insensitive; the proposed multiplier/divider
                                                                        consists of only one MO-CDTA without any passive element,
                                                                        which is appropriate to fabricate in integrated circuit
                                                                        architecture. The performances of the proposed circuit have
                                                                        been also investigated and discussed through PSpice
                                                                        simulation and experimental results. They show that the
                                                                        proposed circuit can function as a current-mode multiplier/
                                                                        divider for input current range variation from 200  A to
                                                                         200  A . From simulation results, the maximum power
                                                                        consumption is mW at 2V supply voltages. The
                                                                        maximum error of the amplitude of output current signal due
                                                                        to variations of the temperature from 0-100oC is approximately
                                                                         0.16% .
    Figure 7. Practical implementation of the proposed circuit
                                                                                               ACKNOWLEDGMENT
                                                                           This work was supported in part by a grant from the
                                                                        Research and Development Institute, Uttaradit Rajabhat
                                                                        University (URU).

                                                                                                  REFERENCES
                                                                        [1] D. M. W. Leenaerts, G. H. M. Joordens, and J. A. Hegt, “A
                                                                        3.3V 625kHz switched-current multiplier,” IEEE J. Solid-State
                                                                        Circuits, vol. 31, pp. 1340-1343, Sep. 1996.
                                                                        [2] M. A. Abou El-Atta, M. A. Abou El-Ela, and M.K. El Said,
                                                                        “Four-quadrant current multiplier and its application as a phase-
                                                                        detector,” Proceedings of the Nineteenth National Radio Science
                                                                        Conference (NRSC 2002), pp. 502-508. Mar. 2002.
                                                                        [3] H. Wasaki, Y. Horio, and S. Nakamura, “Current multiplier/
                                                                        divider circuit,” Electronics Letters, vol. 27, no. 6, pp. 504-506,
                                                                        Mar. 1991.
                                                                        [4] S. Maheshwari, and I. A. Khan, “Current-controlled current
                                                                        differencing buffered amplifier: implementation and applications,”
                                                                        Active and Passive Electronic Components., vol. 4, pp. 219-227,
                                                                        2004.
                                                                        [5] C. Premont, S. Cattet, R. Grisel, N. Abouchi, J. P. Chante, and
                                                                        D. Renault, “A CMOS multiplier/divider based on current
                                                                        conveyors,” Proceedings of the 1998 IEEE International Symposium
                                                                        on Circuits and Systems., vol. 1, pp. 69-71, 1998.
                                                                        [6] K. Kaewdang, C.Fogsamut and W. Surakampontorn, “A Wide-
                                                                        Band. Current-Mode OTA-Based Analog Multiplier-Divider”,
                                                                        ISCAS’03, vol. 1, pp. I-349 - I-352, 2003.
                                                                        [7] A. Ü. Keskin, “A Four Quadrant Analog Multiplier Employing
                                                                        Single CDBA,” Analog Integrated Circuits and Signal Processing.,
                                                                        vol. 40 n.1, pp.99-101, July 2004.
                                                                        [8] C. Toumazou, F. J. Lidgey and D. G. Haigh. Analogue IC
                                                                        design: the current-mode approach, London: Peter Peregrinus, 1990.
    Figure 8. The experimental results of the proposed circuit          [9] H. Schmid, “Why the terms ‘current mode’ and ‘voltage mode’
To validate that the multiplier/divider can operate practically,        neither divide nor qualify circuits,” IEEE ISCAS, pp. II-29-II-32,
it was constructed using commercial ICs, as shown in Fig. 7.            2002.
Figs. 8(a) and (b) show the experimental results of the pro-            [10] D. Biolek, “CDTA – Building block for current-mode analog
posed circuit.                                                          signal processing,” Proceedings of the European conference on
                                                                        circuit theory and design 2003 - ECCTD’03, 2003, pp. 397–400,
                                                                        2003.
                         CONCLUSIONS                                    [11] D.R. Frey “Log-domain filtering: an approach to current-mode
  The current-mode multiplier/divider based on the MO-                  filtering”. IEE Proc. Circuit Devices Syst., vol. 140, pp. 406-416,
CDTAs has been presented. The features of the proposed                  1993.

© 2011 ACEEE                                                       45
DOI: 01.IJEPE.02.03.17

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A Temperature-insensitive Simple Current-mode Multiplier/Divider Employing Only Multiple-output CDTA

  • 1. ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011 A Temperature-insensitive Simple Current-mode Multiplier/Divider Employing Only Multiple-output CDTA P. Silapan1, and C. Chanapormma2 1, 2 Uttaradit Rajabhat University/Department of Electrical Computer and Industrial, Faculty of Industrial Technology , Uttaradit, THAILAND Email: phamorn@mail.uru.ac.th1 chaiyanc@uru.ac.th2 Abstract— This article presents a new current-mode the circuit topology: the circuit is ideally insensitive to multiplier/divider based on MO-CDTA (Multiple output temperature variations: the output current can be controlled current conveyor transconductance amplifier). The circuit via input bias currents.; magnitude of output signal is ideally description is very simple, its construction consists of only temperature-insensitive; the proposed circuit consists of 4 one MO-CDTA. Without external passive elements, the CC-CDBAs and without any passive element, which is ap- proposed circuit is then suitable for IC architecture. The propriate to fabricate in integrated circuit architecture. The PSpice simulation and experimental results are depicted, and agree well with the theoretical anticipation. From simulation PSpice simulation and experimental results are also shown, results, the maximum power consumption is approximately which are in correspondence with the theoretical analysis. 2.14mW at ±2V power supply voltages. Index Terms— multiplier/divider, current-mode, MO-CDTA I. INTRODUCTION A multiplier and divider has been found for wide usefulness in analog instrumentation and measurement systems, such amplitude modulator, and de modulator [1-3]. From literature review, it found that several implementations of square-rooting circuits using different high-performance active building blocks such as, OTAs [4], current conveyors (CCIIs) [5], current controlled current conveyors [6], current differencing buffered amplifiers (CDBAs) [7], have been reported. Unfortunately, these reported circuits suffer from one or more of following weaknesses:  Excessive use of the active/passive elements, especially external resistors [4-6].  Depending on ambient temperature of output [4,7]. Presently, a current-mode technique [8] has being been more popular than voltage-mode one. This is due to requirements in low-voltage environment such as in portable and battery- Figure 1. The MO-CDTA (a) symbol (b) equivalent circuit powered equipments. Since a low-voltage operating circuit becomes necessary, the current–mode technique is ideally suited for this purpose. Presently, there is a growing interest II. PRINCIPLE OF OPERATION in synthesizing the current-mode circuits because of more A. Basic Concept of MO-CDTA their potential advantages such as larger dynamic range, Since the proposed circuit based on MO-CDTA, a brief higher signal bandwidth, greater linearity, simpler circuitry review of the MO-CDTA is given in this section. The voltage and lower power consumption [8-9]. The current differencing and current relationships of MO-CDTA are shown in (1) transconductance amplifier (CDTA) [10] seems to be a versatile component in the realization of a class of analog signal processing circuits. It is really current-mode element whose input and output signals are currents. In addition, it can be adjusted the output current gain. The purpose of this paper is to introduce a novel current-mode multiplier/divider based on use of MO-CDTA. The features of the proposed multiplier/divider are that; the proposed multiplier/divider can multiply and divide two current signals throughout four- quadrant and two-quadrant, respectively, without changing © 2011 ACEEE 42 DOI: 01.IJEPE.02.03.17
  • 2. ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011 where mode 4 quadrant multiplier because I A and I C can be either I B1 I B2 I B3 a positive or a negative value. If either I A or I C and I D are gm1  , g m 2  2V , g m3  2V . (2) 2VT T T the input currents, the proposed circuit can work as a cur- g m1 , gm 2 , and g m3 are the transconductances of the MO- rent-mode divider. Due to being a positive value of I D , the proposed circuit can be 2 quadrant divider. Furthermore, in CDTA. VT is the thermal voltage. The symbol and the equiva- ideal case, it is temperature-insensitive owing to no term of lent circuit of the MO-CDTA are illustrated in Figs. 1(a) and VT . (b), respectively. C. Non Ideal Case For non-ideal case, the MO-CDTA can be characterized by. V p   0 0 0 0 0 0  I p       Vn   0 0 0 0 0 0  I n    I   p  n 0 0 0 0  Vz   z     I x1   0 0  g m1 0 0 0  Vx1  (8) I   0 0  g m2 0 0 0  Vx 2  Figure. 2. Circuit diagram of proposed current-mode multiplier/  x2     divider  I x3   0 0  g m 3 0 0 0  Vx 3       B. The proposed Current-mode Multiplier/Divider The proposed current-mode multiplier/divider using the where  p ,  n and  are transferred values, these values MO-CDTA is displayed in Fig. 2. By routine analysis circuit can be deviated from one. In the case of non-ideal and in Fig. 2 and using the properties of MO-CDTA in Section reanalyzing the proposed multiplier/divider in Fig. 2, it yields II.A, the output current at z terminal of MO-CDTA is obtained the output current as by I z  I A   I x3 . (3)  p I A IC I out  . (9) Then, the output voltage at z terminal Vz  of MO-CDTA can ID be found to be From (9), it is found that the proposed multiplier/divider still functions as a multiplier/divider. These deviated values effect I x 3 2VT I A Vz    . (4) g m3 I B3 on only output magnitude. Practically, the  p ,  n and  From Fig. 2, it is found that I B1  IC , I B 2   I C and I B3  I D originate from intrinsic resistances and stray capacitances in the MO-CDTA. These errors affect the sensitivity to Thus, the I x1 and I x 2 can be obtained by temperature and high frequency response of the proposed circuit. Consequently, the MO-CDTA should be carefully  I A IC designed to achieve these errors as low as possible. g V if IC  0  if IC  0 I x1   m1 z   ID 0 if IC  0  , (5) IC  0 II. SIMULATION AND EXPERIMENTAL RESULTS 0 if and To prove the performances of the proposed multiplier/ divider circuit, the PSpice simulation program was used for 0 if IC  0 the first examination. The PNP and NPN transistors employed 0 if IC  0  I x2     I A IC in the proposed circuit were simulated by respectively using  g m 2Vz if IC  0  if I C  0 . (6) the parameter of the NR200N and PR200N bipolar transistors  ID of ALA400 transistor array from AT&T [12]. Fig. 3 depicts From (5)-(6), the output current  I out  of the multiplier/divider schematic description of the MO-CDTA used in the simulations. The MO-CDTA was biased with 2V , where IA is displayed as was set to 100  A . The DC transfer characteristic of the I A IC proposed circuit is shown in Fig. 4. I out  I x1  I x 2  . (7) ID The results in transient responses of the multiplier/divider circuit for sinusoidal and triangular inputs are displayed in From (7), it is clearly seen that, if I A and I C are assigned to Fig. 5. be input currents, the proposed circuit serves as a current- © 2011 ACEEE 43 DOI: 01.IJEPE.02.03.17
  • 3. ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011 Figure. 3. Internal Construction of MO-CDTA Figure4. DC transfer characteristic of the proposed multiplier/ divider Figure 5. Transient responses of the proposed multiplier/divider Fig. 7 shows the output signal of the proposed circuit relative to temperature variations from 27C , 50C and 100C . It is clearly seem that the output current is slightly dependent on the temperature variations due to the intrinsic resistances and stray capacitances in the MO-CDTA, as depicted in Section II.C. Figure 6. The output current deviations for different temperature values © 2011 ACEEE 44 DOI: 01.IJEPE.02.03. 17
  • 4. ACEEE Int. J. on Electrical and Power Engineering, Vol. 02, No. 03, Nov 2011 circuit are that: output gain can be adjusted via input bias current; magnitude of output signal is theoretically temperature-insensitive; the proposed multiplier/divider consists of only one MO-CDTA without any passive element, which is appropriate to fabricate in integrated circuit architecture. The performances of the proposed circuit have been also investigated and discussed through PSpice simulation and experimental results. They show that the proposed circuit can function as a current-mode multiplier/ divider for input current range variation from 200  A to 200  A . From simulation results, the maximum power consumption is mW at 2V supply voltages. The maximum error of the amplitude of output current signal due to variations of the temperature from 0-100oC is approximately 0.16% . Figure 7. Practical implementation of the proposed circuit ACKNOWLEDGMENT This work was supported in part by a grant from the Research and Development Institute, Uttaradit Rajabhat University (URU). REFERENCES [1] D. M. W. Leenaerts, G. H. M. Joordens, and J. A. Hegt, “A 3.3V 625kHz switched-current multiplier,” IEEE J. Solid-State Circuits, vol. 31, pp. 1340-1343, Sep. 1996. [2] M. A. Abou El-Atta, M. A. Abou El-Ela, and M.K. El Said, “Four-quadrant current multiplier and its application as a phase- detector,” Proceedings of the Nineteenth National Radio Science Conference (NRSC 2002), pp. 502-508. Mar. 2002. [3] H. Wasaki, Y. Horio, and S. Nakamura, “Current multiplier/ divider circuit,” Electronics Letters, vol. 27, no. 6, pp. 504-506, Mar. 1991. [4] S. Maheshwari, and I. A. Khan, “Current-controlled current differencing buffered amplifier: implementation and applications,” Active and Passive Electronic Components., vol. 4, pp. 219-227, 2004. [5] C. Premont, S. Cattet, R. Grisel, N. Abouchi, J. P. Chante, and D. Renault, “A CMOS multiplier/divider based on current conveyors,” Proceedings of the 1998 IEEE International Symposium on Circuits and Systems., vol. 1, pp. 69-71, 1998. [6] K. Kaewdang, C.Fogsamut and W. Surakampontorn, “A Wide- Band. Current-Mode OTA-Based Analog Multiplier-Divider”, ISCAS’03, vol. 1, pp. I-349 - I-352, 2003. [7] A. Ü. Keskin, “A Four Quadrant Analog Multiplier Employing Single CDBA,” Analog Integrated Circuits and Signal Processing., vol. 40 n.1, pp.99-101, July 2004. [8] C. Toumazou, F. J. Lidgey and D. G. Haigh. Analogue IC design: the current-mode approach, London: Peter Peregrinus, 1990. Figure 8. The experimental results of the proposed circuit [9] H. Schmid, “Why the terms ‘current mode’ and ‘voltage mode’ To validate that the multiplier/divider can operate practically, neither divide nor qualify circuits,” IEEE ISCAS, pp. II-29-II-32, it was constructed using commercial ICs, as shown in Fig. 7. 2002. Figs. 8(a) and (b) show the experimental results of the pro- [10] D. Biolek, “CDTA – Building block for current-mode analog posed circuit. signal processing,” Proceedings of the European conference on circuit theory and design 2003 - ECCTD’03, 2003, pp. 397–400, 2003. CONCLUSIONS [11] D.R. Frey “Log-domain filtering: an approach to current-mode The current-mode multiplier/divider based on the MO- filtering”. IEE Proc. Circuit Devices Syst., vol. 140, pp. 406-416, CDTAs has been presented. The features of the proposed 1993. © 2011 ACEEE 45 DOI: 01.IJEPE.02.03.17