Balancing of four wire loads using linearized H-bridge static synchronous compensators

International Journal of Reconfigurable and Embedded Systems (IJRES)
Vol. 12, No. 3, November 2023, pp. 462~477
ISSN: 2089-4864, DOI: 10.11591/ijres.v12.i3pp462-477  462
Journal homepage: http://ijres.iaescore.com
Balancing of four wire loads using linearized H-bridge static
synchronous compensators
Abdulkareem Mokif Obais1
, Ali Abdulkareem Mukheef2
1
Department of Biomedical Engineering, College of Engineering, University of Babylon, Al-Hillah, Iraq
2
Department of English Language Literature, Almustaqbal University College, Al-Hillah, Iraq
Article Info ABSTRACT
Article history:
Received Jan 28, 2023
Revised Mar 19, 2023
Accepted Apr 3, 2023
In this paper, a load balancing system is designed to balance the secondary
phase currents of 11 kV/380 V, 50 Hz, 100 kVA power transformer in a
three phase 4-wire, distribution network. The load balancing system is built
of six identical modified static synchronous compensators (M-STATCOMs).
Each M-STATCOM is constructed of a voltage source converter-based
H-bridge controlled in capacitive and inductive modes as a linear
compensating susceptance. The M-STATCOM current is controlled by
varying its angle such that it exchanges pure reactive current with the utility
grid. Three identical M-STATCOMs are connected in delta-form to balance
the active phase currents of the power transformer, whereas the other three
identical M-STATCOMs are connected in star-form to compensate for
reactive currents. The M-STATCOMs in the delta-connected compensator
are driven by 380 V line-to-line voltages, whilst, those connected in star-
form are driven by 220 V phase voltages. The results of the 220 V and 380
V M-STATCOMs have exhibited linear and continuous control in capacitive
and inductive regions of operation without steady-state harmonics. The
proposed load balancing system has offered high flexibility during treating
moderate and severe load unbalance conditions. It can involve any load
unbalance within the power transformer current rating and even unbalance
cases beyond the power transformer current rating.
Keywords:
Energy saving
Harmonic reduction
Load balancing
Power quality
Static synchronous
compensators
This is an open access article under the CC BY-SA license.
Corresponding Author:
Abdulkareem Mokif Obais
Department of Biomedical Engineering, College of Engineering, University of Babylon
Al-Hillah City, Babylon Governorate, Iraq
Email: karimobais@yahoo.com
[1]–[10][11]–[20][21]–[26]
1. INTRODUCTION
Static Var compensators (SVCs) and static synchronous compensators (STATCOMs) are usually
exploited in the treatment of many issues concerning power quality like harmonic’s association, voltage
unbalance and unbalanced loads [1]-[26]. Unbalanced loads and poor power factor usually lead to significant
losses in both generation station and transmission system. This may restrict or decrease the capability of
transmission systems. Power transmission efficiency can be increased by reducing losses through power
factor treatment and load compensation techniques [7], [9]. In addition, compensation techniques play
significant roles in the management of other challenging issues facing power quality achievement like
voltage unbalance and harmonic association. Balancing of loads characterized by large fluctuations is of
great importance because it is not economical to supply the required Var from the alternating current (AC)
source and the power system is not capable to maintain its terminal voltage within its desirable range [19].
Load balancing systems are usually built of compensating susceptances to accomplish two main
functions, which are reactive current compensation and balancing of active currents [9], [15], [26]. The

Int J Reconfigurable & Embedded Syst ISSN: 2089-4864 
Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
463
compensating susceptances are required to be linearly controlled in both capacitive and inductive modes in
order to accomplish reliable load current compensation [6], [24]. Distribution STATCOMs are widely used to
apply load compensation for 4-wire systems [2], [7], [25]. Other technologies approached power converter-
based shunt SVCs for achieving minimization of harmonics, current balancing, and voltage compensation
[2], [3], [5], [8], [11], [12], [22]. Separate delta and star-connected susceptances are more efficient in
accomplishing compensation for current and voltage imbalances than lumped systems [1], [3], [4], [7], [9],
[10], [13]-[17], [20]-[23]. Conditions of current imbalance and harmonic issues can be treated using series
compensation systems [14].
In this paper, a load current balancing system built of two static compensators is proposed. Both
compensators are built of linearized H-bridge STATCOMs as compensating susceptances. The first
compensator is built of three identical susceptances connected in delta-form, whereas the second one is built of
another three susceptances connected in star-form. Each susceptance is designed such that it has wide range of
linearity, control continuity, very low operating losses, fast response, and negligible harmonic’s association.
2. LOAD BALANCING OF 4-WIRE SYSTEMS
Two static compensators are required to accomplish current balancing of 4-wire loads [9], [15],
[26]. The first compensator is built using three similar susceptances connected in delta-form, whereas the
second one is built of three identical susceptances connected in star-form. All susceptances are assumed to be
linearly controlled in capacitive and inductive modes [6], [24]. The first compensator is designed to balance
active components of the phase currents, while the second one is dealt with cancelling the reactive current
components. Figure 1 reveals the proposed balancing mechanism of a 4-wire load energized by the balanced
phase voltages VA, VB, and VC. BS1AB, BS1BC, and BS1CA are the susceptances of the delta-connected
compensator, whereas BS2A, BS2B, and BS2C are the susceptances of the star-connected compensator. IS1A, IS1B,
and IS1C are the line currents of delta-connected compensator, whereas IS2A, IS2B, and IS2C are the phase
currents of the star-connected one. ILA, ILB, and ILC represent phase currents of the 4-wire load. IA, IB, and IC
are the AC source phase currents, which are intended to be balanced and in phase with their corresponding
phase voltages.
Figure 1. The power circuit of the proposed load current balancing system
The phase voltages VA, VB, and VC are assumed to be balanced in magnitude and phase; thus, they
can be expressed as:
𝑉𝐴 = 𝑉 (1)
Star-connected compensator
Delta-connected compensator
unbalanced
three-phase
load
Balanced
three-phase
AC
supply
LA
I
LB
I
LC
I
A
I
B
I
C
I
A
S
I 1
B
S
I 1 C
S
I 1 A
S
I 2
B
S
I 2
C
S
I 2
A
V
B
V
C
V
N
N
N
AB
S
jB 1
BC
S
jB 1
CA
S
jB 1
A
S
jB 2
B
S
jB 2 C
S
jB 2
A
Z
B
Z C
Z

 ISSN: 2089-4864
Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
464
𝑉𝐵 = 𝑉𝑒𝑗
−2𝜋
3 (2)
𝑉𝐶 = 𝑉𝑒𝑗
−4𝜋
3 (3)
where, V is the rms magnitude of the balanced phase voltage. The phase currents of the unbalanced load can
be given by:
𝐼𝐿𝐴 = |𝐼𝐿𝐴|𝑒𝑗𝜙𝐿𝐴 = |𝐼𝐿𝐴| 𝑐𝑜𝑠 𝜙𝐿𝐴 + 𝑗|𝐼𝐿𝐴| 𝑠𝑖𝑛 𝜙𝐿𝐴 (4)
𝐼𝐿𝐵 = |𝐼𝐿𝐵|𝑒
𝑗(−
2𝜋
3
+𝜙𝐿𝐵)
= (|𝐼𝐿𝐵| 𝑐𝑜𝑠 𝜙𝐿𝐵 + 𝑗|𝐼𝐿𝐵| 𝑠𝑖𝑛 𝜙𝐿𝐵)𝑒𝑗
−2𝜋
3 (5)
𝐼𝐿𝐶 = |𝐼𝐿𝐶|𝑒
𝑗(−
4𝜋
3
+𝜙𝐿𝐵)
= (|𝐼𝐿𝐶| 𝑐𝑜𝑠 𝜙𝐿𝐶 + 𝑗|𝐼𝐿𝐵| 𝑠𝑖𝑛 𝜙𝐿𝐶)𝑒𝑗
−4𝜋
3 (6)
where, φLA, φLB, and φLC are the load current angles of phases A, B, and C respectively. |ILA|, |ILB|, and |ILC|, are
the rms magnitudes of ILA, ILB, and ILC respectively. According to this work objectives, the AC source
currents IA, IB, and IC should be active and balanced. Thus, they can be defined by:
𝐼𝐴 = 𝐼 (7)
𝐼𝐵 = 𝐼𝑒𝑗
−2𝜋
3 (8)
𝐼𝐶 = 𝐼𝑒𝑗
−4𝜋
3 (9)
where, I is the rms value of each phase current. The real power PL delivered to the load is the same real
power P fed by the AC source. Thus, it can be written (10).
𝑃𝐿 = 𝑉(|𝐼𝐿𝐴| 𝑐𝑜𝑠 𝜙𝐿𝐴 + |𝐼𝐿𝐵| 𝑐𝑜𝑠 𝜙𝐿𝐵 + |𝐼𝐿𝐶| 𝑐𝑜𝑠 𝜙𝐿𝐶) = 𝑃 = 3𝐼 (10)
Therefore, the active I can be equated to (11).
𝐼 =
|𝐼𝐿𝐴| 𝑐𝑜𝑠𝜙𝐿𝐴+|𝐼𝐿𝐵| 𝑐𝑜𝑠𝜙𝐿𝐵+|𝐼𝐿𝐶| 𝑐𝑜𝑠 𝜙𝐿𝐶
3
(11)
The compensating susceptances are equated by [9], [15], [26] as follows:
𝐵𝑆1𝐴𝐵 =
2(|𝐼𝐿𝐴| 𝑐𝑜𝑠 𝜙𝐿𝐴−|𝐼𝐿𝐵| 𝑐𝑜𝑠𝜙𝐿𝐵)
3√3𝑉
(12)
𝐵𝑆1𝐵𝐶 =
2(|𝐼𝐿𝐵| 𝑐𝑜𝑠 𝜙𝐿𝐵−|𝐼𝐿𝐶| 𝑐𝑜𝑠 𝜙𝐿𝐶)
3√3𝑉
(13)
𝐵𝑆1𝐶𝐴 =
2(|𝐼𝐿𝐶|𝑐𝑜𝑠 𝜙𝐿𝐶−|𝐼𝐿𝐴| 𝑐𝑜𝑠 𝜙𝐿𝐴)
3√3𝑉
(14)
𝐵𝑆2𝐴 =
|𝐼𝐿𝐵| 𝑐𝑜𝑠 𝜙𝐿𝐵−|𝐼𝐿𝐶|𝑐𝑜𝑠 𝜙𝐿𝐶−√3|𝐼𝐿𝐴| 𝑠𝑖𝑛 𝜙𝐿𝐴
√3𝑉
(15)
𝐵𝑆2𝐵 =
|𝐼𝐿𝐶|𝑐𝑜𝑠 𝜙𝐿𝐶−|𝐼𝐿𝐴| 𝑐𝑜𝑠𝜙𝐿𝐴−√3|𝐼𝐿𝐵| 𝑠𝑖𝑛 𝜙𝐿𝐵
√3𝑉
(16)
𝐵𝑆2𝐶 =
|𝐼𝐿𝐴| 𝑐𝑜𝑠 𝜙𝐿𝐴−|𝐼𝐿𝐵| 𝑐𝑜𝑠𝜙𝐿𝐵−√3|𝐼𝐿𝐶| 𝑠𝑖𝑛 𝜙𝐿𝐶
√3𝑉
(17)
The values of the above susceptances are polar Quantities. Positive values mean capacitive
susceptances. The negative values refer to inductive susceptances.
2.1. The modified STATCOM (M-STATCOM)
Figure 2 shows the power circuit of the proposed H-bridge STATCOM. It is a voltage source
converter (VSC) based type. In this circuit, the STATCOM reactor LST is partitioned into two identical series

465
reactors LST1 and LST2. The small capacitor CSH is used to reduce the effects of voltage spikes. The
STATCOM DC voltage VDC, which appears across CDC is smoothed by the series filter formed by CF, LF, and
RF. RST1, RST2, and RF are the self or ohmic resistances of the reactors LST1, LST2, and LF, respectively.
The AC source voltage vac is stepped down and shifted by an angle β to produce the modulating
signal vMOD, which is expressed by (18).
𝑣𝑀𝑂𝐷 = 𝐴𝑀𝑂𝐷 𝑠𝑖𝑛(𝜔𝑡 + 𝛽) (18)
Where, AMOD (5V) is its amplitude and ω (2πf) is the angular frequency of the AC source. The angle β is the
STATCOM angle.
Figure 2. The proposed modified STATCOM
The sinusoidal pulse width modulation shown in Figure 3 is used to trigger the proposed
STATCOM. The signal vMOD is compared with a triangular voltage vTRI to produce the triggering signal VZ1 of
the IGBT Z1, whereas –vMOD is compared with vTRI to produce the triggering signal VZ3 of Z3. The voltage vi
shown in Figures 2 and 3 can be given by (19) [24].
𝑣𝑖 =
𝑉𝐷𝐶
5
(𝑉𝑍1 − 𝑉𝑍3) (19)
The fundamental component of vi is v1 and it can be given by (20) [24].
𝑣1 = 𝑚𝑉𝐷𝐶 𝑠𝑖𝑛(𝜔𝑡 + 𝛽) (20)
Where, m represents the modulation index which can be given by (21).
𝑚 =
𝐴𝑀𝑂𝐷
𝐴𝑇𝑅𝐼
(21)
Where, ATRI is the amplitude of vTRI. The STATCOM rms current IS can be given by (22).
𝐼𝑆 =
𝑉𝐴.𝐶−𝑉1∠𝛽
𝑅𝑆𝑇1+𝑗𝜔𝐿𝑆𝑇1+𝑅𝑆𝑇2+𝑗𝜔𝐿𝑆𝑇2
(22)
If the reactances of the STATCOM reactors are very much greater than their ohmic resistances, then
(22) can be approximated to:
𝐼𝑆 =
𝑉𝐴.𝐶−𝑉1∠𝛽
𝑗𝜔𝐿𝑆𝑇1+𝑗𝜔𝐿𝑆𝑇2
(23)

 ISSN: 2089-4864
466
if β is controlled in the range of ±0.1rad, then vac and v1 are approximately in phase and IS is purely reactive.
Negative values of β make V1 greater than VAC and IS will be capacitive, while small positive values of β
make V1 smaller than VAC and subsequently, IS will be inductive.
Figure 3. The STATCOM triggering mechanism
2.2. Design of the 380 V M-STATCOM
The proposed system is required to balance the phase currents at the secondary side of an 11 kV/
380 V power transformer having an apparent power rating of 100 kVA in a 380 V, 50 Hz, 4-wire system. At
the secondary side, the peak value of the phase rated current is 214 A. The consumer power factor is assumed
to be 0.8 lagging as an average value. In this work, the delta-connected compensator is designed to balance
the load active currents when one phase current is zero and the other two phases are running at their rated
currents with unity power factor. According to (11), the active current I of the AC source is 142.67 A (peak
value). If phase C of the load carries the zero current, then according to (12)-(14) the compensating
susceptances are calculated as: BS1AB=0, BS1BC=0.265 Ʊ, and BS1CA=-0.265 Ʊ. In this work, the delta-
connected compensator is built of three identical 380 V, 50 Hz modified STATCOMs. According to the
calculated susceptances, the 380 V modified STATCOM should be designed such that it responds equally to
both capacitive and inductive current demands. The maximum capacitive current is BS1BC×VAC =0.265 Ʊ×537
V=142.67 A (peak value). The maximum inductive current is BS1CA×VCA=-0.265 Ʊ×537 V=142.67 A=-
142.67 A (peak value).
Figure 4 shows the PSpice design of the 380 V modified STATCOM. The controller of the
modulating signal is a built-in library in PSpice [24]. It is denoted by the part “M-STATCOM VMOD
controller”, which is excited by three analog signals. These signals are k4BS, k3VL, and kSiS. The line-to-line
voltage VL is stepped down to 5 V (peak value) to form k3VL, which represents the modulating signal vMOD.
The signal k4BS is proportional to the required 380 V STATCOM susceptance. The susceptance current iS is
detected by the current transformer (CT) and converted to the analog voltage kSiS, which has a maximum
amplitude of 10 V. The signal voltage k4BS governs the STATCOM current iS via shifting vMOD by small
angle β proportional to the required compensating susceptance BS. The generated vMOD is compared with vTRI
in the PSpice part “M-STATCOM TRIGGERING CCT” to produce the triggering signal VZ1 and -vMOD is
compared with vTRI to produce VZ2. The triangular voltage vTRI has an amplitude of 5 V and a carrier
frequency of 2.5 kHz.

467
Figure 4. The 380 V, 50 Hz M-STATCOM
2.3. Design of the 220 V M-STATCOM
The circuit design of the 220 V, 50Hz M-STATCOM is shown in Figure 5. It is similar to the
380 V, 50 Hz M-STATCOM. It is operated by the phase voltage. The capacitive and inductive ratings for this
STATCOM can be calculated by considering an unbalance case occuring during the open circuit of one phase
of a load carrying the rated current with 0.8 lagging power factor. Assumining that phase A is open circuited,
then the real or active current components of phases B and C are 214×0.8=171.2 A (peak value). Note that in
this unbalance case, the power factor angles of phases B and C are φLB=-370
and φLC=-370
, respectively. Their
inductive reactive currents are 214×sinφLB =-0.6×214= -128.4 A (peak value) and 214×sinφLC =-0.6×214= -
128.4 A (peak value). According to these calculated active and reactive current components and (15)-(17),
the calculated susceptances of the star-connected static compensator are BS2A=0, BS2B=0.73 Ʊ, and BS2C=-
0.07945 Ʊ. The maximum capacitive current expected to be provided by the 220 V STATCOM is VB×BS2B
=311 V×0.73 Ʊ=227 A (peak value).
kSiS
+VAC
0
K4BS
3
k4BS
VAC
FREQ = 50Hz
VAMPL = 537V
VOFF = 0
AC = 0
CT
TN33_20_11_2P90
RCT
0.22
0
-VAC
V1
15V
0
0
V2
15V
-15V
+15V
U4
M-STATCOM DRIVING CCT
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
VZ1
VZ3
G1
VZ2
E2
E1
VZ4
E4
E3
G3
VMOD
G2
VZ2
VZ1
G4
VZ4
VZ3
k4BS
k3VL
VTRI
VMOD
kSiS
U1
M-STATCOM VMOD CONTROLLER
K2BS
K3VAC
KSIS
VMOD
U2
M-STATCOM TRIGGERING CCT
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
U3A
AD648A
+
3
-
2
V+
8
V-
4
OUT
1
+15V
-15V
R1
532k
R3
5k
R2
5.1k
R4
5k
0
R6
5.1k
R7
10k
R5
532k
R8
5k
0
0
+VAC
-VAC
k3VL
380V 50Hz M-statcom controlling and driving circuit
RSH
1
380V 50Hz M-statcom power circuit
LST2
1.25mH
1 2
RST2
0.05
VTRI
TD = 0
TF = 199.5us
PW = 1us
PER = 400us
V1 = -5V
TR = 199.5us
V2 = 5V
0
VTRI
LST1
1.25mH
1 2
RST1
0.05
CSH
20uF
Z1
CM300DY-24H
Z4
CM300DY-24H
Z3
CM300DY-24H
Z2
CM300DY-24H
CF
1000uF
LF
2.5mH
1
2
RF
0.05
G1
E1
E4
G4
E3
G3
G2
E2
CDC
1000uF
3
1
3
1
3
1
3
1
S
i

 ISSN: 2089-4864
468
Figure 5. The 220 V, 50 Hz M-STATCOM
2.4. The PSpice design of the proposed load current balancing system
Figure 6 shows the circuit diagram of the proposed load current balancing system for a three-phase
grounded load in 380 V, 50 Hz distribution network. The AC voltages detection circuit and current
transformer used in this system have the same PSpice implementation of those shown in Figures 4 and 5,
except that the resistance values of the AC voltages detection circuit in this system are chosen such that k*3
and k3 are 0.016 and 0.0093, respectively. The delta-connected static compensator is built of three identical
380 V M-STATCOMs. Each STATCOM is capable of supplying a linear reactive cuurent controlled in both
capacitive and inductive modes of operation. The maximum rating of each STATCOM is about ±150 A
(peak value). The star-connected static compensator is built of three identical 220 V M-STATCOMs. Each
STATCOM is capable of supplying a linear reactive cuurent controlled in both capacitive and inductive
modes of operation. The maximum capacitive current rating of each STATCOM is 227 A (peak value).
kSiS
+VAC
0
K5BS
3
k5BS
VAC
FREQ = 50Hz
VAMPL = 311V
VOFF = 0
AC = 0
CT
TN33_20_11_2P90
RCT
0.22
0
-VAC
V1
15V
0
0
V2
15V
+15V -15V
U4
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
VZ3
VZ1
E2
VZ2
G1
VZ4
E1
G3
E3
E4
VZ2
G2
VMOD
G4
VZ1
k5BS
VZ3
VZ4
VMOD
VTRI
k*3VP
kSiS
U1
K2BS
K3VAC
KSIS
VMOD
U2
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
U3A
AD648A
+
3
-
2
V+
8
V-
4
OUT
1
-15V
+15V
R1
306k
R3
5k
R2
5.1k
R4
5k
0
R6
5.1k
R7
10k
R5
306k
R8
5k
0
0
-VAC
+VAC
k*3VP
220V 50Hz M-statcom controlling and driving circuit
220V 50Hz M-statcom power circuit
RSH
1
LST2
1.25mH
1 2
RST2
0.05
VTRI
TD = 0
TF = 199.5us
PW = 1us
PER = 400us
V1 = -5V
TR = 199.5us
V2 = 5V
0
VTRI
LST1
1.25mH
1 2
RST1
0.05
CSH
20uF
Z1
CM300DY-24H
Z4
CM300DY-24H
Z3
CM300DY-24H
Z2
CM300DY-24H
CF
1000uF
LF
2.5mH
1
2
RF
0.05
G1
E1
G4
E4
G3
E3
G2
E2
CDC
1000uF
3
1
3
1
3
1
3
1
S
i

469
Figure 6. Circuit design of the proposed load current balancing system
The computation circuit of this system is shown in Figure 7. In this circuit, the load current signals
are sampled at the positive peaks and negative slope zero-crossing points of their corresponding phase
voltages to obtain the active and reactive components of load phase currents, respectively. The delta-
connected compensator susceptances are computed using (12)-(14), while the star-connected compensator
susceptances are computed by using (15)-(17).
kSiSAB
CTAB
TN33_20_11_2P90
RCTAB
0.22
0
LST2A
1.25mH
1 2
RST2A
0.05
LST1A
1.25mH
1 2
RST1A
0.05
CSHA
20uF
Z1A
CM300DY-24H
Z4A
CM300DY-24H
Z3A
CM300DY-24H
Z2A
CM300DY-24H
CFA
1000uF
LFA
2.5mH
1
2
N
VC
RFA
0.05
G1A
E1A
G4A
RA
1.16
E4A
LA
2.77mH
1 2
G3A
E3A
G2A
RB
1.16
LB
2.77mH
1 2
E2A
RC
1.16
CDCA
1000uF
LC
2.77mH
1 2
R1
0.001
3
1
VB
VA
3
1
R2
0.001
3
1
DAMPING = 0
DELAY = 0
FREQ_HZ = 50Hz
PP_AMPLITUDE = 622V
OFFSET = 0
VB
PHASE = -120
3
1
k5BSA
kSiSA
kSiSA
k*3VA
DAMPING = 0
DELAY = 0
FREQ_HZ = 50Hz
PP_AMPLITUDE = 622V
OFFSET = 0
VC
PHASE = -240
U32
K2BS
K3VAC
KSIS
VMOD VMODA
k*3VB
k5BSB
CTA
TN33_20_11_2P90
kSiSB
k5BSC
VMODB
k*3VC
RCTA
0.22
DAMPING = 0
DELAY = 0
FREQ_HZ = 50Hz
PP_AMPLITUDE = 622V
OFFSET = 0
VA
PHASE = 0
U33
K2BS
K3VAC
KSIS
VMOD
0
VMODC
kSiSC
k1iLA
R3
0.001
U34
K2BS
K3VAC
KSIS
VMOD
VZ3A
VZ2A
VZ1A
VZ4A
k1iLC
k1iLB
VZ1B
VTRI
VMODA
VZ3B
VZ2B
VZ4B
U17
CURRENT TRANSFORMER (LV)
IN OUT
K1I
VMODB
U18
IN OUT
K1I
VZ2C
VZ1C
VTRI
U19
IN OUT
K1I
VZ3C
VMODC
VZ4C
VTRI
0
U37
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
U38
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
U39
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
VZ1BC
VZ3BC
VZ2BC
VTRI
VMODBC
VZ4BC
kSiSBC
k3VBC
k4BSBC
VMODBC
U30
K2BS
K3VAC
KSIS
VMOD
U35
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
VZ2AB
VZ1AB
VMODAB
VZ4AB
VZ3AB
k4BSAB
VTRI
VMODAB
kSiSAB
k3VAB
U29
K2BS
K3VAC
KSIS
VMOD
U28
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
LST2B
1.25mH
1 2
RST2B
0.05
LST1B
1.25mH
1 2
RST1B
0.05
CSHB
20uF
Z1B
CM300DY-24H
Z4B
CM300DY-24H
Z3B
CM300DY-24H
Z2B
CM300DY-24H
CFB
1000uF
LFB
2.5mH
1
2
RFB
0.05
G1B
E1B
G3B
E4B
G4B
E3B
VZ1CA
VZ2CA
G2B
VZ3CA
VMODCA
VZ4CA
VTRI
E2B
kSiSCA
k3VCA
k4BSCA
VMODCA
U31
K2BS
K3VAC
KSIS
VMOD
CDCB
1000uF
U36
VMOD
VTRI
VZ1
VZ2
VZ3
VZ4
3
1
3
1
3
1
3
1
kSiSB
CTB
TN33_20_11_2P90
RCTB
0.22
0
Power system voltage Three-phase load with detection cct.
LST2C
1.25mH
1 2
RST2C
0.05
LST1C
1.25mH
1 2
RST1C
0.05
CSHC
20uF
Z1C
CM300DY-24H
Z4C
CM300DY-24H
Z3C
CM300DY-24H
Z2C
CM300DY-24H
CFC
1000uF
LFC
2.5mH
1
2
RFC
0.05
G1C
E1C
E4C
G4C
G3C
E3C
G2C
R4
0.001
E2C
CDCC
1000uF
R5
0.001
3
1
3
1
3
1
R6
0.001
3
1
R7
0.001
LST2BC
1.25mH
1
2
kSiSC
RST2BC
0.05
R8
0.001
CTC
TN33_20_11_2P90
LST1BC
1.25mH
1
2
R9
0.001
RST1BC
0.05
RCTC
0.22
0
CSHBC
20uF
Z1BC
CM300DY-24H
Z4BC
CM300DY-24H
Z3BC
CM300DY-24H
Z2BC
CM300DY-24H
CFBC
1000uF
LFBC
2.5mH
1
2
RFBC
0.05
k3VCA
k3VBC
k3VAB
G1BC
k*3VB
k*3VA
E1BC
k*3VC
VA
G4BC
E4BC
E3BC
G3BC
VC
VB
U42
AC VOLTAGES DETECTION CCT
VA
VB
VC
K*3VA
K*3VB
K*3VC
K3VAB
K3VBC
K3VCA
G2BC
E2BC
k4BSAB
U44
COMPUTATION CCT
K*3VA
K*3VB
K*3VC
K1ILA
K1ILB
K1ILC
K3VAB
K3VBC
K3VCA
K5BSC
K4BSAB
K4BSBC
K4BSCA
K5BSA
K5BSB
k4BSCA
k4BSBC
CDCBC
1000uF
k5BSA
k5BSC
k5BSB
k3VAB
k*3VC
k3VBC
3
1
k3VCA
3
1
k*3VA
k1iLB
k1iLA
k*3VB
k1iLC
3
1
3
1
VTR
TD = 0
TF = 199.5us
PW = 1us
PER = 400us
V1 = -5V
TR = 199.5us
V2 = 5V
0
VTRI
kSiSBC
CTBC
TN33_20_11_2P90
RCTBC
0.22
RSHA
1
0
RSHB
1
U21
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
VZ1AB
VZ2AB
LST2CA
1.25mH
1
2
VZ3AB
VZ4AB
RST2CA
0.05
LST1CA
1.25mH
1
2
RST1CA
0.05
E1AB
RSHC
1
CSHCA
20uF
Z1CA
CM300DY-24H
Z4CA
CM300DY-24H
E3AB
E2AB
Z3CA
CM300DY-24H
E4AB
Z2CA
CM300DY-24H
CFCA
1000uF
LFCA
2.5mH
1
2
G1AB
RFCA
0.05
G3AB
G2AB
RSHAB
1
G1CA
G4AB
E1CA
G4CA
G3CA
E4CA
E3CA
RSHBC
1
G2CA
E2CA
CDCCA
1000uF
3
1
3
1
RSHCA
1
3
1
3
1
VZ1BC
U22
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
VZ2BC
kSiSCA
VZ4BC
VZ3BC
E3BC
E2BC
E1BC
G1BC
E4BC
CTCA
TN33_20_11_2P90
G4BC
G3BC
G2BC
RCTCA
0.22
0
VZ3CA
VZ2CA
VZ1CA
U23
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
E1CA
VZ4CA
E4CA
E3CA
E2CA
G2CA
G1CA
VZ1A
G4CA
G3CA
U24
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
VZ3A
VZ2A
E1A
VZ4A
E2A
G1A
E4A
E3A
G2A
G4A
G3A
VZ2B
VZ1B
U25
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
E1B
VZ4B
VZ3B
E4B
E3B
E2B
G2B
G1B
VZ1C
G4B
G3B
VZ3C
VZ2C
U26
VZ1
VZ2
VZ3
VZ4
E1
E2
E3
E4
G1
G2
G3
G4
E2C
E1C
VZ4C
E4C
E3C
G3C
G2C
G1C
Delta-connected M-statcoms
G4C
Delta-connected M-statcoms controlling and driving cct. Star-connected M-statcoms controlling and driving cct.
Star-connected M-statcoms
AC voltages detection cct.
Triangular voltage gen.
Computation circuit
LST2AB
1.25mH
1
2
RST2AB
0.05
LST1AB
1.25mH
1
2
RST1AB
0.05
CSHAB
20uF
Z1AB
CM300DY-24H
Z4AB
CM300DY-24H
Z3AB
CM300DY-24H
Z2AB
CM300DY-24H
CFAB
1000uF
LFAB
2.5mH
1
2
RFAB
0.05
G1AB
E1AB
G4AB
E4AB
G3AB
E3AB
G2AB
E2AB
CDCAB
1000uF
3
1
3
1
3
1
3
1
A
i
B
i
C
i
LA
i
LB
i
LC
i
A
S
i 1
B
S
i 1
C
S
i 1
A
S
i 2
B
S
i 2
C
S
i 2

 ISSN: 2089-4864
470
Figure 7. Computation circuit of the load current balancing system
3. RESULTS AND DISCUSSION
The circuits of Figures 4-6 were tested on PSpice to investigate their performances at different
loading conditions. The targeted parameters are STATCOM currents, load phase currents, static
compensators currents, and AC source phase currents. Different unbalance cases are treated by the proposed
balancing system.
3.1. Performance results of 380V M-STATCOM
The 380 V, 50 Hz M-STATCOM shown in Figure 4 was tested on PSpice. The above STATCOM
was tested on PSpice for the investigation of harmonic contents, control continuity, and linearity. The
parameters measured through PSpice tests were the STATCOM current iS, the DC capacitor voltage VDC, and
the AC voltage vL. The basic controlling signal of the compensator is k4BS. Figure 8 shows responses to
maximum demands. Figure 8(a) shows vL, iS, and VDC of the 380 V M-STATCOM during its response to its
U8
max998/mxm
+
3
-
2
V+
7
V-
4
OUT
6
+5V
-5V
R18
5k
R21
2k
0
0
k*3VB
R31
5k
D6
BAW62
0
D5
BAW62
R20
1k
R22
5k
0
U13
max998/mxm
+
3
-
2
V+
7
V-
4
OUT
6
+5V
-5V
R34
5k
R37
2k
0
0
k*3VC
R44
5k
D10
BAW62
0
D9
BAW62
R36
1k
R38
5k
0
U18
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R53
10k
R57
4.5k
+15V
0
-15V
U23
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R66
10k
U19
max998/mxm
+
3
-
2
V+
7
V-
4
OUT
6
R70
4.5k
+5V
0
-5V
+15V
R49
5k
+15V
-15V
R51
2k
-15V
U25
LM675
+
1
-
2
V+
5
V-
3
OUT
4
0
R61
5k
0
R55
5k
R73
5k
D14
BAW62
R72
5k
0
D13
BAW62
R63
5k
0
R52
1k
R54
5k
k1iLA
+
-
+
-
Sbreak
S4
0
0
-15V
+15V
U17
LM675
+
1
-
2
V+
5
V-
3
OUT
4
0
C7
500nF
C8
1uF
0
R56
33
U21
DELAY
DELAY = 5ms
0
D16
BAW62
k*3VA
D15
BAW62
k1iLB
U28
LM675
+
1
-
2
V+
5
V-
3
OUT
4
+
-
+
-
Sbreak
S5
0
R79
10k
+15V
-15V
R82
4.5k
0
U22
LM675
+
1
-
2
V+
5
V-
3
OUT
4
-15V
+15V
+15V
-15V
C9
500nF
0
0
C10
1uF
U30
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R74
5k
0
R69
33
D20
BAW62
R84
5k
D19
BAW62
R83
5k
R75
5k
0
k1iLC
+
-
+
-
Sbreak
S6
+15V
0
-15V
U27
LM675
+
1
-
2
V+
5
V-
3
OUT
4
C11
500nF
0
0
Difference amplifier (2)
C12
1uF
U24
max998/mxm
+
3
-
2
V+
7
V-
4
OUT
6
R85
33
0
D24
BAW62
+5V
-5V
D23
BAW62
R62
5k
R64
2k
0
Sample and hold circuit (5)
0
R68
5k
Difference amplifier (1)
+15V
-15V
D18
BAW62
U3
LM675
+
1
-
2
V+
5
V-
3
OUT
4
0
R1
10.2k
D17
BAW62
R65
1k
R13
3.9k
R67
5k
R12
10.2k
0
R3
3.9k
U26
DELAY
DELAY = 5ms
0
k*3VB
k4BSCA
k4BSBC
k4BSAB
+15V
-15V
U20
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R48
5k
R60
5k
R59
5k
R50
5k
0
U6A
74ACT04
1 2
U6B
74ACT04
3 4
U6C
74ACT04
5 6
U29
max998/mxm
+
3
-
2
V+
7
V-
4
OUT
6
Summing amolifier (2)
+15V
+5V
-15V
U9
LM675
+
1
-
2
V+
5
V-
3
OUT
4
-5V
R76
5k
R17
10.2k
R77
2k
R28
3.9k
0
0
R81
5k
R27
10.2k
D22
BAW62
R19
3.9k
0
0
D21
BAW62
R78
1k
+15V
R80
5k
-15V
U10
LM675
+
1
-
2
V+
5
V-
3
OUT
4
0
R23
15k
U31
DELAY
DELAY = 5ms
k*3VC
R30
10k
R29
10k
0
-15V
+15V
U11
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R24
5k
R32
5k
+15V
0
-15V
U14
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R33
10.2k
R43
3.9k
R42
10.2k
R35
3.9k
0
-15V
+15V
U15
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R39
15k
R46
10k
k1iLA
R45
10k
+15V
0
+
-
+
-
Sbreak
S1
0
-15V
U16
LM675
+
1
-
2
V+
5
V-
3
OUT
4
-15V
+15V
R40
5k
U1
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R47
5k
Zero-crossing detector (2)
Time delayer and zero-detector (2)
Time delayer and zero-detector (1)
0
0
C1
500nF
C2
1uF
0
R11
33
0
D4
BAW62
D3
BAW62
k1iLB
+
-
+
-
Sbreak
S2
0
+15V
-15V
U7
LM675
+
1
-
2
V+
5
V-
3
OUT
4
C3
500nF
0
0
C4
1uF
R26
33
0
D8
BAW62
D7
BAW62
k1iLC
+
-
+
- Sbreak
S3
+15V
0
-15V
U12
LM675
+
1
-
2
V+
5
V-
3
OUT
4
C5
500nF
0
0
C6
1uF
R41
33
0
+5V
0
D12
BAW62
V1
5V
R9
0.001
D11
BAW62
+15V
-15V
U4
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R7
15k
R15
10k
R14
10k
+15V
0
-15V
U5
LM675
+
1
-
2
V+
5
V-
3
OUT
4
R8
5k
R16
5k
0
0
+15V
V3
15V
0
V2
5V
R58
0.001
-5V
R25
0.001
V4
15V
0
-15V
R71
0.001
k5BSB
k5BSA
k5BSC
U2
max998/mxm
+
3
-
2
V+
7
V-
4
OUT
6
-5V
+5V
R2
5k
R5
2k
0
0
k*3VA
R10
5k
D2
BAW62
0
D1
BAW62
R4
1k
R6
5k
0

471
maximum inductive reactive current demand, whereas Figure 8(b) shows vL, iS, and VDC of this STATCOM
during its response to maximum capacitive reactive current demand. These responses corresponded to k4BS of
±6.6 V. 6.6 V corresponds to a capacitive reactive current demand of 150 A (peak value), whereas -6.6V
corresponds to an inductive current demand of -150 A (peak value). The figure states that the response settled
within 5 cycles of the power system fundamental voltage without any harmonic association.
The potency of the M-STATCOM controller is realized during it response to sudden change in
reactive current demand from maximum inductive to maximum capacitive. Figure 9 shows the performance
of the 380 V M-STATCOM during a sudden change in reactive current demand from maximum inductive to
maximum capacitive. The change from inductive to capacitive reactive current demand had occurred at t=200
ms and the STATCOM changed the nature of its current from inductive to capacitive within a time less than
20 ms. It acquired it steady state current within 40 ms since the instant of reactive current demand change.
(a)
(b)
Figure 8. The AC voltage vL, the current iS, and the capacitor DC voltage VDC of the 380V M-STATCOM
during response to maximum (a) inductive reactive current demand and (b) capacitive reactive current
demand
Figure 9. Performance of the 380V M-STATCOM during sudden change in reactive current demand from
maximum inductive to maximum capacitive

 ISSN: 2089-4864
472
Figure 10 shows the current of the 380 V M-STATCOM against reactive current demand. The
linearity the M-STATCOM as a compensating susceptance is verified by the graph of this figure. The graph
is obtained by plotting the actual STATCOM reactive current against current demand.
Figure 10. The 380 V M-STATCOM current against reactive current demand
3.2. Performance results of 220 V M-STATCOM
The circuit diagram of 220 V M-STATCOM shown in Figure 5 was tested on PSpice. The AC
voltage used during PSpice tests was a zero-phase sinusoidal voltage having a frequency of 50 Hz and
amplitude of 311 V (corresponding to an rms value of 220 V). The basic controlling signal of this
STATCOM is k5BS. The linearity of this STATCOM is shown in Figure 11. Overall, Figure 11 verifies the
linearity and continuous control of the 220 V M-STATCOM as a compensating susceptance in capacitive and
inductive modes of operation.
Figure 11. 220 V M-STATCOM current against reactive current demand
3.3. Performance results of the proposed load current balancing system
This system shown in Figure 6 was investigated under different unbalance conditions. The basic
parameters measured were the AC source voltages vA, vB, and vC; the AC source currents iA, iB, and iC; the
load currents iLA, iLB, and iLC; first compensator currents iS1A, iS1B, and iS1C; second compensator currents iS2A,
iS2B, and iS2C. Figure 12 shows the treatment of a load unbalance resulted from the disconnection of one phase
of a balanced three-phase rated load at 0.8 lagging power factor.

473
Figure 12. Load balancing system treatment to a load unbalance resulted from the disconnection of one phase
of a balanced three-phase rated load at 0.8 lagging power factor
The treatment of the above unbalance condition had resulted in balanced real currents drawn from
the AC source (power transformer). Figure 13 shows the treatment of a load unbalance in which one of the
phase currents of an unbalanced three-phase load was exceeding the power transformer rated current. The
Time
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
V(VA:PVS) V(VB:PVS) V(VC:PVS)
-450V
0V
450V
Time
I(LA) I(LB) I(LC)
-300A
0A
300A
Time
I(R4) I(R6) I(R8)
-300A
0A
300A
Time
I(R5) I(R7) I(R9)
-300A
0A
300A
Time
I(R1) I(R2) I(R3)
-300A
0A
300A
A
v B
v C
v
LA
i
LB
i LC
i
A
S
i 1
B
S
i 1
C
S
i 1
A
S
i 2 C
S
i 2
B
S
i 2
A
i B
i C
i

 ISSN: 2089-4864
474
treatment of this load unbalance had resulted in driving the phase currents of the power transformer below
their rating values as balanced real currents associated with significant reductions in their magnitudes.
Figure 13. Load balancing system treatment to a load unbalance in which one phase current was exceeding
the power transformer rating
Time
200ms 210ms 220ms 230ms 240ms 250ms 260ms
-450V
0V
450V
Time
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(LA) I(LB) I(LC)
-300A
0A
300A
Time
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(R4) I(R6) I(R8)
-300A
0A
300A
Time
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(R5) I(R7) I(R9)
-300A
0A
300A
Time
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(R1) I(R2) I(R3)
-300A
0A
300A
A
v B
v C
v
LA
i LB
i
LC
i
A
S
i 1
B
S
i 1 C
S
i 1
A
S
i 2
C
S
i 2
B
S
i 2
A
i B
i C
i

475
Figure 14 shows the treatment a load unbalance in which all the phase currents of an unbalanced
three-phase load were exceeding the power transformer current rating. The treatment had driven all the phase
currents drawn from the power transformer below their rated values as balanced real currents. This load
unbalance was due a somewhat significant phase unbalance.
Figure 14. Load balancing system treatment to a load unbalance in which all the phase currents were
exceeding the power transformer rating
Time
-450V
0V
450V
Time
I(LA) I(LB) I(LC)
-400A
0A
400A
Time
I(R4) I(R6) I(R8)
-400A
0A
400A
Time
I(R1) I(R2) I(R3)
-400A
0A
400A
Time
I(R5) I(R7) I(R9)
-400A
0A
400A
A
v B
v C
v
LA
i LB
i
LC
i
A
S
i 1
B
S
i 1 C
S
i 1
A
S
i 2 C
S
i 2 B
S
i 2
A
i B
i C
i

 ISSN: 2089-4864
476
4. CONCLUSION
In this work, a load balancing system is designed to balance the phase currents of a three-phase, 380
V, 50 Hz, 100 kVA power transformer in 4-wire distribution network using six identical linearized H-bridge
STATCOMs. These STATCOMs are exploited as continuously and linearly controlled compensating
susceptances in both capacitive and inductive modes. They are controlled in such a manner that they never
lose synchronization with grid. The performance results of the 220 V and 380 V M-STATCOMs have
revealed the potency of their linearities and control continuities. Each M-STATCOM approximately sticks to
steady-state reactive current demand within a period of less 5 cycle of the power system network
fundamental. In addition, it satisfies the reactive current demand despite the AC voltage status (below or
above its rated value). The steady-state portion of the STATCOM reactive current exhibits pure sinusoidal
envelope, which certifies the the absence of harmonic’s association. The proposed load balancing system had
reflected high flexibility during managing different load unbalances. It can involve any load unbalance within
or below the power transformer current rating which was designed for compensating its phase currents. In
addition, the system showed efficient performance during treating unbalance cases beyond the power
transformer current rating. It showed excellent performance in comparison with other four-wire load
compensation systems.
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BIOGRAPHIES OF AUTHORS
Abdulkareem Mokif Obais was born in Iraq in 1960. He received his B.Sc. and
M.Sc. degrees in Electrical Engineering from the University of Baghdad, Baghdad, Iraq, in
1982 and 1987, respectively. He received his Ph.D. degree in Electrical Engineering from
Universiti Tenaga Nasional, Kajang, Malaysia in 2013. He is interested in electronic circuit’s
design and power electronics. He had supervised and examined a number of postgraduate
students. He had published many papers in Iraqi academic and international journals. Dr. Obais
was promoted to Professor at University of Babylon in April 2008. He can be contacted at
email: karimobais@yahoo.com and eng.abdul.kareem@uobabylon.edu.iq.
Ali Abdulkareem Mukheef was born in Iraq in 1995. He received his B.Sc. and
M.Sc. degrees from University of Babylon, Iraq in 2016 and 2020, respectively. He is one of
the Academic Staff of Almustaqbal University College, Babylon, Iraq. Presently, he is a Ph.D.
student at University of Babylon, Babylon, Iraq. He can be contacted at email:
ali.abdulkreem@mustaqbal-college.edu.iq.

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