Cad for vlsi design june2013 (3)
Compiler-driven simulation overcomes issues with gate-level simulation models by compiling a hardware description language (HDL) description of a design directly into an executable simulation model. It differs from event-driven simulation which models the propagation of signals in a circuit over time. The document also asks about the transformation involved in reducing an ordered binary decision diagram (OBDD) into a reduced ordered binary decision diagram (ROBDD) and implementing/constructing an ROBDD. It further inquires about problems investigated in high-level synthesis optimization and describes a simple mobility-based scheduling algorithm with pseudo-code. Finally, it asks about how interval and circular-arc graph coloring performs assignment using a sample of circular arcs and how an input algorithm
Cad for vlsi design june2013 (3)
- 1. 14.. (a) What; is compiler driven simulation? How does it overcome the issues raised by gate level simulation models? Differentiate it from everit-drrven simulation. Or . (b) Vrite down the transformation involved in the side reduction of an OBDD into ROBDD. Also implement and construct ROBDD. 15. (a) (i) Mention the problems investigated in optimization of function at high level synthesis. (6) (ii) What is simple mobility based scheduling algorithm? Support your answer with a pseudo code. Explain. (10) Or (h) (i) How does the interval and circular-arc graph coloring method perform the assignment? Discuss with a sample set of circular arcs.(12) (ii) How does an input algorithm represent the internal hardware synthesis? (4) 3 71871