Co question 2006

GANDH INSTITUTE FOR EDUCATION & TECHNOLOGY
FIFT SEMESTER EXAMINATION-2006
COMPUTER ARCHITECTURE & ORGANIZATION
FULL MARK: 70 TIME: - 3HOURS
Prepared by Asst.Prof. Santosh Kumar Rath (CSE DEPARTMENT) Page 1
Answer Question No.1 which is compulsory and any five from the rest.
The figure in the right hand margin indicates 2*10=20
1. Answer the following question:
i) How logical address is different from physical address.
Ans: Physical address: Physical address is the actual memory address which denotes a memory
area in your storage device.
Logical address: The operating system or some other programs uses base addresses as a measure
to find addresses. Here base address means starting address of a memory block. According to the
program written the CPU generates a address. This address is added with the base address so that
it forms the physical address. Here in this case the address generated by the CPU is called as
Logical Address. Explain how a ROM is also a RAM.
ii) Explain how a ROM is a RAM?
Ans: RAM - Is memory that can be both written to and read at anytime during processing.
ROM - Is Random Access Memory which can be anything from CD's that have been used that
aren't writable. OR chips that are meant only for storing data PERMANENTLY. Basicly
anything that holds digital data permantently and can no longer be written to.
iii) Define the term memory latency.
Ans: "Latency" in computer terms is how long it takes to get a request back. It's the flip side of the coin
from "bandwidth", which is how fast the data flows.
iv) What is difference between EPROM and EEPROM?
Ans: Erasable Programmable Read Only Memory (EPROM) Chips the information stored in an EPROM
chip can be erased by exposing the chip to strong UV light. EPROM chips are easily recognized by the
small quartz window used for erasure. Once erased the chip can be re-programmed. EPROM is more
expensive to buy per unit cost, but can prove cheaper in the long run for some applications. For example
if PROM was used for firmware that needed upgraded every 6 months or so - it could prove quite
expensive buying new chips!
Electronically Erasable Programmable Read Only Memory: This has the added advantage that the
information stored can be re-written in blocks and hence can be used to store system settings that the
user may want to change periodically. This solid state memory has considerably reduced in price over
recent years and is nowadays commonly used to store system settings such as BIOS settings.

v) How a write through cache differ from write back cache?
Ans: A type of cache with the following feature: when changes are made to cached data, they are not
simultaneously made to the original data as well. Instead, the changed data is marked, and the original
data is updated when the chached data is deallocated. In a write-through cache, by contrast changes
made to cached data are simultaneously made in the original copy. A write-back cache can perform
more quickly than a write-through cache. But in some contexts, differences between cached and original
data could lead to problems, and write-through caches must be used
vi) Define Control word
Ans: The combination of control steps used for the generation of control signals is a control word. A
control word is a word whose individual bits represent the various control signals. In computing, word is
a term for the natural unit of data used by a particular processor design. A word is basically a fixed sized
group of bits that are handled as a unit by the instruction set and/or hardware of the processor. The
number of bits in a word (the word size, word width, or word length) is an important characteristic of a
specific processor design or computer architecture.
vii) Define the term memory access time:
Ans: The time required by a processor to access data or to write data from and to memory chip is
referred as access time.
viii) Differentiate between system software and application software:
Ans: System software performs tasks like transferring data from memory to disk, or rendering text onto
a display device. Specific kinds of system software include loading programs, operating systems, device
drivers, programming tools, compilers, assemblers, linkers, and utility software.
Application software are designed to perform specific data processing or computational tasks for the
user. These programs are specifically designed to meet end-user requirements. (e.g: spreadsheets, word
processors, media players and database applications).
ix) Differentiate between byte address and word addressable computer.
Ans: A byte is a memory unit for storage and a memory chip is full of such bytes. Memory units
are addressable. That is the only way we can use memory. In reality memory is only byte
addressable. It means a binary address always points to a single byte only. A word is just a group
of bytes – 2, 4, 8 depending upon the data bus size of the CPU.
Word no 2 means bytes 4, 5, 6, 7 for 32 bit machine. In reality physical memory is byte
addressable only. So there is trick to handle 'word addressing'.
When MAR is placed on the address bus, its 32 bits do not map onto the 32 address lines 0-31

respectively. Instead, MAR bit 0 is wired to address bus line 2, MAR bit 1 is wired to address
bus line 3 and so on. The upper 2 bits of MAR are discarded since they are only needed for word
addresses above 2^32 none of which are legal for our 32 bit machine.
2.a) what are the different functional unit present in a digital computer. Briefly explain the function of
each unit.
Ans: FUNCTIONAL UNITS
In order to carry out the operations mentioned in the previous section the computer allocates the
task between its various functional units. The computer system is divided into three separate
units for its operation. They are
1) arithmetic logical unit
2) control unit.
3) central processing unit.
Arithmetic Logical Unit (ALU) Logical Unit
Logical Unit :After you enter data through the input device it is stored in the primary storage
unit. The actual processing of the data and instruction are performed by Arithmetic Logical Unit.
The major operations performed by the ALU are addition, subtraction, multiplication, division,
logic and comparison. Data is transferred to ALU from storage unit when required. After
processing the output is returned back to storage unit for further processing or getting stored.
Control Unit (CU) The next component of computer is the Control Unit, which acts like the
supervisor seeing that things are done in proper fashion. Control Unit is responsible for co
ordinating various operations using time signal. The control unit determines the sequence in
which computer programs and instructions are executed. Things like processing of programs
stored in the main memory, interpretation of the instructions and issuing of signals for other units
of the computer to execute them. It also acts as a switch board operator when several users
access the computer simultaneously. Thereby it coordinates the activities of computer’s
peripheral equipment as they perform the input and output.
Central Processing Unit (CPU) The ALU and the CU of a computer system are jointly known
as the central processing unit. You may call CPU as the brain of any computer system. It is just
like brain that takes all major decisions, makes all sorts of calculations and directs different parts
of the computer functions by activating and controlling the operations.

3.a) how SDRAM is different from DDRSDRAM
Ans: SDRAM has typically less demands on power, is simpler in structure and fast. It's suitable for
simple, everyday electronic devices within larger products - washing machines, stereos, cars, etc. It's
also good for peripheral support in computers but not ideal for the main processors. Essentially, it's
good for quick, simple tasks;
* DDR RAM is more complex and sophisticated, and better-suited for the main processors in computers.
Essentially, it's good for complex tasks with high demands on processing and control.
b)
4. Set Associative mapping scheme combines the simplicity of direct mapping with the flexibility of Fully
Associative mapping. It is more practical than Fully Associative mapping because the associative portion
is limited to just a few slots that make up a set.
In this mapping mechanism, the cache memory is divided into 'v' sets, each consisting of 'n' cache lines.
A block from Main memory is first mapped onto a specific cache set, and then it can be placed anywhere
within that set. This type of mapping has very efficient ratio between implementation and efficiency.
The set is usually chosen by
Cache set number = (Main memory block number) MOD (Number of sets in the cache memory)
If there are 'n' cache lines in a set, the cache placement is called n-way set associative i.e. if there are
two blocks or cache lines per set, then it is a 2-way set associative cache mapping and four blocks or
cache lines per set, then it is a 4-way set associative cache mapping.
Let us assume we have a Main Memory of size 4GB (232
), with each byte directly addressable by a 32-bit
address. We will divide Main memory into blocks of each 32 bytes (25
). Thus there are 128M (i.e. 232
/25
=
227
) blocks in Main memory.
We have a Cache memory of 512KB (i.e. 219
), divided into blocks of each 32 bytes (25
). Thus there are
16K (i.e. 219
/25
= 214
) blocks also known as Cache slots or Cache lines in cache memory. It is clear from
above numbers that there are more Main memory blocks than Cache slots.
5. Illustrate Booth process multiplication with an example.

Example of Booth’s Algorithm
6. Explain with an example how to design the hardwired control unit of a processor.
Ans: Hardwired control is a control mechanism to generate control signals by using appropriate
finite state machine (FSM). Microprogrammed control is a control mechanism to generate
control signals by using a memory called control storage (CS), which contains the control
signals. Although microprogrammed control seems to be advantageous to CISC machines, since
CISC requires systematic development of sophisticated control signals, there is no intrinsic
difference between these 2 control mechanisms.

b) A Micro-programmed Control Unit
As we have seen, the controller causes instructions to be executed by issuing a specific set of
control signals at each beat of the system clock. Each set of control signals issued causes one
basic operation (micro-operation), such as a register transfer, to occur within the data path
section of the computer. In the case of a hard-wired control unit the control matrix is responsible
for sending out the required sequence of signals.
An alternative way of generating the control signals is that of micro-programmed control. In
order to understand this method it is convenient to think of sets of control signals that cause
specific micro-operations to occur as being "microinstructions" that could be stored in a memory.
Each bit of a microinstruction might correspond to one control signal. If the bit is set it means
that the control signal will be active; if cleared the signal will be inactive. Sequences of
microinstructions could be stored in an internal "control" memory. Execution of a machine
language instruction could then be caused by fetching the proper sequence of microinstructions
from the control memory and sending them out to the data path section of the computer. A
sequence of microinstructions that implements an instruction on the external computer is known
as a micro-routine. The instruction set of the computer is thus determined by the set of micro-
routines, the "microprogram," stored in the controller's memory. The control unit of a
microprogram-controlled computer is essentially a computer within a computer.

7.a) Explain the wilkes model of micro programmed control unit.
Ans: Micro-programmed Control
 Use sequences of instructions (see earlier notes) to control complex operations
 Called micro-programming or firmware
• All the control unit does is generate a set of control signals
• Each control signal is on or off
• Represent each control signal by a bit
• Have a control word for each micro-operation
• Have a sequence of control words for each machine code instruction
• Add an address to specify the next micro-instruction, depending on conditions
Micro-instruction Types
• Each micro-instruction specifies single (or few) micro-operations to be performed
— (vertical micro-programming)
• Each micro-instruction specifies many different micro-operations to be performed in parallel

— (horizontal micro-programming)
Vertical Micro-programming
• Width is narrow
• n control signals encoded into log2 n bits
• Limited ability to express parallelism
• Considerable encoding of control information requires external memory word decoder to
identify the exact control line being manipulated
Horizontal Micro-programming
• Wide memory word
• High degree of parallel operations possible
• Little encoding of control information
8.a) Show the register organization of 8085 microprocessor.
Register organization of 8085 microprocessor.
The Status Flags of the 8080 and 8085 are single bits which indicate the logical conditions that existed as
a result of the execution of the instruction just completed. This allows instructions following to act
accordingly, such as a branch as a result of two values comparing equal. The flags are:
ZERO FLAG: This flag is set to a 1 by the instruction just ending if the A Register contains a result of all
0’s. Besides the obvious mathematical applications, this is useful in determining equality in a compare
operation (a value subtracted from a second value with an answer of 0), or in logical AND or OR
operations where the result left the A Register with no bit set to a 1 (the AND was not satisfied). If any
bits were left set to a 1 in the A Register, the flag will be reset to a 0 condition.

SIGN FLAG: This flag is set to a 1 by the instruction just ending if the leftmost, or highest order, bit of the
A Register is set to a 1. The leftmost bit of a byte in signed arithmetic is the sign bit, and will be 0 if the
value in the lower seven bits is positive, and 1 if the value is negative.
PARITY FLAG: This flag is set to a 1 by the instruction just ending if the A Register is left with an even
number of bits set on, i.e., in even parity. If the number of bits in the A Register is odd, the bit is left off.
This may be useful in I/O operations with serial devices, or anyplace that error checking is to be done.
CARRY FLAG: This flag is set to a 1 by the instruction just ending if a carry out of the leftmost bit
occurred during the execution of the instruction. An example would be the addition of two 8-bit
numbers whose sum was 9 bits long. The 9th bit would be lost, yielding an erroneous answer if the carry
bit was not captured and held by this flag. This flag is also set if a borrow occurred during a subtraction.
AUXILIARY CARRY FLAG: This flag is set to a 1 by the instruction just ending if a carry occurred from bit 3
to bit 4 of the A Register during the instruction’s execution. Because of the relationships of decimal in
pure BCD to hexadecimal coding, it is possible to bring BCD values directly into the A Register and
perform mathematical operations on them. The result, however, will be as if two hex characters are
being processed. If the result must be returned to the program as BCD rather than as hex, the Decimal
Adjust Accumulator (DAA) instruction can make that translation; the Auxiliary Carry Flag is provided to
assist in this operation.
b) Explain the different addressing modes available in 8085 microprocessor.
 Every instruction of a program has to operate on a data.
 The method of specifying the data to be operated by the instruction is called Addressing.
 The 8085 has the following 5 different types of addressing.
1. Immediate Addressing
2. Direct Addressing
3. Register Addressing
4. Register Indirect Addressing
5. Implied Addressing
1. Immediate Addressing:
 In immediate addressing mode, the data is specified in the instruction itself. The data will be a
part of the program instruction.
 EX. MVI B, 3EH - Move the data 3EH given in the instruction to B register; LXI SP, 2700H.
2. Direct Addressing:
 In direct addressing mode, the address of the data is specified in the instruction. The data will be
in memory. In this addressing mode, the program instructions and data can be stored in
different memory.

 EX. LDA 1050H - Load the data available in memory location 1050H in to accumulator; SHLD
3000H
3. Register Addressing:
 In register addressing mode, the instruction specifies the name of the register in which the data
is available.
 EX. MOV A, B - Move the content of B register to A register; SPHL; ADD C.
4. Register Indirect Addressing:
 In register indirect addressing mode, the instruction specifies the name of the register in which
the address of the data is available. Here the data will be in memory and the address will be in
the register pair.
 EX. MOV A, M - The memory data addressed by H L pair is moved to A register. LDAX B.
5. Implied Addressing:
 In implied addressing mode, the instruction itself specifies the data to be operated.
 EX. CMA - Complement the content of accumulator; RAL

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