Compiler Design_Code generation techniques.pptx

Prof. R.A. Deshmukh
Code generation

Issues in Code Generation
Input to Code Generator
Output of Code Generator
Memory Management
Instruction Selection
Register Allocation
Evaluation Order
Approaches to code generation

The Target Machine
registers, R0 … Rn-1
op source,destination
in which op is an op-code, and source and destination are data fields It has
the following op-codes (among others) :
MOV (move source to destination)
ADD (add source to destination)
SUB (subtract source from destination)

Mode Form Address Added cost
Absolute M M 1
Register R R 0
Indexed c ( R) c + contents( R) 1
indirect register *R contents( R) 0
indirect indexed * c ( R) contents(c+contents(R )) 1
immediate #c c 1
MOV R0, M
MOV 4(R0), M
stores the value
contents (4 + contents (R0))
into memory location M.
MOV *4(R0), M
stores the value
contents (contents (4 + contents (R0)))
into memory location M.

1. MOV b, R0
ADD c, R0 cost = 6
MOV R0, a
2. MOV b, a
ADD c, a cost = 6
Assuming R0, R1, and R2 contain the addresses of a, b, and c, respec
tively, we can
use :
3. MOV *R1, *R0
ADD * R1, *R0
Assuming R1 and R2 contain the values of b and c, respectively, and that the value of b
is not needed after the assignment, we can use :
4. ADD R2, R1
MOV R1, a cost = 3

Basic Blocks
 Basic block is a sequence of consecutive statements in which flow of control
enters at the beginning and leaves at the end without any branching.
 Basic block always ends at a branch or at end of code.
 Partitioning Algorithm
 Input : A sequence of 3-address statements
 Output : A list of basic blocks
 1. Determine the set of leaders, the first statement in a basic block.
 a. The first statement in a program is a leader.
 b. Any statement that is the target of a conditional or
unconditional jump is a leader (can’t branch into the middle of a basic
block).
 c. Any statement that immediately follows a conditional or
unconditional jump is a leader
 2. For each leader, its basic block consists of the leader and all statements
up to, but not including, the next leader or the end of the program.

Optimizations on basic block
 Common subexpression elimination
a = b + c
b = a – d
c = b + c
d = a – d
 After common subexpression elimination
a : = b + c
b : = a – d
c : = b + c
d : = b
t1 : = b * c
t2 : = a – t1
t3 : = b * c
t4 : = t2 + t3
t1 : = b * c
t2 : = a – t1
t4 : = t2 + t1

 Dead-code elimination.Suppose x is dead, that is, never
subsequently used, at the point where the statement x := y + z
appears in a basic block.Then this statement may be safely removed
without changing the value of the basic block.
 Renaming temporary variables.Suppose we have a statement t :=
b+c, where t is a temporary. If we change this statement to u : = b+c,
where u is a new temporary variable, and change all uses of this
instance of t to u, then the value of the basic block is not changed.

Interchange of statements.Suppose we have a block with the two adja
cent statements
t1 : = b + c
t2 : = x + y
Then we can interchange the two statements without affecting the value of the block if
and only if neither x nor y is t1 and neither b nor c is t2.
AlgebraicTransformations
Countless algebraic transformations can be used to change the set of expres
sions
computed by a basic block into an algebraically equivalent set.The use
ful ones are those
that simplify expressions or replace expensive operations by cheaper ones. For
example, statements such as
x = x + 0;
y = 1 * y;

Flow Graphs
 A control flow graph (CFG) is a directed graph with basic blocks Bi as
vertices and with edges Bi → Bj iff Bj can be executed immediately after Bi.
 There will be a directed edge from B1 to B2 if either of the following two
conditions are satisfied:
 1. There is a conditional or unconditional jump from B1 to B2
 2. B2 immediately follows B1 and B2 does not have an unconditional
jump
 Suppose the CFG has an edge B1→B2
 Basic block B1 is a predecessor of B2
 Basic block B2 is a successor of B1

C Program 3 address code
int i, prod, a [20], b [20];
…
Prod = 0;
i = 0;
do {
prod = prod + a [i] * b [i];
i++;
} while (i < 20);
(1) prod : = 0
(2) i : = 0
(3) t1 : = 4 * i
(4) t2 : = a [t1]
(5) t3 : = 4 * i
(6) t4 : = b [t3]
(7) t5 : = t2 * t4
(8) t6 : = prod + t5
(9) prod : = t6
(10) t7 : = i + 1
(11) i : = t7
(12) if I < 20 goto (3)

Basic blocks Control flow graph
(1) prod : = 0 B1
(2) i : = 0
(3) t1 : = 4 * I B2
(4) t2 : = a [t1]
(5) t3 : = 4 * i
(6) t4 : = b [t3]
(7) t5 : = t2 * t4
(8) t6 : = prod + t5
(9) prod : = t6
(10) t7 : = i + 1
(11) i : = t7
(12) if i < 20 goto (3)

Next-use Information
 Next-use is computed by a backward scan of a basic block and
performing the following actions on statement.
 i: x := y op z
 Add liveness/next-use info on x, y, and z to statement i
 Set x to “not live” and “no next use”
 Set y and z to “live” and the next uses of y and z to i

A Simple Code Generator
 Generates target code for a sequence of three-address statements using next-use
information
 Uses new function getreg to assign registers to variables
 Computed results are kept in registers as long as possible, which means :
 Result is needed in another computation
 Register is kept up to a procedure call or end of block
 Checks if operands to three-address code are available in registers
 Register and Address Descriptors :
 A register descriptor keeps track of what is currently stored in a register at a
particular point in the code, e.g. a local variable, argument, global variable, etc.
 MOV a,R0 “R0 contains a”
 An address descriptor keeps track of the location where the current value of
the name can be found at run time, e.g. a register, stack location, memory
address, etc.
 MOV a, R0
 MOV R0,R1 “a in R0 and R1”

A Code-generation Algorithm
 For each three-address statement of the form x := y op z we perform the following actions:
 1. Invoke a function getreg to determine the location L where the result of the
computation y op z should be stored. L will usually be a register, but it could also be a
memory location.
 2. Consult the address descriptor for y to determine y', (one of) the current location(s)
of y. Prefer the register for y' if the value of y is currently both in memory and a register. If
the value of y is not already in L, gen
erate the instruction MOV y' ,L to place a copy of y in
L.
 3. Generate the instruction OP z',L where z' is a current location of z.Again, prefer a
register to a memory location if z is in both. Update the address descriptor of x to indicate
that x is in location L. If L is a regis
ter, update its descriptor to indicate that it contains the
value of x, and remove x from all other register descriptors.
 4. If the current values of y and/or z have no next uses, are not live on exit from the
block, and are in registers, alter the register descriptor to indi
cate that, after execution of
x := y op z, those registers no longer will contain y and/or z, respectively.

The Function getreg
 The function getreg returns the location L to hold the value of x for the assignment
x : = y op z.
 1. If the name y is in a register that holds the value of no other names (recall that
copy instructions such as x : = y could cause a register to hold the value of two or more
variables simultaneously), and y is not live and has no next use after execution of x : = y
op z, then return the register of y for L. Update the address descriptor of y to indicate
that y is no longer in L.
 2. Failing (1), return an empty register for L if there is one.
 3. Failing (2), if x has a next use in the block, or op is an operator, such as indexing, that
requires a register, find an occupied register R. Store the value of R into a memory
location (by MOV R, M) if it is not already in the proper memory location M, update the
address descriptor for M, and return R. If R holds the value of several variables, a MOV
instruction must be generated for each variable that needs to be stored.
 4. If x is not used in the block, or no suitable occupied register can be found, select the
memory location of x as L.

d = (a-b) + (a-c) + (a-c)
three address code for above code is
t = a – b
u = a – c
v = t + u
d = v + u
Statements Code Generated Register Descriptor Address Descriptor
t := a - b MOV a, R0
SUB b, R0
Registers empty
R0 contains t
t in R0
u := a - c MOV a,R1
SUB c,R1
R0 contains t
R1 contains u
t in R0
u in R1
v := t + u ADD R1,R0 R0 contains v
R1 contains u
u in R1
v in R0
d := v + u ADD R1,R0
MOV R0,d
R0 contains d d in R0
d in R0 and memory

 Generating code for other type of statements :
 The following table shows the code sequences generated for the indexed
assignment statements a := b[i] and a[i] := b, assuming b is statically
allocated.
Stateme
nt
i in register Ri i in memory Mi i in stack
CODE COST CODE COST CODE COS
T
a = b[i] MOV b(Ri),R 2 MOV Mi, R
MOV b( R), R
4 MOV Si(A), R
MOV b(R ), R
4
a[i] = b MOV b, a(Ri) 3 MOV Mi, R
MOV b, a( R)
5 MOV Si(A), R
MOV b,a(R ) 5

The following table shows the code sequences generated for the pointer
assignments
a : = *p and *p := a.
Here, the current location of p deter
mines the code sequence.
Statement p in register Rp p in memory Mp p in stack
CODE COST CODE COST CODE COST
a = *p MOV *Rp,a 2 MOV Mp, R
MOV * R, R
3 MOV Sp(A),R
MOV *R, R
3
*p = a MOV b, *Rp 2 MOV Mp, R
MOV a, *R
4 MOV a, R
MOV R,*Sp(R )
4

Conditional statements :
One way is to branch if the value of a designated register meets one of the six conditions: negative,zero,
positive, nonnegative, nonzero, and nonpositive.
A second approach, common to many machines, uses a set of condition codes to indicate whether the
last quantity computed or loaded into a register is negative, zero, or positive.
That is, CMP x,y sets the condition code to positive if x>y, and so on.A conditional-jump machine
instruction makes the jump if a designated condition <,=,>,£ ,≠ ,or ≥ is met.We use the instruction
CJ<= z to mean "jump to z if the condition code is negative or zero
For example, if x<y goto z could be implemented by
CMP x, y
CJ< z
Example :
x : = y + z
if x < 0 goto z
by
MOV y, RO
ADD z, RO
MOV RO, x
CJ< Z

Register Allocation and Assignment
 Goals :
 place frequently accessed values in registers.
 reduce (minimize?) memory accesses.
 Levels of Register Allocation :
 Expression level : use Sethi-Ullman numbering to determine
evaluation order for expressions.
 Local allocation : register allocation limited in scope to individual
basic blocks.
 Global allocation : register allocation over an entire function;
generally based on graph coloring.

Global allocation
 The code-generation algorithm :registers to hold values for the
duration of a single basic block. However, all live variables were
stored at the end of each block.
 To save some of these stores and corresponding loads, we might
arrange to assign registers to frequently used variables and keep these
registers consistent across block boundaries(globally).
 Since programs spend most of their time in inner loops, a natural
approach to global register assignment is to try to keep a frequently
used value in a fixed register throughout a loop.
 One strategy for global register allocation is to assign some fixed
number of registers to hold the most active values in each inner loop.

Usage counts
 we count a savings of one for each use of x in loop L that is not preceded
by an assignment to x in the same block.
 if x is allocated a regis
ter, count a savings of two for each block of L for
which x is live on exit and in which x is assigned a value.
 On the debit,side, if x is live on entry to the loop header, we must load x
into its register just before entering loop L.This load costs two units.
 Simi
larly, for each exit block B of loop L at which x is live on entry to
some suc
cessor of B outside of L,we must store x at a cost of two.
 Thus an approximate formula for the benefit to be realized from
allocating a register to x within loop L is :
 ∑BεL ( use(x, B) + 2 live(x, B) )

The values of for b, c, d,
e, and f are 6, 3, 6, 4,
and 4, respectively.

The DAG Representation of Basic Blocks
A dag for a basic block (or just dag) is a directed acyclic graph with the
fol
lowing labels on nodes:
1. Leaves are labeled by unique identifiers, either variable
names or constants. From the operator applied to a name we
determine whether the l-value or r-value of a name is needed;
most leaves represent r-values.The leaves represent initial, values
of names, and we subscript them with 0 to avoid confusion with
labels denoting "current" values of names.
2. Interior nodes are labeled by an operator symbol.
3.Nodes are also optionally given a sequence of. identifiers for labels.
The intention is that interior nodes represent computed values, and
the iden
tifiers labeling a node are deemed to have that value.

prod := 0;
for j in 1 .. 20 loop
prod := prod + a (j) * b (j); -- assume 4-byte integer
end loop;
Quadruples :
prod := 0; -- basic block leader
j := 1;
1. start : T1 := 4 * j; -- basic block leader
2. T2 := a (T1);
3. T3 := 4 * j; -- redundant
4. T4 := b (T3);
5. T5 := T2 * T4;
6. T6 := prod + T5
7. prod := T6;
8. T7 := j + 1;
9. j := T7

Arrays, Pointers and Procedure Calls :
Consider the basic block :
x : = a [i]
a [j] : = y …(I)
z : = a [i]
If we useAlgorithm 3 to construct the dag for (I), a[i] would
become a common subexpression, and the "optimized" block'
would turn out to be
x : = a [i]
z : = x …(II)
a [j] : = y
However, (I) and (II) compute different values for z in the case i = j
and y ≠ a[i].

Peephole Optimization
A simple but effective technique for locally improving the target
code is peephole optimization,a method for trying to improve the
performance of the target program by examining a short sequence
of target instructions(called the peephole) and replacing these
instructions by a shorter or faster sequence, whenever possible.
 The peephole is a small, moving window on the target program.
 Typical optimizations :
 Redundant instruction elimination
 Flow-of-control optimizations
 Algebraic simplifications
 Use of machine idioms

1.Redundant Instruction Elimination
MOV R0,a
MOV a,R0
2. Unreachable Code

3. Flow-of-control optimizations
We can replace the jump sequence
a) goto L1
.
L1: goto L2
by the sequence
goto L2
.
L1: goto L2
b) goto L1
L1: if a < b goto L2
L3:
may be replaced by
If a < b goto L2
goto L3

4.Algebraic Simplification :
 Example :
5. Reduction in Strength :
 Reduction in strength replaces expensive operations by equivalent cheaper
ones on the target machine. For example, x2
is invariably cheaper to
implement as x*x than as a call to an exponentiation routine. Fixed-point
multiplication or division by a power of two is cheaper to implement as a shift.
6. Use of Machine Idioms :
 The target machine may have hardware instructions to implement certain
specific operations efficiently. Detecting situations that permit the use of these
instructions can reduce execution time significantly. For example, some
machines have auto-increment and auto-decrement addressing modes.These
add or subtract one from an operand before or after using its value.

Generating Code from DAG
t1 = a + b
t2 = c + d
t 3 = e – t2
t4 = t1 – t3
t2 = c + d
t 3 = e – t2
t1 = a + b
t4 = t1 – t3
MOV c, R0
ADD d, R0
MOV e, R1
SUB R0, R1
MOV a, R0
ADD b, R0
SUB R1, R0
MOV R0, t4
Assuming two registers R0 and R1 are
available, and only t4
is live on exit code
generated is as follows :
MOV a, R0
ADD b, R0
MOC c, R1
ADD d, R1
MOV R0, t1
MOV e, R0
SUB R1, R0
MOV t1, R1
SUB R0, R1
MOV R1, t4

A Heuristic Ordering for DAGs
(1) while unlisted interior nodes remain do begin
(2) select an unlisted node n,all of whose parents have nbeen listed;
(3) list n;
(4) while the leftmost child m of n has no unlisted parents
and is not a leaf do
/* since n was just listed, m is not yet listed */
begin
(5) list m;
(6) n := m
end
end
Node listing algorithm

 The resulting list 1234568 so the suggested order of
evaluation is 8654321.This ordering corresponds to the
sequence of three-address statements:
t8 = d + e
t6 = a + b
t5 = t6 – c
t4 = t5 * t8
t3 = t4 – e
t2 = t6 + t4
t1 = t2 * t3

Optimal Ordering for Trees
 The algorithm has two parts.
 1. The first part labels each node of the tree, bottom-up,
with an integer that denotes the fewest number of registers
required to evaluate the tree with no stores of intermediate
results.
 2. The second part of the algorithm is a tree traversal whose
order is governed by the computed node labels.The output code
is generated during the tree traversal

The Labeling Algorithm
(1) if n is a leaf then
(2) if n is the leftmost child of its parent then
(3) label(n) := 1
(4) else label (n) := 0
else begin /* n is an interior node */
(5) let n1, n2, • • • , nk be the children of n ordered by label,
so label(n1)≥ label(n2) ≥ • • • a label(nk);
(6) label(n) := max (label(ni) + i - 1)
1<i<k
end
 In the important special case that n is a binary node and its children have labels l1, and l2, the formula of line
reduces to
 label (n) = max (l1, l2) if l1 ≠ l2
 = l1 + 1 if l1 = l2

Code Generation from Labeled Tree
the algorithm that takes as input a labeled tree T and pro
duces as output a machine code
sequence that evaluates T into R0.
1.The algorithm uses the recursive procedure gencode(n) to produce machine code
evaluating the subtree of T with root n into a register.
2.The procedure gencode uses a stack rstack to allocate registers. Initially, rstack contains
all available registers, which we assume are R0, R1, . . . , R(r-l).
3.When gencode returns, it leaves the registers on rstack in the same order it found
them.The resulting code computes the value of the tree T in the top register on
rstack.
4.The function swap (rstack) interchanges the top two registers on rstack.The use of swap
is to make sure that a left child and its parent are evaluated into the same register.
5.The procedure gencode uses a stack tstack to allocate temporary memory locations.We
assume tstack initially containsT0,Tl,T2, ....
6.The statement X := pop (stack) means "pop stack and assign the value popped to X."
Conversely, we use push (stack,X) to mean "push X onto stack;" top (stack) refers to the
value on top of stack.

procedure gencode(n);
begin
/* case 0 */
if n is left leaf representing operand name and n is the leftmost child of its parent then
print ‘MOV’ || name || , || top (rstack)
else if n is an interior node with operator op, left child n1, and right child n2 then
/* case 1 */
if label(n2) = 0 then begin
let name be the operand represented by n2;
gencode(n1);
print op || name ||‘,’ || top(rstack)
end

/* case 2 */
else if 1  label (n1) < label (n2) and label(n1) < r then begin
swap(rstack);
gencode(n2);
R = pop(rstack); /* n2 was evaluated into register R */
gencode(n1);
print op || R ||‘,’ || top(rstack);
push(rstack, R);
swap(rstack);
end

/* case 3 */
else if 1  label (n2) < label (n1) and label(n2) < r then begin
gencode(n1);
R = pop(rstack); /* n1 was evaluated into register R */
gencode( n2);
print op || top(rstack) ||‘,’ || R;
push(rstack, R);
end
/* case 4 both labels ≥ r, the total number of registers */
else begin
gencode(n2);
T = pop(tstack);
print‘MOV’ || top(rstack) ||‘,’ ||T;
gencode(n1);
push(tstack,T);
print op ||T ||‘,’ || top(rstack);
end
end

gencode(t4) [R1R0] /* case 2 */
gencode(t3) [R0R1] /* case 3 */
gencode(e) [R0R1] /* case 0 */
print MOV e, R1
gencode(t2) [R0] /* case 1 */
gencode(c) [R0] /* case 0 */
print MOV c, R0
print ADD d, R0
print SUB R0, R1
gencode ( t1)[R0]/*case 1 * /
gencode( a) [R0] /*case 0 * /
print MOV a, R0
printADD b, R0
printSUBR1, R0

Code generator generator
 Code generation involves picking an evaluation order for
operations, assigning registers to hold values and selecting
the appropriate instructions.
 This section represents tree-rewriting techniques that can be
used to construct the instruction selection phase of code
generator automatically from a high level specification of the
target machine.

Code generation byTree Rewriting
 The target code is generated during a process in which the input
tree is reduced into a single node by applying a sequence of tree-
rewriting rules to the tree.
 Each tree rewriting rule is statement of the form
Replacement  template { action }
Where
 Replacement is a single node
 Template is tree and
 Action is code fragment, as in a syntax-directed translation
scheme.

Intermediate code tree for a[i] = b +1.
MOV #a, R0
ADD SP, R0
ADD i(SP), R0
MOV b, R1
INC R1
MOV R1, *R0

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