Control analysis of a high frequency resonant inverter for induction cooking application

IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
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Volume: 04 Issue: 03 | Mar-2015, Available @ http://www.ijret.org 340
CONTROL ANALYSIS OF A HIGH FREQUENCY RESONANT
INVERTER FOR INDUCTION COOKING APPLICATION
C. P. Roy1
1
Bachelor of Technology, Department of Electrical Engineering, Indian School of Mines, Dhanbad, India
Abstract
Stability of three possible close-loop control of a series resonant inverter is studied for induction cooking application. Ultimately,
a single close-loop control technique is proposed in this work which can ensure both the power control as well as a satisfactory
zero voltage switching (ZVS) in a finite control range near the operating point. A phase shift controlled series resonant inverter is
used as a power supply for an induction cooking system. Its linearized model is developed for small signal analysis and a PID
controller is designed for the proposed close-loop control and its performances are judged under various operating conditions
using MATLAB/Simulink®
platform.
Keywords: ZVS, linearization, bode plot, step response, PID control.
--------------------------------------------------------------------***----------------------------------------------------------------------
1. INTRODUCTION
Induction cooking employs generation of thermal energy
directly into the cooking vessel. In order to achieve efficient
transfer of energy,thermal dissipation in the electrical supply
system and the coil must be as low as possible in
comparison to heat generated in the vessel.
Mechanically this is achieved by the special design of vessel
which permits maximum flux linkage [1, 2]. From the
electrical point of view, the load circuitry should be made to
be in resonance at the supply switching frequency so that
maximum power transfer can be ensured [3, 4]. However, in
case of high power induction heating systems, the variation
in resistance and inductance of the specimen at the high
temperature especially when the work-piece reaches the
curie temperature poses a major problem by changing the
resonant frequency of the load circuit [5]. Thus, in order to
have a robust design, the phase margin and the gain margin
of the system should be well beyond the expected limit.
For induction cooking, supply switching frequency should
be sufficiently high to increase heat generation. Lower limit
is set by the acoustic noise generated in the supply and the
utensils at the fundamental and the second harmonic to 20
kHz [6, 7]. Upper limit is decided by the problems posed on
power semiconductor switches and their performance at the
higher frequency owing to dissipation of heat generated in
them. This problem can be solved by using special
switching techniques like zero voltage switching (ZVS) [8],
applied to voltage source inverters and zero current
switching (ZCS) [9], applied to current source inverters.
Using these techniques, either turn-ON or turn-OFF losses
can be reduced to zero by making the load slightly inductive
or capacitive. However, capacitive loads have inherent
demerit of increase in diode reverse recovery stress which
may result in voltage spikes in output voltage. To achieve
ZVS in voltage source inverters, switching frequency is
made slightly higher than the resonant frequency so that the
load would be inductive and the current will be lagging in
nature [10].Moreover, the frequency at which ZVS is
achieved increases with the increase in phase shift between
the switching pulses.
For different food stuffs, there might be a demand of
different and accurate power transfer to maintain a given
temperature profile. This can be ensured by controlling the
output voltage of the resonant inverter. There are various
methods described in literature for this purpose like phase
shift control (PSC) [10, 11], asymmetrical voltage control
(AVC) [12], asymmetrical duty-cycle control (ADC) [13].
Out of these, PSC produces symmetrical alternating output
voltage (i.e. voltage pulse with equal positive and negative
area) whereas AVC and ADC gives an asymmetrical output
voltage pulse with a considerable DC content at the lower
reference value. In AVC, negative area is constant and
positive area is a function of duty-ratio; whereas in case of
ADC both positive as well as negative areas are the
functions of duty-ratio (with one being increasing and
another being decreasing in nature). Thus, they can be used
only for a limited band of operation. Apart from this, PSC
has the advantage of simplicity in its implementation. Fig.1
shows block diagram for the proposed control scheme.
PID
Pulse
Generator
INVERTER LOAD
SENSOR
+
-
Error Phase
Shift
Reference
Voltage
Output
Voltage
Pulses
Fig 1 Control scheme for controlling the output power
In present work, a phase shift controlled voltage source
series resonant inverter is used as power source for the
induction cooker. Its switching frequency is linearly varied
(within a finite acceptable range) [14] with change in phase

_______________________________________________________________________________________
shift to ensure ZVS and its performances have been
analyzed for different reference values. Rest of the sections
have been categorized as such: section 2- system modeling
(which presents a critical analysis and trade-offs between
various complementary factors for load and frequency
selection), section 3- small signal modeling, section 4-
control scheme and operation, section 5- results and
discussions and section 6- conclusion.
2. SYSTEM MODELING
2.1. Load Parameters
For an induction cooker, the load is the utensil in which heat
is to be generated. For a fixed geometry and switching
frequency, the selection of utensil material must be proper to
obtain efficient heating. The surface resistance (Rs) offered
by these materials can be empirically given by (1) [6, 15].
 /SR (1)
Where, Ψ is the resistivity of the material and ∆ is the skin
depth. Hence, conductors with low value of resistivity and
high skin depth results in less resistance offered to the eddy
currents and thus in less generation of heat. Generally,
conventional magnetic materials with quite low skin depth
are used in such utensils. Again, the value of load resistance
should not be low enough to give a steep selectivity profile
at the resonant frequency (fo) (as shown in Fig.2) so that a
slight variation in switching frequency (f) doesn’t have a
much impact on output power.
In present work authors have considered a total load
resistance of 3.2Ω. Since, the load is series resonant (at
fundamental switching frequency), the values of inductance
(L) and capacitance (C) are so chosen that they form an
under damped circuit to produce required sinusoidal
oscillation. This can be ensured approximately by fulfilling
(2)
c
L
R 2 (2)
Where, R is the equivalent series resistant (ESR) of the
complete circuit including the resistance of the switches as
well as that of the coil and capacitor. Values parameters of
load and their values have been tabulated in Table-1.
Table 1 Load Parameters
Quantity Symbol Values
Load Resistance Rs 3.2 Ω
Inductance of Coil L 34 µH
Output Capacitance C 1 µF
Resistance of Coil RL 0.53 Ω
Resistance of
Capacitor
RC 0.1 Ω
Resonant Frequency fo 27.272 kHz
Characteristic
Impedance
Zo 5.83 Ω
2.2. Frequency Selection
For a full bridge inverter, the relation between output power
(Po) and the f can be given by (3)




















 22
22
2
8
f
f
f
f
Z
R
Z
RV
P
O
OO
L
O
Ldc
o

(3)
Fig.2 shows the variation of nominalised output power with
nominalised switching frequency, (f/fo) for the load
considered above. To ensure ZVS, f should be either slightly
less than or greater than the fo. However, operation below
resonance has the drawback of increased diode reverse
recovery stress which results in spikes in output voltage.
Thus, in the present work, load has been made slightly
inductive by selecting f as 1.1 times fo (i.e. 30 kHz) and is
linearly increased to 1.2 times fo (i.e. 33 kHz) as the phase
shift is increased to 180° (discussed in detail in section-4).
This increment doesn’t have a much impact on the variation
of output power as shown by blue curve in Fig.2.
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
0
0.5
1
1.5
2
2.5
3
3.5
NominalisedFrequency
NominalisedPower
R/Zo
=0.8
R/Zo
=0.5
R/Zo
=1
Fig 2 Variation of nominalised power with nominalised frequency for different ratios of R/Zo

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2.3. Switch Parameters
A full bridge inverter with power mosfets as the switching
element is used in the present study. Details regarding
various parameters have been provided in Table-2. Since f >
fo, turn-ON switching loss will be negligible for the switch
(as observed from Fig.6). However, turn-OFF loss will be
present.
Table 2 specification of switch
Quantity Symbol Values
Mosfet ON Resistance RDS 0.4 Ω
Diode ON Resistance Rd 0.1 Ω
Diode Forward Voltage
Drop
VT 0.7 V
Maximum Current
Stress
ISM 15 A
Maximum Voltage
Stress
VSM 48 V
DC Source Voltage VDC 48 V
3. SMALL SIGNAL MODELING
State space model of the system (inverter + load) has been
developed using harmonic approximation for the inductor
current and capacitor voltage and then applying extended
describing technique [16] to the input voltage [17]. The
system is then linearized at an arbitrary operating point
using Tailor’s series expansion method to give a small
signal model as shown by (4) to (7)
- -1
0
^
24
- -1 sin cos
- 0 ^2 2
0 0 -
1 ^
0 0 0 0
0 0 -
1
0 - 0
R
WS
L L VDC vR D D I DCCWo L LS
L Lx x dIS
W VS C wSC
VS
WS
C
 

 
 
 
                      
   
       
 
  
(4)
0 0y RI RI xS C    (5)
^ ^ ^ ^ T
x i i v vS C S C
 
 
 
(6)
^
Opy  (7)
Where, lower case letters with a sign of kappa (^) over them
represent a small amplitude perturbation and the upper case
letters represent corresponding values of the parameters at
an arbitrary operating point. Meanings of other symbols
have been described in Table-3.
Table3Description of symbols
Symbols Description
ic Magnitude of cosine component of
harmonically approximated output current
is Magnitude of sine component of
harmonically approximated output current
vc Magnitude of cosine component of
harmonically approximated output voltage
vs Magnitude of sine component of
harmonically approximated output voltage
d Duty ratio of output voltage wave form
ws Switching frequency
From the derived model, it can be observed that Po can be
controlled by varying either of the three inputs viz. vDC, wS
or d. Stability of the system is analyzed using Bode plot and
it is seen that it is stable for all the three inputs as shown in
Fig.3.
-20
-10
0
10
20
Magnitude(dB)
Bode Diagram
Frequency (rad/sec)
10
3
10
4
10
5
10
6
10
7
-90
-45
0
45
System: sys1
Phase Margin (deg): 93.3
Delay Margin (sec): 9.85e-007
At frequency (rad/sec): 1.65e+006
Closed Loop Stable? Yes
Phase(deg)
(a)

_______________________________________________________________________________________
-10
0
10
20
30
40
50
Magnitude(dB)
Bode Diagram
Frequency (rad/sec)
10
3
10
4
10
5
10
6
10
7
10
8
-90
-45
0
45
System: sys2
Phase Margin (deg): 90.1
Delay Margin (sec): 3.98e-008
At frequency (rad/sec): 3.95e+007
Phase(deg)
(b)
10
4
10
5
10
6
10
7
0
45
90
135
180
Phase(deg)
Bode Diagram
Frequency (rad/sec)
-120
-100
-80
-60
-40
System: sys3
Gain Margin (dB): 56.9
At frequency (rad/sec): 0
Magnitude(dB)
(c)
Fig 3 Bode plot (both magnitude and phase) for inputs (a) vDC, (b) d and (c) wS
4. CONTROL SCHEME AND OPERATION
4.1 Control Scheme
In present work, authors have used duty ratio control (of
output voltage) using phase shift technique to control the
output power. The switching pulses as shown in Fig.4 were
applied to the four switches of the full bridge inverter shown
in Fig.5.By controlling the phase shift between the pulses
applied to S1 and S2,RMS value of output voltage is
controlled and hence the output power. Step input (reference
value) of unit magnitude in Fig.1 corresponds to zero phase
shift between the switching pulses (or D=1). As the
magnitude of step is decreased to zero, the phase shift is
gradually increased to pi and thus D is automatically
reduced to zero.
4.2 Zero Voltage Switching (ZVS)
When a pair of mosfets (present in complementary arms)
doesn’t conduct simultaneously, then the load current
completes its path via freewheeling diodes. These anti-
parallel diodes conduct after the mosfet’s output capacitance
is discharged. During diode conduction period, the voltage
across power mosfet is maintained to almost a negligible

_______________________________________________________________________________________
value (equal to diode forward conduction voltage drop). It is
the interval during which mosfets should be turned ON to
achieve ZVS. If D is gradually decreased, maintaining the
resonant frequency fo, then ZVS will be lost at a certain
value when the load current becomes positive before S2
turns ON. This problem can be solved by increasing f so as
to allow more negative load current to flow before S2 turns
ON, ensuring a full discharge of the mosfet’s output
capacitance. This can be easily implemented using
microprocessor based firing circuit provided increment
required in f is an integral multiple of the clock frequency
applied to microprocessor.
In order to ensure ZVS at lower duty-ratio, the switching
frequency is increased linearly in parallel (open loop
control), according to (8).
fDff  )1(0 (8)
Here, f0 is taken as 30 kHz and ∆f as 3kHz; thus, the range
of frequency variation is limited to 30 kHz to 33 kHz.
S1
S4
S2
S3
Output
Voltage
Phase Shift
X
Y
D=X/Y
Fig 4 Switching pulses and output voltage
S+
S-
L+ L-
S1
S4
S3
S2
D1
D4
D3
D2
Fig 5 Full bridge inverter configuration
4.3 Operation & PID Controller design
A quasi square wave voltage pulse of peak to peak
magnitude of 96V is generated between the output terminals
L+ and L-(as shown in Fig.8). Fig.6 shows the voltage and
current across the switches (for an operating point
corresponding to D=0.7). From the graph it is clear that
ZVS is achieved in all the four switches.
1.2 1.3 1.4 1.5 1.6 1.7
x10
-4
-10
0
10
20
30
40
50
time(s)
Magnitude
Current(A)
Voltage(V)
Fig 6 Voltage and current across switches (for D=0.7)
From Fig.7 and Fig.8, it can be observed that magnitude of
both VL and VC is maximum at the same time (but with
opposite polarity) which is obvious in a resonant circuit and
the load current is maximum at the instant when the voltage
across the capacitor is zero, which is quite expected. The
maximum voltage stress developed across inductor during
the course of operation is around 110V and across capacitor,
it is around 62V.

_______________________________________________________________________________________
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2
x 10
-4
-150
-100
-50
0
50
100
150
Time(s)
Magnitude
VC
(V)
VL
(V)
Fig 7 Voltage across capacitor (VC) and inductor (VL) for D=0.8
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2
x 10
-4
-50
-40
-30
-20
-10
0
10
20
30
40
50
Time(s)
Magnitude
Voltage(V)
Current(A)
Fig 8 Output voltage and current (for D=0.8)
Fig.9 shows open loop response of the studied system with
power as the output. The curve shows that the system has a
settling time of around 0.02s under open loop condition.
Using this open loop response, a PID controller for closed
loop control system has been designed using Ziegler Nichols
method [18]. The values of Kp, Ki and Kd are obtained as
4.99, 568.33 and 0.0109 respectively and some manual
adjustment is made after that.

_______________________________________________________________________________________
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
Time(s)
NominalisedPower
Fig 9 Open loop response of the studied system for a unit step input
5. RESULTS AND DISCUSSIONS
A system as shown in Fig.1 was developed in
MATLAB/Simulink to study its performances and
properties under different conditions. A reference is set for
the output voltage and is compared with actual output
voltage to generate error signal which excites the PID
controller to produce manipulated phase shift which is fed to
a pulse generator to generate appropriate switching pulses.
0 0.05 0.1 0.15 0.2 0.25
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Time(s)
Magnitude
100 %
75 %
50 %
Figure 10 Response of close-loop system (with PID controller) for different reference values (step input)
Fig.10 shows the response of closed loop system with
various step reference values. The settling time of the
system is around 0.08s for a 3% band limit. However,
overshoot of the system gradually increases for lower values
of reference. Fig.11 shows the performance of PID
controller as designed in section 4.3 with intermittently
changing reference from (75% to 100% of rated value). The
curve is obtained with settling time of around 0.06s and 1.1s
for 5% and 3% band limit respectively and justifies the
performance and efficiency of designed PID controller.

_______________________________________________________________________________________
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Time (s)
Magnitude
Reference
Response
Fig 11 Response of closed loop system with intermittently changing reference from 75% to 100% of rated value
6. CONCLUSION
A close-loop power control of high frequency inverter for
induction cooking has been analyzed in this paper. Although
controller design is based on the linearized model of the
system near operating point corresponding to D=0.8,yet
simulation study shows that the controller works well to
control output power in the range of 50% to 100% of rated
value. The accuracy of the results obtained (in the specified
range) justifies the validity of the proposed method and
design.
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Control analysis of a high frequency resonant inverter for induction cooking application