dc biasing

DC Biasing of BJTs
Outline:
 Selection of operating point
Chapter 4. DC Biasing of BJTs
 Various bias circuits
Fixed bias
Voltage-divider bias
Emitter bias

DC Biasing of BJTs
The dc and ac response are necessary to the
analysis of a transistor amplifier.
Introduction
The amplified output ac power is the result of a
transfer of energy from the applied dc supplies.
This is the processing of transferring a current
from a low to high resistance:
transfer + resistor  transistor

DC Biasing of BJTs
The superposition theorem is applicable and
the the investigation of the dc conditions can
be totally separated from the ac response.
However, while designing, the selection of
parameters for the required dc level will
affect the ac response and vice versa.
So the first step of designing is to chose a
suitable operating point.

DC Biasing of BJTs
Some important basic relationships in the
analysis:
IE = (β+1)IB  IC
Then a network must be constructed that
will establish the desired operating point.
VBE = 0.7V
IC = βIB

DC Biasing of BJTs
Figure: Transistor amplification circuit

DC Biasing of BJTs
Operating Point
The operating point is a fixed point on the
characteristics and is also called quiescent
point, denoted by Q-point.
The term biasing means the application of dc
voltages used to setup a fixed level of current
and voltage.
This leads to an operating point in the region
of characteristics employed for amplification.

DC Biasing of BJTs
The figure shows a general output device
characteristic.
The maximum ratings are indicated:
 The maximum collector current ICmax
 The maximum collector-to-emitter
voltage VCEmax
 The maximum power constraint defined
by the curve PCmax

DC Biasing of BJTs
Or, the lifetime of device would be shortened
or the device would be damaged.
The biasing circuit can be designed to set
the device operation at any point within the
active region.
 The cutoff region, defined by IB  0A
 The saturation region, defined by VCE 
VCE sat

DC Biasing of BJTs
 No bias:
The chosen Q-point often depends on the
intended use of the circuit.
Some basic ideas about the operating point:
The device would initially be completely
off and zero current through the device
and zero voltage across it.

DC Biasing of BJTs
 Small-voltage biasing:
This leads to that only part of the input
signal is applied to the circuit.
So this point is not suitable.
This point would allow some positive and
negative variation of the output signal.
But the peak-to-peak value would be
limited by the proximity of VCE = 0 and
IC = 0.

DC Biasing of BJTs
 Large-voltage biasing:
Operating at this point raises some concern
about the nonlinearities introduced by rapid
changing spacing between IB curves.
It is preferable to operate where the gain of
the device is fairly constant to ensure that
the amplification over the entire swing of
input signal is the same.
The operating point is shown in the figure.

DC Biasing of BJTs
 Acceptable biasing:
Operating point is near the maximum
voltage and power level.
The output voltage swing in the positive
direction is thus limited.
If a signal is applied to the circuit, the
device will vary in current and voltage
from the operating point.

DC Biasing of BJTs
Then the device react to both the positive
and negative excursions of the input signal.
The voltage and current will vary but not
enough to drive the device into cutoff or
saturation region.
It is also in the region of more linear
spacing and therefore more linear operation.

DC Biasing of BJTs
Therefore, this point is the optimal
operating point in terms of linear gain and
largest possible voltage and current swing.
This is usually the desired condition for
small-signal amplifier but not for power
amplifier.
The latter will be covered in chapter 11.

DC Biasing of BJTs
Figure: Operating points

DC Biasing of BJTs
For the BJT to be biased in its linear or
active operating region, the following must
be true:
 The b-c junction must be reversed-biased
with reversed-bias voltage being any value
within the maximum limits of the device.
 The b-e junction must be forward-biased
with a resulting forward-bias voltage of
about 0.6 to 0.7 V.

DC Biasing of BJTs
Fixed-Bias Circuit
The fixed-bias circuit is the simplest
transistor dc bias configuration, as shown
in the figure (npn transistor).
Even thought npn transistor is employed,
the analysis is also valid to pnp transistor if
current directions and voltage polarities are
changed.

DC Biasing of BJTs
For the dc analysis, the network can be
isolated from the ac levels by replacing
each capacitor with an open circuit.
Also the dc supply VCC can be separated
into two supplies to permit a separation of
input and output circuits.
All these are for analysis purpose only.

DC Biasing of BJTs
Consider first the base-emitter circuit loop.
Base-Emitter Loop
It’s obvious that:
So, we get the equation for current IB :
VCC = IB RB + VBE
B
BECC
B
R
VV
I



DC Biasing of BJTs
The supply voltage VCC is a constant,
which is chosen in advance.
Also the b-e voltage VBE is a constant,
which is approximately equal to 0.7V
while in forward-biasing.
So the selection of a base resistor RB sets
the level of base current for the operating
point.

DC Biasing of BJTs
The collector-emitter loop is shown in the
figure.
Collector-Emitter Loop
The magnitude of the collector current is
related directly to IB through
Note that:
IC = β IB
 IB is controlled by the level of RB.
 IC is related to IB by a constant β.

DC Biasing of BJTs
 The magnitude of IC is not a function of
the resistance RC .
 Changing RC to any level will not affect
IC or IB as long as the device remains in
the active region.
 However, RC will determine the
magnitude of VCE , which will affect the
position of Q-point.

DC Biasing of BJTs
The magnitude of VCE is obtained by
This states that the voltage across
collector-emitter of a transistor is the
supply voltage less the drop across RC.
VCC  RB  IB  IC
VCE = VCC - IC RC
VCC  RC , IC  VCE
 Q-point

DC Biasing of BJTs
Figure: Fixed-Bias Circuit

DC Biasing of BJTs
Example 4.1:
Determine the following for the fixed-bias
configuration.
1. IBQ , ICQ and VCEQ.
2. VB , VC and VBC .
Solution:
1.
B
BECC
BQ
R
VV
I



DC Biasing of BJTs
BQCQ II  
A08.4750 mA35.2
CCCCCEQ RIVV 
)2.2()35.2(12  kmAV
V83.6



k
VV
240
7.012
A08.47

DC Biasing of BJTs
2. VB
VC = VCE = 6.83V
VBC = VB - VC
= 0.7V – 6.83V = -6.13V
The negative voltage means that the junction
is reverse-biased, as it should be for linear
amplification.
= VBE = 0.7V

DC Biasing of BJTs
Figure: Example of fixed-bias circuit
50

DC Biasing of BJTs
Load-Line Analysis
Now we investigate how the network
parameters define the possible range of
Q-points and how the actual Q-point is
determined.
The network is shown in the figure.
An output equation relates the variables IC
and VCE in the following manner:
VCE =VCC - IC RC

DC Biasing of BJTs
On the other hand, the output characteristics
of the transistor also relate the same two
variables IC and VCE , as shown in the figure.
It is obvious that the relationship between
variables IC and VCE is a linear one, i.e., a
straight line.
So the solution of Q-point should satisfy both
of the relationships simultaneously.

DC Biasing of BJTs
The output characteristics is ready here.
Then, for straight line, two points are sufficient
to determine it. For the first point:
CCVICCCCCE VRIVV
C
 0
So the first point is (VCC ,0).
For the other point :
C
CC
VVC
CECC
C
R
V
R
VV
I
CE



0

DC Biasing of BJTs
From the two points, we get the straight line.
The straight line is called a load line because
the intersection on the vertical axis is defined
by the applied load resistor RC.
So the second point is (0, VCC /R ).
By solving for the resulting level of IB, we
can establish the actual Q-point.

DC Biasing of BJTs
If the level of IB is changed by varying the
value of RB, the Q-point moves up or down
the load line as shown in the figure.
If RC changed while VCC and IB are held, the
load line will shift as shown in the figure.
If RC is fixed and VCC varied, the load line
will shift as shown in the figure.

DC Biasing of BJTs
Figure: Biasing of a network

DC Biasing of BJTs
IB
Figure: Output characteristics & load-line
VCC/RC
VCC
Load-line
Q-point

DC Biasing of BJTs
IB increasing
Figure: Q-point moves as changing of RB .
VCC/RC
VCC

DC Biasing of BJTs
Figure: Load line shifts as changing of RC .
VCC
RC1< RC2 <RC3
VCC/RC1
VCC/RC2
VCC/RC3
Constant IB

DC Biasing of BJTs
Figure: Load line shifts as changing of VCC .
VCC3< VCC2 <VCC1
VCC2
VCC2/RC
Constant IB
VCC1/RC
VCC1
VCC3/RC
VCC3

DC Biasing of BJTs
Example 4.3
As shown in the figure, given the load
line and the defined Q-point, determine
the required values of VCC , RC and RB
for a fixed-bias configuration.
Solution:
From the figure, we can get that:
VCE = VCC = 20V at IC = 0 mA

DC Biasing of BJTs
So,


k
mAI
V
R
VVC
CC
C
CE
2
10
20
0
Also, we know that
B
BECC
B
R
VV
I


VVC
CC
C
CE
R
V
I
0
And we know that

DC Biasing of BJTs
From the figure, we know that IB = 25μA.
B
BECC
B
I
VV
R


So,
Briefly, we obtain that
VCC = 20V, RC = 2kΩ and RB =772kΩ.
 k772
A
VV
25
7.020 


DC Biasing of BJTs
Figure: Output characteristics of example
VCC/RC
VCC
Q-point

DC Biasing of BJTs
Emitter Bias
In the dc bias network, an emitter resistor
is added.
The analysis will be performed by examining
b-e loop and c-e loop.
This will improve the stability level over
that of the fixed-bias configuration.

DC Biasing of BJTs
Base-Emitter Loop
The base-emitter loop is shown in the figure.
Also, it is obvious that
VCC = IB RB +VBE + IE RE
We know that:
IE = (β+1) IB
Replacing IE with IB , we get

DC Biasing of BJTs
For the base-emitter circuit, the net voltage
is VCC - VBE.
EB
BECC
B
RR
VV
I
)1( 



The resistance level are RB + (β+1) RE .
This means that:
The resistor RE is reflected back to the input
base circuit by a factor of (β+1) .

DC Biasing of BJTs
Collector-Emitter Loop
The c-e loop is shown in the figure.
Also, it is obvious that
VCC = IC RC +VCE + IE
RE
We know that:
IE  IC
Replacing IE with IC , we get

DC Biasing of BJTs
VE = IERE
VC = VCC - ICRC
Also, we get
VCE = VCC - IC (RC +RE )
and
VB = VBE + VE

DC Biasing of BJTs
Figure: BJT Bias circuit with emitter resistor

DC Biasing of BJTs
Example 4.4
As shown in the figure, given the parameters
in the circuit, determine:
Solution:
1. IB , IC and VCE .
2. VC , VE , VB and VBC .
1. we know that:
EB
BECC
B
RR
VV
I
)1( 




DC Biasing of BJTs
BC II 
So,
)1)(150(430
7.020



kk
VV
IB


k
V
481
3.19
A1.40
And
)1.40()50( A mA01.2
Also, we know that VCE = VCC - IC (RC +RE ).
VCE = 20V– (2.01mA) (2kΩ +1kΩ )
= 20V–6.03V = 13.97V

DC Biasing of BJTs
2. VC = VCC - IC RC
= 20V– (2.01mA) (2kΩ) = 15.98V
VE = VC - VCE
= 15.98V - 13.97V = 2.01V
Or
VE = IE RE  IC RE
= (2.01mA) (1kΩ) = 2.01V
VB = VBE + VE= 0.7V+ 2.01V = 2.71V

DC Biasing of BJTs
VBC = VB - VC
= 2.71V - 15.98V = -13.27V
This means that b-c junction is reverse-biased,
which is required by active region .
With a resistor connected to emitter, Q-point is
more robust to variation of β. This is an
improvement of the stability of the network.
Example 4.5 gives a clear explanation.

DC Biasing of BJTs
Figure: Bias circuit of example 4.4

DC Biasing of BJTs
Load-Line Analysis
The load-line analysis of emitter-bias
network is only slightly different from
that of fixed-bias configuration.
The level of IB determined by:
and denoted by IBQ .
EB
BECC
B
RR
VV
I
)1( 




DC Biasing of BJTs
The collector-emitter loop equation that
defines the load line is
VCE = VCC - IC (RC +RE ).
CCVIECCCCCE VRRIVV
C
 0
)(
EC
CC
VVEC
CECC
C
RR
V
RR
VV
I
CE





0
Two intersections of the load line are
obtained by

DC Biasing of BJTs
Figure: Load line for emitter bias configuration
VCC
EC
CC
C
RR
V
I


IBQ
Q-point

DC Biasing of BJTs
Voltage-divider Bias
As shown in the figure, it is the voltage-
divider bias configuration.
The advantage of it is that the variation of
β due to temperature change will not lead
to a dramatic change of Q-point.
We investigate this in exact and approximate
approaches.

DC Biasing of BJTs
Exact Analysis
For the dc analysis, the b-e loop is shown in
the figure.
RIN = R1 || R2
We use Thevenin equivalent circuit to simplify
the network by introducing VIN and RIN .
where CCRIN V
RR
R
VV
21
2
2



DC Biasing of BJTs
Then, in the b-e loop, we get
So, substituting IE = (β+1) IB , and solving
for IB yields
VIN = IB RIN +VBE + IE RE
EIN
BEIN
B
RR
VV
I
)1( 



The resistor RE is reflected back to the
input base circuit by a factor of (β+1) ,
the same as that in emitter-bias circuit.

DC Biasing of BJTs
Once IB is known, the remaining work is
to get IC and VCE , in the same manner as
in emitter-bias circuit.
The remaining equation for VE , VC and VB
are also the same as obtained for the
emitter-bias network.
IC = β IB

DC Biasing of BJTs
Figure: Voltage-divider bias configuration

DC Biasing of BJTs
Approximate Analysis
The b-e loop of the voltage-divider can be
represented as the network shown in the
figure.
The Ri is the equivalent resistance between
base and ground for the transistor with an
emitter resistor RE.
And this reflected resistance
Ri = (β+1) RE

DC Biasing of BJTs
If Ri is much larger than R2, the current IB
will be much smaller than I2.
So the voltage across R2, which is actually
VB, can be determined by
And I2 will be approximately equal to I1.
Or IB will be approximately equal to zero.
CCB V
RR
R
V
21
2



DC Biasing of BJTs
The condition that should be satisfied to use
the approximate approach is
Once VB is determined, then
β RE  10 R2
VE = VB - VBE
IE = VE / RE
ICQ  IE

DC Biasing of BJTs
The level of VCE is determined as before,
Now, Q-point is determined.
VCEQ = VCC - ICQ (RC +RE )
Note that during the above derivations, β is
not involved and IB is not calculated.
The Q-point (as determined by ICQ and VCE)
is therefore independent of the value β.

DC Biasing of BJTs
Figure: Approximate method for Voltage-divider bias

DC Biasing of BJTs
Example 4.7 & 4.8
Shown in the figure, it is the voltage-divider
bias network. By exact & approximate
methods, determine ICQ and VCEQ.
1. Solution of exact method:
First, introduce equivalent circuit to left side
of b-e loop.
The equivalent power supply VIN is obtained
by

DC Biasing of BJTs
RIN = R1 || R2
CCIN V
RR
R
V
21
2

 V
kk
k
22
9.339
9.3


 V2
The equivalent resistance RIN is obtained by



kk
kk
9.339
)9.3()39(
 k55.3
Also, from the equation discussed before,
we get
EIN
BEIN
B
RR
VV
I
)1( 




DC Biasing of BJTs
)5.1)(1140(55.3
7.02



kk
VV
A05.6
Then, we get
ICQ = β IBQ
A05.6140 mA85.0
)5.110)(85.0(22  kkmAV
V22.12

DC Biasing of BJTs
Figure: Example 4.7

DC Biasing of BJTs
2. Solution of approximate method:
First, test the condition for approximation.
β RE  10 R2
(140)  (1.5kΩ)  10  (3.9kΩ)
210kΩ  39kΩ (satisfied)
Then, use the equation to get VB.
CCB V
RR
R
V
21
2

 V
kk
k
22
9.339
9.3


 V2

DC Biasing of BJTs
Then
VE = VB - VBE = 2V – 0.7V = 1.3V
ICQ  IE = VE / RE = 1.3V / 1.5kΩ
= 0.867mA
VCEQ = VCC - ICQ(RC +RE )
)5.110)(867.0(22  kkmAV
V03.12

DC Biasing of BJTs
From the results of the two different solutions,
it’s obvious that ICQ and VCEQ are certainly
close and one can be considered as accurate
as the other.
The larger the level of Ri compared to R2, the
closer is the approximate to the exact solution.

DC Biasing of BJTs
Figure: Example 4.8

DC Biasing of BJTs
Summary of Chapter 4
 Calculation of operating point
 Investigation of bias circuits
Fixed bias
Emitter bias
 Load-line analysis
Voltage-divider bias
Exact & approximate methods

dc biasing

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