Digital Design Session 12

Digital Design – © 2020 Mouli Sankaran Email: mouli.sankaran@yahoo.com 2
Session 12: Focus
 Binary Multiplier
◦ 2-bit multiplier Implementation
◦ 4-bit by 3-bit multiplier Implementation
 Decoder
◦ Basic Binary Decoding logic
◦ 3-to-8 line Decoder Implementation
◦ 4-bit Decoder
◦ Decoder in Use
 Encoder
◦ Decimal-to-BCD Encoder

Binary Multiplier

Binary Multiplier
 Multiplication of binary numbers is performed in the
same way as multiplication of decimal numbers.
 The multiplicand is multiplied by each bit of the
multiplier, starting from the least significant bit.
 Each such multiplication forms a partial product.
 Successive partial products are shifted one position to
the left.
 The final product is obtained from the sum of the
partial products

2-bit by 2-bit Multiplier
The multiplicand bits are B1 and B0,
the multiplier bits are A1 and A0,
and the product is C3C2C1C0

Multiplier Circuit: 4-bit by 3-bit
The multiplicand has 4 bits
B3B2B1B0
and the multiplier has 3 bits
A2A1A0 and
the product is 7 bits
C6C5C4C3C2C1C0
B3B2B1B0
* A2A1A0
C6C5C4C3C2C1C0

Decoder

Decoder
 A decoder is a digital circuit that detects the presence of a
specified combinations of bits (code) on its inputs and
 Indicates the presence of that code by a specified output
level
 In its general form, a decoder has n input lines to handle n bits
 It has from one to 2n output lines to indicate the presence
of one or more n-bit combinations

Quiz 1: Basic Binary Decoding Logic
 Design a decoding logic which gives an output one when the
input is 1001
 For all other inputs it gives an output of zero

Quiz 2: Design a Decoding Logic
 Design a decoding logic which gives an output one when the
input is 1011 (A3A2A1A0)
 For all other inputs it gives an output of zero

Quiz 3: Design a Decoding Logic
 Design a decoding logic which produces an active low output
when the input is 11001 (A4A3A2A1A0)
 For all other inputs it gives an output of one
A4
A3
X = A4A3 A01A2A
o

3-line-to-8-line Decoder
 It has 3 inputs and 8 outputs
 Truth Table is given below:

3-line-to-8-line Decoder Implementation

Active Low 4-bit Decoder Truth Table
 A 4-bit decoder will have 24 outputs, which are shown below
 Commonly called as 4-line-to-16-line or 1-of-16 decoder

Logic Symbol of Decoder
 Logic Symbol of 1-of-16 decoder with active-LOW outputs
4-bit Inputs 16-bit Outputs

Application of Decoder
 A I/O Port address decoder

Encoder

Encoder
 An encoder is a combinational circuit that essentially performs
a reverse decoder function
 An encoder accepts an active level on one of its inputs
representing a digit, such as a decimal, or octal digit, and
converts it to a coded output, such as BCD or binary

Decimal-to-BCD Encoder

Session 10B: Summary
 Binary Multiplier
◦ 2-bit multiplier Implementation
◦ 4-bit by 3-bit multiplier Implementation
 Decoder
◦ Basic Binary Decoding logic
◦ 3-to-8 line Decoder Implementation
◦ 4-bit Decoder
◦ Decoder in Use
 Encoder
◦ Decimal-to-BCD Encoder

References
Ref 1 Ref 2

Digital Design Session 12

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Digital Design Session 12