Gate level minimization (1st update)
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This document discusses gate level minimization techniques including Karnaugh maps and don't care conditions. It provides examples of minimizing logic functions down to their minimal sums of products form using Karnaugh maps for 3 and 4 variable logic functions. It also discusses building logic gates from more basic gates and introduces NAND and NOR gates as universal gates that can be used to build all other logic gates.
Gate level minimization (1st update)
- 1. Gate Level Minimization Nugroho Adi P, S.Si, M.Sc nugnux@gmail.com, aravir@me.com http://aravir-rose.blogspot.com
- 2. untuk mendapatkan jumlah gerbang yang optimal
- 3. Map Method lebih tersturktur dari metode aljabar
- 5. Karnaugh Map
- 6. Karnaugh Map
- 7. Karnaugh Map m1 +m2 +m3 =x’y+xy’+xy =x+y
- 8. xy
- 9. x+y
- 10. K-map 3 variabel
- 11. K-map 3 variabel
- 12. m5+m7 m5 +m7 =xy’z+xyz =xz(y’+y) =xz
- 14. F(x,y,z) = (2, 3, 4, 5) F = x’y + xy’
- 15. m0 dan m2 m0 +m2 =x’y’z’+x’yz’ =x’z’(y’+y) =x’z’
- 16. m4 dan m6 m4 + m6 = xy’z’ + xyz’ = xz’+(y’ + y) =xz’
- 17. F (x, y, z) = (3, 4, 6, 7)
- 18. F(x,y,z) = ( 3, 4, 6, 7) F = yz + xz’
- 19. m0 +m2 +m4 +m6 F(x,y,z) = Σ(0,2,4,5,6) F = A’C + A’B + AB’C + BC f=xy+xz’+yz+x’y’z’ ! !
- 20. K-map 4 variabel
- 21. K-map 4 variabel
- 23. F(w,x,y,z) = Σ(0,1,2,4,5,6,8,9,12,13,14) F = y’ + w’z’ + xz’
- 24. F = A’B’C’ + B’CD’ + A’BCD’ + AB’C’
- 25. F = A’B’C’ + B’CD’ + A’BCD’ + AB’C’ F = B’D’ + B’C’ + A’CD’
- 26. Don’t Care minterm yang tidak penting
- 27. Don’t Care F(w,x,y,z) = Σ(1,3,7,11,15) d(w,x,y,z) = Σ(0,2,5)
- 28. F(w,x,y,z) = Σ(1,3,7,11,15) d(w,x,y,z) = Σ(0,2,5)
- 30. F(w,x,y,z) = Σ(1,3,7,11,15) d(w,x,y,z) = Σ(0,2,5) ! F = yz + w’x’ F = yz + w’z F’ = z’ + wy’
- 31. 1. F(x,y,z) = Σ(0,1,4,5,6); d = Σ(2,3,7) 2. F(A,B,C,D) = Σ(0,6,8,13,14); d = Σ(2,4,10) 3. F(A,B,C,D) = Σ(5,6,7,12,14,15); d = Σ(3,9,11,15) 4. F(A,B,C,D) = Σ(4,12,7,2,10); d = Σ(0,6,8)
- 32. Build Your Own Gate
- 33. Along with the law of nature that decrees that buttered toast always lands butter-side down, there is one that states 'However many logic gates we have, the one we want is not amongst them'. –John Crisp
- 34. 4-input AND gate from two 3-input AND gates.
- 35. 3-input OR gate as a 2-input gate
- 36. 3-input OR gate as a 2-input gate
- 37. 3-input AND gate as a 2- input gate
- 38. 3-input AND gate as a 2- input gate
- 39. NAND dan NOR the basic gates used in all IC digital logic families
- 42. NAND
- 43. Gerbang Apa ini?
- 45. Two Level Implementation F = AB + CD
- 46. F = AB + CD
- 47. F = AB + CD
- 48. F = AB + CD
- 50. Selesai “Dan dia hidup bahagia selama-lamanya…”