Introduction to operational amplifier designn

Introduction to Operational Amplifier Design
vers 1.0 October 22, 2007

Copyright © 2007 Reprinted by permission


Table of Contents
1 Preface ..................................................................................................... 1-1
2 Introduction............................................................................................... 2-1
3 The Ideal Voltage Feedback Op Amp .............................................................. 3-1
3.1 Ideal Characteristics .............................................................................. 3-2
3.2 Ideal Model with Feedback ...................................................................... 3-3
3.3 Inverting or Non-inverting ...................................................................... 3-5
3.4 About the Transfer Function .................................................................... 3-6
3.5 About Input Impedances ........................................................................ 3-7
4 Linear Amplifiers and Attenuators.................................................................. 4-1
4.1 Voltage Follower.................................................................................... 4-1
4.2 Inverting Amplifier or Attenuator ............................................................. 4-2
4.3 Non-Inverting Amplifier .......................................................................... 4-3
5 Summation Amplifier................................................................................... 5-1
5.1 Inverting Summation Amplifier ................................................................ 5-1
5.2 Non-inverting Summation Amplifier.......................................................... 5-3
6 The Integrator............................................................................................ 6-1
6.1 Inverting Integrator ............................................................................... 6-1
6.2 Non-inverting Low-pass Filter .................................................................. 6-3
7 The Differentiator ....................................................................................... 7-1
7.1 The Inverting Differentiator..................................................................... 7-1
7.2 Non-inverting High-pass Filter ................................................................. 7-2
8 Practical Considerations ............................................................................... 8-1
8.1 Device Parameters................................................................................. 8-1
8.2 Power Supplies ..................................................................................... 8-2
8.3 Offsetting and Stabilizing........................................................................ 8-3
8.4 Impedance Matching and Phase Compensation .......................................... 8-5
Appendix A. ..Commonly Used Terms ................................................................ A-1
Appendix B. ..Bibliography ............................................................................... B-1

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List of Circuits
Circuit 4-1 Voltage Follower .........................................................................................4-1
Circuit 4-2 Inverting Amplifier or Attenuator...................................................................4-2
Circuit 4-3 Non-inverting Amplifier ...............................................................................4-3
Circuit 5-1 Inverting Summation Amplifier .....................................................................5-1
Circuit 5-2 Non-inverting Summation Amplifier ..............................................................5-3
Circuit 6-1 Inverting Integrator ....................................................................................6-1
Circuit 6-2 The Non-inverting Integrator ........................................................................6-3
Circuit 7-1 Inverting Differentiator ................................................................................7-1
Circuit 7-2 Non-inverting Differentiator..........................................................................7-2

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List of Figures
Figure 3.1-1 Loop analysis example ..............................................................................2-1
Figure 3.1-1 Ideal operational amplifier .........................................................................3-1
Figure 3.1-2 Ideal op amp input impedances ..................................................................3-1
Figure 3.2-1 Ideal op amp feedback model 1 ..................................................................3-3
Figure 3.2-2 Ideal op amp feedback model 2 ..................................................................3-4
Figure 3.3-1 Non-inverting examples ............................................................................3-5
Figure 3.3-2 Loop equations for Fig 3.3-1 ......................................................................3-5
Figure 3.4-1 Black box diagram ....................................................................................3-6
Figure 3.4-2 Cascaded transfer functions .......................................................................3-6
Figure 3.5-1 Zero impedance source .............................................................................3-7
Figure 3.5-2 Source with internal impedance ..................................................................3-7
- +
Figure 4.2-1 E and E loops for Circuit 4-2 ...................................................................4-2
- +
-
Figure 5.1-1 E loop for Circuit 5-1 ...............................................................................5-1
Figure 5.1-2 Thevenized input for Circuit 5-1..................................................................5-2
+
Figure 5.2-1 E loop for Circuit 5-2...............................................................................5-3
-
Figure 5.2-2 E loop for Circuit 5-2 ...............................................................................5-3
Figure 5.2-3 Thevenized input for Circuit 5-2..................................................................5-4
- +
+
Figure 6.2-1 E loop for Circuit 6-2...............................................................................6-3
- +
Figure 7.1-1 E and E loops for Circuit 7-1 ....................................................................7-1
+
Figure 7.2-1 E loop for Circuit 7-2 ..............................................................................7-2
Figure 8.2-1 Filtering the Power Supply .........................................................................8-2
Figure 8.3-1 Avoiding common mode noise ....................................................................8-3
Figure 8.3-2 DC baseline shift example..........................................................................8-3
- +
Figure 8.3-3 E loop with Vs = 0 and E loop with bias VB ................................................8-4
Figure 8.4-1 Impedance matching ................................................................................8-5
Figure 8.4-2 Canceling reactance..................................................................................8-6

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1 Preface

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1 Preface
The scope of this course is the design of basic voltage feedback operational amplifier circuits. Using the
ideal op amp model and solving for the currents and voltages at each terminal we get the transfer
function as a Laplace Transform. This course provides a practical way of going from paper design to
prototyping working circuits.

This course is intended for professional electrical engineers. The course-taker should be familiar with
the Laplace and inverse Laplace Transforms and basic AC network analysis.

After completing the course, there is a quiz consisting of 16 multiple choice questions. On completion,
4 professional development hours will count towards satisfying PE licensure renewal requirements.

Navigating the course is facilitated by hyperlinked table of contents on each page or the tags in the
bookmark pane.

1-1

2 Introduction

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2 Introduction
The voltage feedback differential amplifier (“op amp” as it is called) is used in a wide variety of
electronic applications such as: linear amplifier/attenuator, signal conditioner, signal synthesizer,
computer, or simulator.

A practical way to approach designing and implementing an op amp circuit is to start with the ideal
model and get an expression that relates the output to the input, regardless of the input. This is
[1]
accomplished by working with the loop equations in the frequency or s domain .

In summary, the key to getting the transfer function is that the voltages at the input terminals of a
closed-loop op amp circuit mirror each other. Also, no current flows into or out of an input terminal.

om
When a signal is applied to either or both terminals, the output will adjust itself to meet these
constraints.

.c
ng
Using the figure to the left :

ri
+ -
if V2 and Z2 = 0 then E = 0 ∴E = 0

ee
02 ngin
We know that no current flows into an input
+ -
terminal so I = I = 0 ∴I1 = If and I2 = 0

-0 e
- -
V1 − E E − Vo = − Vo

04 ed
V1
I1 = = and If =
Z1 Z1 Zf Zf

E .c
V1 Vo
so I1 = If gives us =−
Z1 Zf

se ww
Vo Z

ur /w
Figure 3.1-1 Loop analysis example hence =− f
V1 Z1

o :/
C tp
The closed loop transfer function is in the frequency domain, A v (s) =
Vo (s)
V1(s)
Z
=− f .
Z1

ht
Vo Z
For the remainder of the course, we' ll use the shorter notation as, A v = =− f .
V1 Z1
Also note : in AC network analysis, impedances are represented as phasors and do not vary with
time but with frequency. So there is no time domain representation or time variation of an impedance.
In the following sections, the same method is used for application specific circuits where the voltages
and impedances are arbitrary.

[1] To get the output in the time domain vo(t) we would have to multiply Vi(s) by Av(s) and then take the inverse Laplace
-1
Transform ; vo(t)=L [ Vi(s)·Av(s) ].

2-1

3 The Ideal Voltage Feedback Op Amp

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3 The Ideal Voltage Feedback Op Amp
The voltage feedback op amp is a discrete device that has 2 input terminals and one output terminal.
Without feedback, the output is the difference between the input voltages, multiplied by the open-loop
gain (transfer function) of the op amp.

+
E the non - inverting terminal
-
E the inverting terminal
Eo the output terminal

om
Avol is the open loop gain (transfer function) of

.c
Figure 3.1-1 Ideal operational amplifier the op amp itself, without feedback

ng
+ -
The key is in maintaining E = E otherwise

ri
The open l oop equati ons :
the output will saturate:

ee
⎛ + −⎞
⎜ E − E ⎟ ⋅ A vol ≡ Eo where A vol = ∞ + -
⎝ ⎠ If we apply a voltage at E and ground E

02 ngin
⎛ + −⎞ Eo ≡ 0 + −
E o will saturate to positive supply voltage.
⎜E − E ⎟ ≡ so E −E ≡ 0
⎝ ⎠ A vol

-0 e
+ − - +
∴ E ≡E If we apply a voltage at E and ground E

04 ed
E o will saturate to negative supply voltage.

E .c
se ww
In the open loop model, each input terminal has infinite impedance so no current can flow into an
input terminal even with a voltage source or a ground applied. The output terminal has zero output

ur /w
impedance.

o :/
C tp
ht E
+ +
has Zin = ∞ so I
+
=0 E
− −
has Zin = ∞ so I
−
=0 Eo has Z out ≡0

Figure 3.1-2 Ideal op amp input impedances

The ideal characteristics are summarized in Table 3-1 below

3-1

3 The Ideal Voltage Feedback Op Amp 3.1 Ideal Characteristics

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3.1 Ideal Characteristics

Summary Of Ideal Characteristics
Zin = ∞ the input impedance at each terminal is infinite

Zout = 0 the output impedance is zero
±
I =0 no current flows into either of the input terminals

Avol = ∞ the open loop gain is infinite

om
Bandwidth = ∞ the bandwidth is infinitely wide

.c
No temperature drift

ng
+ -
Eo = 0 the output voltage is zero when E = E

ri
Table 3-1 Summary of ideal characteristics

ee
02 ngin
-0 e
04 ed
E .c
se ww
ur /w
o :/
C tp
ht

3-2

3 The Ideal Voltage Feedback Op Amp 3.2 Ideal Model with Feedback

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3.2 Ideal Model with Feedback
With feedback, all or a portion of the output is tied to either or both input terminals. The difference
between the voltages at the input terminals is still equal to zero and again no current flows into either
of the input terminals.

The voltage at each input terminal is treated as a node and is determined by the loop equations. The
terminal voltages are equated and we get a transfer function or closed loop gain which provides the
output over the input as a ratio (Laplace Transform).

In the following subsections, we’ll look at the feedback models : the non-zero reference and the zero
reference feedback models. As the names imply, the non-zero reference model is characterized by the
±
voltage at either input terminal, E ≠ 0 , and the zero-reference model is where the voltage at either

om
±
input terminal is referenced to 0 volts or ground; E

.c
=0.

ng
3.2.1 The non-zero reference model

ri
ee
+
The figure to the left models a source Vi connected to the E

02 ngin
terminal through a series impedance Z1 and feedback k Eo
− Z2

-0 e
tied to E ; with k being a voltage divider =
Z2 + Zf

04 ed
The voltage at each input terminal balances out to k Eo

E .c
+ − +
So E = E = k Eo and we see that I = I1 .

se ww
+
+ V −E Vi − k Eo

ur /w
But I = 0 , giving us I1 = i = =0
Z1 Z1

o :/
Eo 1 Z2 + Zf Z
Hence = = = 1+ f

C tp
Vi k Z2 Z2
Figure 3.2-1 Ideal op amp feedback model
Eo ⎛ Z ⎞

ht
1 The transfer function A v = = ⎜1 + f ⎟
⎜
Vi ⎝ Z2 ⎟
⎠

3.2.1.1 The input impedance

V
The input impedance seen by Vi is Zin = i
Iin
Vi − k Eo ⎛ 1 − kA v ⎞
The input current Iin = I1 , so Iin = Since kA v = 1, Vi ⋅ ⎜
⎜ Z ⎟=0
⎟
Z1 ⎝ 1 ⎠
With Iin = 0, Zin = ∞, so the input impedance seen by Vi is infinite or an open circuit.

3-3

3 The Ideal Voltage Feedback Op Amp 3.2 Ideal Model with Feedback

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3.2.2 The zero-reference model

The figure to the left models a source Vi connected
−
to the E terminal through a series impedance Z1 ,
+
with E tied to ground.

The voltage at each input must balance to 0 volts;
±
thus E =0

om
− −
We can see that I1 + If = I ; with I = 0 , I1 = −If

.c
- -
Vi − E Eo − E -

ng
Substituting I1 = , If = and E = 0
Z1 Zf

ri
Figure 3.2-2 Ideal op amp feedback model 2
Vi E
=− o

ee
into I1 = −If gives us
Z1 Zf

02 ngin
Eo Z
So the transfer function A v = =− f
Vi Z1

-0 e
04 ed
E .c
3.2.2.1 The input impedance

se ww
ur /w
V V V
The input impedance seen by Vi is Zin = i ; with Iin = I1 = i , Zin = i = Z1
Iin Z1 Vi

o :/
Z1

C tp
ht

3-4

3 The Ideal Voltage Feedback Op Amp 3.3 Inverting or Non-inverting

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3.3 Inverting or Non-inverting

The determining factors for whether the output is inverted or not, are the circuit configuration and the
loop equations for the terminal currents and voltages. With voltage feedback op amp circuits, which
terminal the signal is connected to, by itself, does not determine whether the output is inverted or not.

For example, the 2 circuits below are both inverting amplifier/attenuators circuits. The only difference
is the op amp input terminals are reversed but both provide an output that is a linear amplifier or
attenuator with 180° phase shift or inversion:

.c om
ring
ee
02 ngin
-0 e
Figure 3.3-1 Non-inverting examples

04 ed
E .c
E
-
=0 ∴E
+
=0 E
+
=0 ∴E
-
=0

se ww
+ + - -
I1 + I f = I I = 0 ∴ I1 = − I f I1 + I f = I I = 0 ∴ I1 = − If

ur /w
V V Vi Vo
I1 = i If = o I1 = If =
R1 Rf R1 Rf

o :/
C tp
V
R1
V
∴ i = − o and A v = − R f
Rf R1
∴
Vi
R1
= −
Vo
Rf
R
and A v = − f
R1

ht
Figure 3.3-2 Loop equations for Fig 3.3-1

3-5

3 The Ideal Voltage Feedback Op Amp 3.4 About the Transfer Function

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3.4 About the Transfer Function

The transfer function gives you the output over the input expressed as a ratio. To get the output for a
specific input, multiply the Laplace Transform of the input by the transfer function. To convert to the
[2]
time domain, take the inverse Laplace Transform . Using Laplace Transform tables available on the
internet or in printed textbooks, is a very useful tool in op amp circuit design. Some online references
are listed in Appendix B.

Working in the s domain (using Laplace Transforms) is advantageous and readily gives any transients
that might exist

Vo (s)
so Vo (s) = Vi (s) ⋅ A v (s)

om
A v (s) ≡
Vi (s)

.c
to get the time domain representation
−1
[ Vi (s) ⋅ A v (s) ]

ng
v o (t) = L or

ri
ee
by using convolut ion :
Figure 3.4-1 Black box diagram
t
∫ v o (t) = v i (τ)⋅av (t − τ)dτ

02 ngin
0

-0 e
04 ed
When cascading circuits, the overall transfer
function is the product of all the transfer
functions in the cascade and the overall

E .c
transfer function can be viewed as a single

se ww
ratio or Laplace transform

ur /w
V (s)
A v (s) o2 = A v1(s) ⋅ A v 2 (s)

o :/
Vi (s)

C tp
Figure 3.4-2 Cascaded transfer functions

ht
In the time domain, you could not express the transfer function as a ratio. You would have to solve
differential equations for the terminal voltages and currents and use the convolution integral to get the
output as a function of time, because superposition does not apply.

-1
[2] The time domain representation of Av (that is av(t) = L [Av(s)] ) is actually the unit impulse response of the circuit. The
output vo(t) after applying an arbitrary input vi(t) is found by convolving vi(t) with av(t) { vo(t) ≡ vi(t)*av(t) } .

3-6

3 The Ideal Voltage Feedback Op Amp 3.5 About Input Impedances

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3.5 About Input Impedances
An input source can be either a directly connected zero impedance source, or a thevenin equivalent
source with an internal impedance. We need to be aware if a source does have internal impedance.
This needs to be considered in determining both the input impedance seen by the voltage source and
the transfer function of the circuit.

3.5.1 Directly connected source
Consider a directly-connected source, with zero output impedance, connecting to an op amp input
terminal, through a series impedance Z1 :

The input to the circuit is Vi = Vg .

om
Vo
In general, the transfer function A v gives us

.c
Vg

ng
±
When E = 0 , the input impedance seen by Vg is

ri
±
Vg Vg − E Vg − 0 Vg

ee
Zin = ; with Iin = = , Zin = = Z1 .
Iin Z1 Z1 Vg

02 ngin
Figure 3.5-1 Zero impedance source Z1

-0 e
⎛ ± ⎞
± Vi Vi − E
⎜ Vi ⎟

04 ed
When E ≠ 0 , the input impedance seen by Vi is Zin = ; with Iin = , Zin = Z1 ⎜ ⎟
Iin Z1 ⎜ V − E± ⎟
⎝ i ⎠

E .c
* It is interesting to note that in a case like this, we have a capability of synthesizing a voltage

se ww
±
dependent input impedance that varies with Vi and E .

ur /w
o :/
3.5.2 Source with built-in internal impedance

C tp
Consider the case where the input is the end of a cable span or an input from a previous circuit stage
in the cascade:

ht
Now we have a source Vg with internal impedance Z g .
⎛ Zin ⎞
We have to modify our calculatio ns because V = Vg ⎜ ⎟.
i ⎜ Zin + Z g
⎝
⎟
⎠
Substituti ng into the transfer function A v , we get
Vo V ⎛ Zin + Z g ⎞ Vo ⎛ Zg ⎞
= o ⎜ ⎜ ⎟ = ⎜
⎟ V ⎜1 + Z ⎟
⎟
Vi Vg ⎝ Zin ⎠ g ⎝ in ⎠
the total impedance seen by Vi is Zin
the total impedance seen by Vg is Z g + Zin

Figure 3.5-2 Source with internal impedance

3-7

4 Linear Amplifiers and Attenuators 4.1 Voltage Follower

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4 Linear Amplifiers and Attenuators
The most basic circuit configurations are linear amplifiers and attenuators. Ideally, they provide flat
gain or loss across the device-rated bandwidth.

4.1 Voltage Follower
The voltage follower circuit provides unity gain with no inversion. This circuit is used to isolate a high
impedance source input and provide a buffered output.

For Circuit 4 - 1, the terminal voltages are :
Vo = Eo

om
E+ = Vi

.c
-
E = Eo

ng
- V
E+ E
, Vi = Vo giving us o = 1 .

ri
Since =
Vi

ee
Circuit 4-1 Voltage Follower So A V = 1 is the transfer function for Circuit 4.1.

02 ngin
-0 e
4.1.1 The Input impedance

04 ed
E .c
The input impedance seen by source Vi is Zin =
Vi
where Iin =
Vi − E
+

se ww
Iin R1

ur /w
+ Vi
Since E = Vi , Iin = 0 , making Zin = =∞
0

o :/
So the input impedance seen by Vi for Circuit 4 - 1 is an open circuit.

C tp
ht

4-1

4 Linear Amplifiers and Attenuators 4.2 Inverting Amplifier or Attenuator

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4.2 Inverting Amplifier or Attenuator
The inverting configuration provides flat gain or attenuation with constant 180° phase shift.

Vo = Eo
E+ =0
-
E = E+ =0
* the terminal voltages balance out to zero

.c om
Circuit 4-2 Inverting Amplifier or Attenuator

ng
-

ri
From Figure 4.2 - 1 , for the E loop we have :

ee
- -
Vi − E V −E
I1 = and I f = o

02 ngin
R1 Rf
− −
With I1 + I f = I and I = 0 , we have I1 = - I f

-0 e
-
E

04 ed
Since the terminal voltage at = 0,
Vi V V R
I1 = and I f = o and with I1 = - I f , o = − f

E .c
R1 Rf Vi R1

se ww
R
So A v = − f is the transfer function for Circuit 4.2

ur /w
- + R1
Figure 4.2-1 E and E loops for Circuit 4-2

o :/
C tp
ht
Vi Vi
The input impedance seen by source Vi is , Zin = ; where Iin = I1 =
Iin R1
V
Substituting Iin into the expression for Zin gives us Zin = i = R1
Vi
R1
So the input impedance seen by Vi for Circuit 4 - 2 is R 1

4-2

4 Linear Amplifiers and Attenuators 4.3 Non-Inverting Amplifier

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4.3 Non-Inverting Amplifier
The non-inverting configuration provides flat gain with no phase shift.

Vo = Eo
E+ = Vi
- R1
E = kVo ; where k is a voltage divider =
R1 + R f
- V
Since E+ E
, kVo = Vi ; readily giving us o =
=
1
Vi k

om
1 ⎛ R ⎞
= ⎜1 + f ⎟ .

.c
So by inspection, we see that A v = ⎜
k ⎝ R1 ⎟
⎠

ng
Circuit 4-3 Non-inverting Amplifier

ri
−
Analysis of the E loop gives us the same result :

ee
- -
E Vo − E
From Fig 4.3 - 1 we see that I1 = and If =

02 ngin
R1 Rf
− −

-0 e
With If = I1 + I and I = 0 , If = I1
- + - +

04 ed
Since E = kVo , E = Vi and E = E ,
-
we substitute E = Vi , into the expressions for I1 and If

E .c
se ww
V Vo − Vi
- + giving us I1 = i and If =
E E R1 Rf

ur /w
Figure 4.3-1 and loops for Circuit 4-3

o :/
C tp
With If = I1 we get
Vi
R1
=
Vo − Vi
Rf
∴
⎛ 1
Vi ⋅ ⎜
⎜R + R
⎝ 1
1
f
⎞
⎟ ⋅ R f = Vo ; giving us
⎟
⎠

ht
Vo ⎛ R ⎞
Av = = ⎜1 + f ⎟ as the transfer function for Circuit 4 - 3.
Vi ⎜
⎝ R1 ⎟
⎠

+
Vi V −E
The input impedance seen by source Vi is Zin = From Figure 4.3 - 1, Iin = I g where I g = i
Iin Rg
+ Vi − kVo V
Substituting E = kVo into Iin gives us Iin = With kVo = Vi , Iin = 0 making Zin = i = ∞
Rg 0

So the input impedance seen by Vi for Circuit 4.3 is an open circuit.

4-3

5 Summation Amplifier 5.1 Inverting Summation Amplifier

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5 Summation Amplifier
The summation amplifier provides flat gain or loss and can be configured in an inverting or non-
inverting configuration. Typical uses are signal combiner, voltage comparator or summing junction.

5.1 Inverting Summation Amplifier
The inverting summation amplifier provides flat gain or loss across the rated bandwidth with constant
180° phase shift.

For Circuit 5 - 1,
the terminal voltages are :

om
Vo = Eo

.c
-
E+ = 0 so E = 0

ng
* the terminal voltages

ri
balance out to zero

ee
02 ngin
-0 e
04 ed
E .c
Circuit 5-1 Inverting Summation Amplifier

se ww
ur /w
-
From Figure 5.1 - 1, for the E loop we have :
IS = I1 + I 2 + I 3 where

o :/
C tp I1 =
V1 − E
R
−
, I2 =
V2 − E
R
−
, I3 =
V3 − E
R
−

ht
−
V −E
and I f = o
Rf
−
Since the terminal voltage at E = 0
V1 V V V
I1 = , I 2 = 2 , I 3 = 3 and I f = o
R R R Rf
− −
- With I = IS + I f and I = 0 , IS = −I f
Figure 5.1-1 E loop for Circuit 5-1

V1 V2 V3 V
With IS = −If , we have + + =− o
R R R Rf
Rf
Simplifyin g the expression for Vo , we get Vo = − ⋅ (V1 + V2 + V3 )
R

5-1

5 Summation Amplifier 5.1 Inverting Summation Amplifier

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To get the transfer function as a single ratio, we have to thevenize the 3 sources into one
V1 + V2 + V3 R
equivalent source Vi with thevenin impedance Z eq ; giving us Vi = and Z eq =
3 3
as illustrated in the figure below.

-
Analyzing the E loop in Figure 5.1 - 2 we have :
- -
V −E V −E
Is = i and I f = o
R Rf
3

om
-
Substitutin g E = 0 into I s and I f we have,

.c
3 Vi V
Is = and I f = o

ng
R Rf

ri
− −
With I s + I f = I and I = 0 , Is = − If

ee
3Vi V Vo 3R f
∴

02 ngin
= − o = −
R Rf Vi R

-0 e
3R f

04 ed
So A v = − is the transfer function for Circuit 5 - 1.
Figure 5.1-2 Thevenized input for Circuit 5-1 R

E .c
se ww

ur /w
By inspection, the input impedance seen by our thenevized source Vi is Zin = 0 because, as Figure 5.1 - 2

o :/
R -
illustrates, we are connecting a source with an internal impedance of directly to the E terminal.

C tp
3

ht
Vn
However, the input impedance seen by each of the sources V1 , V2 and V3 is Zn = ; where
In
−
Vn − E −
In = With E = 0 , Zn is going to be whatever impedance is in series with each source.
Zn

For Circuit 5 - 1, each of the sources Vn sees Zn = R as the input impedance.

5-2

5 Summation Amplifier 5.2 Non-inverting Summation Amplifier

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5.2 Non-inverting Summation Amplifier
The non-inverting summation amplifier provides flat gain across the rated bandwidth with no phase
shift.

For Circuit 5 - 2,
the terminal voltages are :
Vo = Eo
E+ = kE o
R1

om
k = ; a voltage divider
R1 + R f

.c
-
E = E+ = kE o

ring
Circuit 5-2 Non-inverting Summation Amplifier

ee
02 ngin
From Figure 5.2 - 1, we see that the voltage at the

-0 e E+ terminal is Eo through a voltage divider.

04 ed
E .c
So E+ = k Eo
+ +

se ww
Also , I f = I1 + I and with I = 0 , I1 = I f

ur /w
+

o :/
−
From Figure 5.2 - 2, for the E loop we have :

C tp IS = I1 + I 2 + I3 where

ht
− − −
V1 − E V2 − E V3 − E
I1 = , I2 = , I3 =
R R R
−
V V V 3⋅E
so IS = 1 + 2 + 3 −
R R R R
- -
With I = IS and I = 0, IS = 0
−
V1 V2 V3 3 ⋅ E
∴ R
+
R
+
R
=
R

-

5-3


TOP

- V1 V2 V 3 ⋅ kVo R1
Substituting E = kVo , we get + + 3 = Substituting k = we get,
R R R R R1 + R f
⎛ V1 V2 V3 ⎞ 3Vo ⎛ R 1 ⎞ ⎛ R ⎞
⎜
⎜ R + R + R ⎟ = R ⋅ ⎜R + R
⎜ ⎟ ⎟
⎟ Simplifying we get, Vo =
1
(V1 + V2 + V3 ) ⋅ ⎜1 + f ⎟
⎜
⎝ ⎠ ⎝ 1 f ⎠ 3 ⎝ R1 ⎟
⎠

To get the transfer function in the form of a ratio, we have to thevenize the 3 sources into one
V1 + V2 + V3 R
equivalent source Vi with thevenin impedance Z eq ; so Vi = and Z eq =
3 3
-
From Figure 5.2 - 3 below, we look at the loop equations for the E terminal.

.c om We have :
−

ng
Is = I =0

ri
−
V −E −
with Is = i , substitute E = kVo

ee
R

02 ngin
3
Vi − kVo ⎛ Vi − kVo ⎞
Expanding Is we have ; Is = = 3⋅⎜ ⎟ =0

-0 e
R ⎜ R ⎟
⎝ ⎠

04 ed
3
giving us Vi = kVo

E .c
⎛ R1 ⎞ Vo ⎛ Rf ⎞
Substituti ng k = ⎜
⎜ R + R ⎟ , we get V = ⎜1 + R ⎟ , so
⎟ ⎜ ⎟

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⎝ 1 f ⎠ i ⎝ 1⎠
⎛ R ⎞

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A v = ⎜1 + f ⎟ is the transfer function for Circuit 5 - 2.
⎜
⎝ R1 ⎟
⎠

o :/
Figure 5.2-3 Thevenized input for Circuit 5-2

C tp
ht

Vi ⎛ Vi − kVo ⎞
The input impedance seen by Vi is Zin = where Iin = Is = 3 ⋅ ⎜
⎜
⎟
⎟
Iin ⎝ R ⎠
Vi
Substituti ng kVo = Vi into Iin gives us Iin = 0 making Zin = =∞
0
The input impedance for Circuit 5 - 2 is an open circuit.

The input impedance seen by each source is going to be voltage - dependent.
⎛ R1 ⎞
We know that Vo =
1
(V1 + V2 + V3 ) , where k = ⎜
⎜R + R ⎟
⎟
3k ⎝ 1 f ⎠

5-4


TOP

- Vn
We also know that the voltage at E = kVo . The input impedance seen by each source is Zin n =
In
-
Vn − E
where In = and Zn is the series impedance of each source.
Zn

For example;
-
V1 − E
In Circuit 5 - 2, source V1 has a series impedance of R so the input current I1 =
R

- V1 −
1
(V1 + V2 + V3 ) 2V1 − (V2 + V3 )

om
= (V1 + V2 + V3 ) , I1 =
1
Substituting E 3 =
3 R 3R

.c
ng
V V1
so the input impedance seen by source V1 is Zin 1 = 1 = which simplifies to
I1 2V1 − (V2 + V3 )

ri
3R

ee
⎛ V1 ⎞
Zin 1 = 3R ⋅ ⎜ ⎟
⎜ 2V − (V + V ) ⎟

02 ngin
⎝ 1 2 3 ⎠
+ V3 ) (V2 (V + V3 )
So Zin 1 is an open circuit when V1 − , and is a negative impedance when V1 < 2

-0 e
2 2
A negative impedance means V1 is drawing current from the other sources and the output.

04 ed
E .c
To get a nominal value for Zin 1 , we have to know something about the harmonic content and magnitude

se ww
coefficients of the other sources so we can calculate an average.

ur /w
The same calculations apply to getting the input impedances seen by the other sources at the input.

o :/
C tp
⎛
Zin n = 3R ⋅ ⎜
Vn
⎜ 2V − ∑ V
⎝ n m
⎞
⎟
⎟
⎠

ht

5-5

6 The Integrator 6.1 Inverting Integrator

TOP

6 The Integrator
Typical uses of the integrator circuit are: noise reduction, simulation of a first order RC low-pass
circuit, low pass filter, calculating an integral or just phase compensation.

6.1 Inverting Integrator
The inverting integrator provides low-pass filtering with constant +90° phase shift. The roll-off starts
at DC. Typical use is direct integration of a time domain function, noise reduction, or low pass filter.


om
Vo = Eo

.c
E+ =0

ng
- +
E = E =0

ri
* the terminal voltages balance out to zero

ee
02 ngin
−
From Figure 6.1 - 1, for the E

-0 e
loop we have :
− −
V −E V −E

04 ed
Circuit 6-1 Inverting Integrator ⎛ −⎞
I1 = i , and I f = o = sC ⎜ Vo − E ⎟
R1 1 ⎝ ⎠

E .c
sC
−

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Substituting E = 0 into I1 and I f gives us

ur /w
Vi
I1 = , and I f = sCVo
R1

o :/
− −
With I f + I1 = I and I = 0 , I f = −I1 so

C tp sC Vo = −
Vi
∴
Vo
=−
1

ht
R1 Vi sCR 1
1
- + Av = − is the transfer function for Circuit 6 - 1.
Figure 6.1-1 E and E loops for Circuit 6-1 sCR 1


V V
The input impedance Zin seen by Vi is Zin = i in this case Iin = I1 = i
Iin R1
Vi Vi
With Iin = Zin = = R1
R1 Vi
R1
The input impedance seen by source Vi for Circuit 6 − 1 is R 1.

6-1

6 The Integrator 6.1 Inverting Integrator

TOP

6.1.2 Bandwidth Considerations
1
For Circuit 6 − 1, A v = − ; substituting s = jω gives us the value of A v(s) at s = jω.
sCR 1
We see at s = 0 (DC), A v = − ∞ which means the output of the circuit will be saturated at the negative
supply voltage, or 0 volts if we are using a single supply. We may want to offset this if we are working
with input signals that have DC components.

See Section 8.3.2 for offsetting the baseline.
π
j
1 2 1
We can rewrite A v =− as A v = A v ⋅ e where A v = ; noting that the constant 90°
jωCR 1 ωCR 1

om
phase shift is independent of ω. If we start the design at a fundamental frequency ω 0 , then we would

.c
1
select CR 1 to give us the desired gain magnitude at ω 0 ; i.e CR 1 =
ω0 ⋅ A v

ng
1

ri
Our - 3dB bandwidth is the ω at which A v (ω) = A v (ω 0 )
2

ee
A v (ω) ω 1
This gives us the direct relationship = 0 =
A v (ω 0 ) ω

02 ngin
2
So our - 3dB bandwidth occurs at ω = 2ω 0

-0 e
04 ed
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ht

6-2

6 The Integrator 6.2 Non-inverting Low-pass Filter

TOP

6.2 Non-inverting Low-pass Filter
The non-inverting low-pass filter provides filtering with phase shift that varies with the complex
transfer function.

Vo = E o
⎛ 1 ⎞
⎜ ⎟ ⎛ ⎞
E = Vi ⎜ sC 1 ⎟ = Vi ⎜ 1 ⎟
+
⎜ sCR + 1 ⎟
⎜R + ⎟ ⎝ 1 ⎠
⎜ 1 ⎟
⎝ sC ⎠

om
⎛ 1 ⎞
⎜
⎜ sCR + 1 ⎟ being a voltage divider
⎟
⎝ 1 ⎠

.c
- R2
E = kVo where k =

ng
R2 + R 3

ri
k being a voltage divider
Circuit 6-2 The Non-inverting Integrator

ee
- ⎛ 1 ⎞ Vo 1⎛ 1 ⎞ ⎛ R3 ⎞ ⎛ 1 ⎞

02 ngin
With E+ = E , Vi ⎜
⎜ sCR + 1 ⎟ = kVo
⎟ so = ⎜
⎜ sCR + 1 ⎟ = ⎜1 + R ⎟ ⋅ ⎜ sCR + 1 ⎟
⎟ ⎜ ⎟ ⎜ ⎟
⎝ 1 ⎠ Vi k⎝ 1 ⎠ ⎝ 2 ⎠ ⎝ 1 ⎠

-0 e
Vo ⎛ R ⎞ ⎛ 1 ⎞
Av = = ⎜1 + 3 ⎟ ⋅ ⎜
⎜ ⎟ is the transfer function for Circuit 6 - 2.
R 2 ⎟ ⎜ sCR 1 + 1 ⎟

04 ed
Vi ⎝ ⎠ ⎝ ⎠

E .c
6.2.1 The input impedance

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+
E

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To calculate the input impedance seen by Vi we analyze the loop.

o :/
Vi

C tp
Iin
For Circuit 6 - 2 , Iin = I1

ht
+
Vi − E
From Figure 6.2 - 1, we have I1 =
R1

Vi
Vi −
+ Vi sCR 1 + 1
+ Recall E = so I1 =
Figure 6.2-1 E loop for Circuit 6-2 sCR 1 + 1 R1

⎛ sC ⎞ Vi sCR 1 + 1 1
I1 simplifies to Vi ⋅ ⎜
⎜ sCR + 1 ⎟ so Zin =
⎟ = = R1 +
⎝ 1 ⎠ ⎛ sC ⎞ sC sC
⎜ sCR + 1 ⎟
Vi ⋅ ⎜ ⎟
⎝ 1 ⎠
1
The input impedance seen by source Vi for Circuit 6 - 2 is R 1 + .
sC

6-3

6 The Integrator 6.2 Non-inverting Low-pass Filter

TOP

6.2.2 Bandwidth considerations

Circuit 6 - 2 is a first order low - pass filter with a fundamental frequency of ω 0 = 0.
Vo ⎛ R ⎞ ⎛ 1 ⎞ ⎛ R ⎞
Previously, we found the transfer function to be A v = = ⎜1 + 3 ⎟ ⋅ ⎜ ⎟ ; let' s replace ⎜1 + 3 ⎟
Vi ⎜
⎝ R 2 ⎟ ⎜ sCR 1 + 1 ⎟
⎠ ⎝ ⎠
⎜
⎝ R2 ⎟
⎠
1 1 ⎛ 1 ⎞ - jθ
with so A v = ⎜
⋅⎜ ⎟ Rewriting A v in phasor form, and substituing s = jω gives us A v = A v ⋅ e
⎟
k k ⎝ sCR 1 + 1 ⎠
⎛ ⎞
1 ⎜ 1 ⎟ -1
where A v = ⋅⎜ ⎟ and θ = tan ωCR 1
k ⎜(ωCR 1 ) + 1 ⎟
2
⎝ ⎠

om
1
We see that at ω 0 , A v (ω 0 ) = and θ = 0 radians

.c
k
A v (ω)

ng
1 1
The - 3dB bandwidth is where A v (ω) = ⋅ A v (ω 0 ) or =
A v (ω 0 )

ri
2 2
⎛ ⎞

ee
1 1 ⎜ 1 ⎟ A v (ω) 1 1
Since A v (ω 0 ) = and A v (ω) = ⋅ ⎜ ⎟ , = =
k k ⎜ (ωCR 1 ) 2 ⎟
+ 1⎠ A v (ω 0 ) (ωCR 1 ) 2
+1 2

02 ngin
⎝
1 1 3

-0 e
The - 3dB point is where = or where ω =
(ωCR 1 )2 +1 2 CR 1

04 ed
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o :/
C tp
ht

6-4

7 The Differentiator 7.1 The Inverting Differentiator

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7 The Differentiator
Typical uses of the differentiator circuit are: simulation of a first order RC high-pass circuit, high pass
filter, calculating a derivative or just phase compensation.

7.1 The Inverting Differentiator
The inverting differentiator provides high-pass filtering with constant - 90° phase shift. The roll-off
starts at DC. Typical use is direct differentiation of a time domain function, or high pass filter.

Vo = Eo

om
E+ =0

.c
-
E = E+ = 0

ring From Figure 7.1 - 1, for the E
−
loop we have :

ee
− −
IC + If = I ; with I = 0 , IC = − If where

02 ngin
Circuit 7-1 Inverting Differentiator − −
Vi − E Vo − E

-0 e
IC = and If =
1 R1

04 ed
sC
−
With the voltage at E = 0 ,

E .c V V

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IC = i and If = o
1 R1

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sC
Substituting into IC = − If ,

o :/
Vo Vo

C tp
we get sCVi = − ∴ = −sCR1
R1 Vi

ht
Vo
Av = = −sCR1 is the transfer function
- + Vi
Figure 7.1-1 E and E loops for Circuit 7-1
for Circuit 7 − 1 .


V
The input impedance seen by Vi is Zin = i where Iin = IC
Iin
Vi
with Iin = sCVi Zin =
sCVi
1
The input impedance seen by source Vi for Circuit 7 - 1 is
sC

7-1

7 The Differentiator 7.1 The Inverting Differentiator

TOP

For Circuit 7 − 1, A v = −sCR1 ; substituting s = jω gives us the value of A v(s) at s = jω.
We see at s = 0 (DC), A v = 0 which means the output of the circuit will be 0 volts

π
−j
2
We can rewrite A v = − jωCR 1 as A v = A v ⋅ e where A v = ωCR 1 ; noting that the constant - 90°
phase shift is independent of ω. If we start the design at a fundamental frequency ω 0 , we would
Av
select CR 1 to give us the desired gain magnitude at ω 0 ; i.e CR 1 =
ω0

om
Our - 3dB bandwidth is the ω at which A v (ω) = 2 ⋅ A v (ω 0 )

.c
A v (ω) ω
This gives us the direct relationship = =2
A v (ω 0 ) ωo

ng
So our - 3dB bandwidth occurs at ω = 2ω 0

ri
ee
02 ngin
-0 e
04 ed
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o :/
C tp
ht

7-1

7 The Differentiator 7.2 Non-inverting High-pass Filter

TOP

7.2 Non-inverting High-pass Filter
The non-inverting differentiator provides high-pass filtering with frequency-dependent phase shift.
Typical use is direct integration of a time function, or noise reduction. The total phase shift is overall
frequency dependent (with an imaginary zero and complex pole).

Vo ≡ Eo
⎛ ⎞
⎜ ⎟
+
E = Vi ⎜ R1 ⎟ = V ⎛ sCR 1 ⎞
⎜ 1 ⎟ i ⎜ sCR + 1 ⎟
⎜ ⎟
⎜ R1 + ⎟ ⎝ 1 ⎠
⎝ sC ⎠

om
-
E = kVo where k = R 2

.c
R2 + R3

ng
- ⎛ ⎞
E = E so Vi ⎜ sCR 1 ⎟ = kVo
+
⎜ sCR + 1 ⎟

ri
⎝ 1 ⎠
Vo ⎛ sCR 1 ⎞ ⎛ R 3 ⎞ ⎛ sCR 1 ⎞

ee
1
Circuit 7-2 Non-inverting Differentiator = ⎜⎜ ⎟ = ⎜1 + ⎟⋅⎜ ⎟
Vi k ⎝ sCR 1 + 1 ⎟ ⎜
⎠ ⎝ R 2 ⎟ ⎜ sCR 1 + 1 ⎟
⎠ ⎝ ⎠

02 ngin
Vo ⎛ R ⎞ ⎛ sCR 1 ⎞

-0 e
Av = = ⎜1 + 3 ⎟ ⋅ ⎜
⎜ ⎟ is the transfer function for Circuit 7 - 2.
Vi ⎝ R 2 ⎟ ⎜ sCR 1 + 1 ⎟
⎠ ⎝ ⎠

04 ed

E .c
+
To calculate the input impedance seen by Vi, we look at the E loop

se ww
Vi

ur /w
Iin

o :/
For Circuit 7 - 2, Iin = IC

C tp
+
Vi − E ⎛ +⎞
Form Figure 7.2 - 1, we have I c = = sC⎜ Vi − E ⎟
⎜ ⎟

ht
1 ⎝ ⎠
sC
+ ⎛ sCR 1 ⎞ ⎛ ⎛ sCR 1 ⎞ ⎞
Recall E = Vi ⋅ ⎜
⎜ sCR + 1 ⎟ so I c
⎟ = sC⎜ Vi − Vi ⎜
⎜
⎟
⎜ sCR + 1 ⎟ ⎟
⎟
⎝ 1 ⎠ ⎝ ⎝ 1 ⎠⎠
+

⎛ ⎛ sCR 1 ⎞ ⎞ ⎛ sC ⎞
Simplifyin g , I c = sCVi ⎜1 − ⎜ ⎟
⎟
⎜ sCR + 1 ⎟ ⎟ = Vi ⎜ sCR + 1 ⎟
⎜ ⎟
⎜
⎝ ⎝ 1 ⎠⎠ ⎝ 1 ⎠
V Vi
Substituting Iin = IC into Zin = i gives us Zin =
1
= R1 +
Iin ⎛ sC ⎞ sC
⎜ sCR + 1 ⎟
Vi ⋅ ⎜ ⎟
⎝ 1 ⎠
1
The input impedance seen by Vi for Circuit 7.2 is R 1 +
sC

7-2

7 The Differentiator 7.2 Non-inverting High-pass Filter

TOP


Circuit 7 - 2 is a first order high - pass filter and will not pass DC. If a unit step function is applied
as an input signal the output will be a unit impulse ∂(t).

So the fundamental frequency ω 0 , is a low frequency just beyond DC and cannot be 0.
The + 3dB bandwidth will be approximated.
Vo ⎛ R ⎞ ⎛ sCR 1 ⎞ ⎛ R3 ⎞
Previously, we found the transfer function to be A v = = ⎜1 + 3 ⎟ ⋅ ⎜
⎜ ⎟ ⎜ sCR + 1 ⎟ ; let' s replace ⎜1 + R ⎟
⎟ ⎜ ⎟
Vi ⎝ R2 ⎠ ⎝ 1 ⎠ ⎝ 2 ⎠

1 1 ⎛ sCR 1 ⎞ jφ
with so A v = ⋅ ⎜
⎜ sCR + 1 ⎟ Rewriting A v in phasor form, and substituing s = jω gives us A v = A v ⋅ e
⎟

om
k k ⎝ 1 ⎠
⎛ ⎞

.c
1 ⎜ ωCR 1 ⎟ -1 ⎛π ⎞
where A v = ⋅ ⎜ ⎟ , θ = tan ωCR 1 and φ = ⎜ 2 − θ ⎟

ng
k ⎜ (ωCR )2 + 1 ⎟ ⎝ ⎠
⎝ 1 ⎠

ri
ee
The + 3dB bandwidth is approximately where A v (ω) = 2
⎛ ⎞

02 ngin
1 ⎜ 1 ⎟ 1
So A v (ω) = ⋅⎜ ⎟ = 2 is approximately at ω =
k ⎜ (ωCR 1 ) 2
+ 1⎟ ⎛ 2 ⎞

-0 e
⎝ ⎠ R 1C ⋅ ⎜ 4k − 1⎟
⎝ ⎠

04 ed
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o :/
C tp
ht

7-3

8 Practical Considerations

TOP

8 Practical Considerations
Device selection, component tolerances and power supply stability should be the priorities when
designing and prototyping a circuit.

Practical considerations are device and application specific. Various types of op amps ranging from
general purpose, low and high frequency, to application specific devices have their own specifications
and recommendations for optimal performance.

8.1 Device Parameters
Some commonly used terms and their textbook definition are listed in Appendix A. Manufacturers may

om
use the same terms, call them by other names or introduce new parameters to thoroughly characterize
their op amp. Manufacturers may also include application notes on how best to make offset or

.c
compensation adjustments for voltage, current and phase. Most of these parameters are centered on
an open loop mode.

ring
So a circuit designer may not need to be concerned with all of the specifications when designing a
circuit. It’s important to select a device that exceeds expectations.

ee
For example, the common mode rejection ratio is a value based on open loop gain and small,

02 ngin
simultaneous signal variations on larger input levels; essentially nolise. A widely accepted minimum for
the CMRR is 70dB. This value implies a level of stability that applies to a closed loop circuit and other

-0 e
parameters of the op amp. Less than 70dB indicates a noisier or less stable device.

04 ed
Below are data sheets for 2 op amps that can be used for comparison.

E .c
[* links open in new browser window ]

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Device Description Overview and Specs PDF

o :/
LM741 - Operational General purpose http://www.national.com/mpf/LM/LM741.html
9

C tp
Amplifier low frequency
http://www.national.com/ds/LM/LM741.pdf
9

ht
http://www.national.com/pf/LM/LMH6609.html
LMH6609 - 900MHz
9

High speed high
Voltage Feedback Op
frequency
Amp
http://www.national.com/ds/LM/LMH6609.pdf
9

8-1

8 Practical Considerations 8.2 Power Supplies

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8.2 Power Supplies
The decision to use single or dual voltage power supplies may be arbitrary or a design constraint. The
better choice is to use a dual balanced supply to minimize circuitry required to offset the DC baseline
for AC inputs. If there is no choice and a design must be a single voltage supply, each of the circuits
above needs to be modified.

8.2.1 Bypassing the power supply
Use a well regulated power supply and bypass with electrolytic capacitors, choke coils or a combination
of the 2 to further filter the supply voltage to the circuits. Keep lead lengths or printed circuit board
layouts as short as possible.

om
The best case for filtering out power supply connections is a

.c
series choke coil shunted by a capacitor (electrolytic or

ng
mylar) to minimize if not eliminate any noise and ringing on
the supply rails.

ri
ee
Choke coils may be expensive and impose additional space
requirements in a final product, but they provide excellent

02 ngin
filtering for a prototype.

-0 e
Figure 8.2-1 Filtering the Power Supply

04 ed
Large electrolytic capacitors shunt out high frequency components and help keep the supply voltage
regulated by absorbing voltage spikes or instantaneous load changes. Filtering power supplies helps

E .c
keep the op amp operating in the range of its rated PSRR

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8-2

8 Practical Considerations 8.3 Offsetting and Stabilizing

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8.3 Offsetting and Stabilizing
The op amp data sheet may have specifications for offsetting and stabilizing. Below are cases for
avoiding common-mode noise and shifting the DC baseline.

8.3.1 Common mode noise
When the intention to apply a constant 0 volts to either input terminal, tie the terminal directly to
ground rather than through a resistor. This would prevent any voltage appearing due to leakage
currents and having to offset or null it with additional biasing. Recommendations for offsetting
mentioned in the op amp data sheet should also be followed.

.c om
ring
ee
02 ngin
-0 e
04 ed
Figure 8.3-1 Avoiding common mode noise

E .c
8.3.2 Shifting the DC baseline

se ww
Working with AC sources that alternate between positive and negative voltages, and being constrained

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to using single supply op amps, requires shifting the DC baseline to avoid clipping of the output signal.

o :/
Take Circuit 4 2 Inverting amplifier or

C tp
attenuator as an example. If we are using a
single supply and apply a sine wave as an
input, the output produced would only be the

ht
positive portion of the input signal.

Modifying the circuit as in the figure to the left
will provide the DC shift that is needed to
provide the expected output; an amplified or
attenuated sine wave alternating about a DC
baseline

With no signal but the DC bias applied,
Figure 8.3-2 DC baseline shift example
V1 = V2 = VB and R is the thevenin equivalent
of voltage dividers as shown in Figs 8.3-3.

8-3

8 Practical Considerations 8.3 Offsetting and Stabilizing

TOP

- +
Figure 8.3-3 E loop with Vs = 0 and E loop with bias VB

om
With no signal applied, the output Vo = VB which is now the baseline for this circuit.

.c
V
Note that we are working in the frequency domain so VB is VB(s) = DC the inverse Laplace being VDC

ng
s
which is a constant voltage in the time domain.

ri
ee
If we remove the ground from the first resistor in the left - hand figure, and apply a signal VS , V1

02 ngin
Rf
becomes V1 = VS + VB and the output of the op amp becomes Vo = VB − VS
2R

-0 e
04 ed
Rf
If VB has a magnitude of VDC and our input v s (t) = Vm sin(ωt ) , our output v o (t) = VDC − Vm sin(ωt ) ⋅
2R

E .c
The design constraint here is to keep the output voltage peaks in the range of the op amp specs and

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the power supply voltage.

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o :/
positive peak being VDC + Vm

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negative peak being VDC − Vm

ht
We just applied a DC baseline shift to the inverting amplifier / attenuator circuit, the same can be
done for the inverting integrator or differentiator circuits

8-4

8 Practical Considerations 8.4 Impedance Matching and Phase Compensation

TOP

8.4 Impedance Matching and Phase Compensation

An input voltage source may have an internal
impedance that needs to be matched to achieve:
maximum power transfer
cancel out any reactances
pre-condition the phase

The figure to the top left represents either a directly
connected voltage source with an internal

om
impedance or a downstream thevenin equivalent
source.

.c
ng
Shunting the input source with an impedance Zm
using RLC components will satisfy the requirements.

ri
Vg ⋅ Zm

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Vi then becomes
Z +Z
g m

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Matching an impedance where Zg = Zm
when Zg = R g or ± jX g or R g + jX g

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Vg

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Vi =
Figure 8.4-1 Impedance matching 2
without introducing any phase components

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8-5

8 Practical Considerations 8.4 Impedance Matching and Phase Compensation

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To cancel the reactance portion,
use an impedance of Zm = Z g∗
then with Zg = R g ± jX g Zg∗ = R g m jX g

(
Vg R g m jX g )
and the input will be Vi =
2R g
Zin seen by Vg becomes
Figure 8.4-2 Canceling reactance Zin = 2 R g thereby cancelling the reactance
-1 Xg

om
and introducing a phase angle of m θ = tan
Rg

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∗ if Z g is purely a reactance, terminating with Z g∗

ng
will present a short circuit to the source

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8-6

Appendix A Commonly Used Terms

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Appendix A. Commonly Used Terms
Common-Mode Voltage Range
Typically the range of voltages on the input terminals for which the amplifier’s performance is specified

Common-Mode Rejection Ratio
The ratio of differential voltage amplification to common-mode voltage amplification. It is measured by
determining the ratio of a change in input common-mode voltage to the resulting change in input
offset voltage change.

Gain Bandwidth Product
The product of a given input frequency and the op-amp open loop gain at that frequency (usually

om
specified in MHz, voltage feedback amplifiers only.)

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Input bias current

ng
The Input Current specification is the average of the currents drawn by the two input pins. Input

ri
current is also often called "bias current"

ee
Input Offset Current
The difference of the currents entering the two input terminals of a balanced amplifier

02 ngin
Input Offset Voltage

-0 e
The DC error voltage which exists between the input terminals due to non-ideal balancing of the input

04 ed
stage to the output. It is multiplied by the closed loop gain

E .c
Offset Current Temperature Coefficient
The average rate of change in offset current for junction temperature variation over a specified

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temperature range

ur /w
Offset Voltage Temperature Coefficient

o :/
The average rate of change in offset voltage for the junction temperature variation over a specified
temperature range

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Output Offset Voltage

ht
The output voltage when the 2 input terminals are grounded.

Output Voltage Swing
The maximum peak-to-peak output voltage swing under specified load and supply voltages

Power Supply Rejection Ratio
Power Supply Rejection Ratio (PSRR) can be one of two specifications. DC PSRR is the ratio of the
change in a specified parameter (e.g., Full Scale Error) that results from a specified change in the
power supply voltage. AC PSRR is measured with a signal of specified frequency and amplitude riding
upon the power supply and is the ratio of the output amplitude of that signal at the output to its
amplitude on the power supply pin. PSRR is usually specified in dB

A-1

Appendix A Commonly Used Terms

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Slew Rate
The rate that an amplifier output changes from one voltage level to another, usually given in V/µsec,
when a step or square wave input is applied. Typically it is the average rate measured from 10% to
90% of the total output voltage change

Unity Gain Bandwidth
The frequency where the amplifier open loop gain equals to one. It equals GBW if the op amp has a
single pole roll-off in its frequency response

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A-2

Appendix B Bibliography

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Appendix B. Bibliography
Printed Material

Millman, Jacob. Microelectronics Digital and Analog Circuits and Systems. New York: McGraw-Hill
Book Company,1979

Online Reference List [* links open in new browser window ]

Table of Laplace Transforms, s.v. http://www.vibrationdata.com/Laplace.htm (September 30, 2007)

om
1

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Laplace transform:” Table of selected Laplace transforms”.

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http://en.wikipedia.org/wiki/Laplace_transform#Table_of_selected_Laplace_transforms (September

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1

30, 2007)

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National Semiconductor, High-Performance Analog for Energy-Efficient PowerWise Designs.
http://www.national.com/ (September 30, 2007)

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B-1

Introduction to operational amplifier designn

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