itft-Instruction set-of-8085
- 2. Instruction Set of 8085 An instruction is a binary pattern designed inside a microprocessor to perform a specific function. The entire group of instructions that a microprocessor supports is called Instruction Set. 8085 has 246 instructions. Each instruction is represented by an 8-bit binary value. These 8-bits of binary value is called Op-Code or Instruction Byte.
- 3. Classification of Instruction Set • Data Transfer Instruction • Arithmetic Instructions • Logical Instructions • Branching Instructions • Control Instructions
- 4. Data Transfer Instructions • These instructions move data between registers, or between memory and registers. • These instructions copy data from source to destination. • While copying, the contents of source are not modified.
- 5. Data Transfer Instructions Opcode Operand Description MOV Rd, Rs M, Rs Rd, M Copy from source to destination. This instruction copies the contents of the source register into the destination register. The contents of the source register are not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers. Example: MOV B, C or MOV B, M
- 6. Data Transfer Instructions Opcode Operand Description MVI Rd, Data M, Data Move immediate 8-bit The 8-bit data is stored in the destination register or memory. If the operand is a memory location, its location is specified by the contents of the H-L registers. Example: MVI B, 57H or MVI M, 57H
- 7. Data Transfer Instructions Opcode Operand Description LDA 16-bit address Load Accumulator The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator. The contents of the source are not altered. Example: LDA 2034H
- 8. Data Transfer Instructions Opcode Operand Description LDAX B/D Register Pair Load accumulator indirect The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered. Example: LDAX B
- 9. Data Transfer Instructions Opcode Operand Description LXI Reg. pair, 16-bit data Load register pair immediate This instruction loads 16-bit data in the register pair. Example: LXI H, 2034 H
- 10. Data Transfer Instructions Opcode Operand Description LHLD 16-bit address Load H-L registers direct This instruction copies the contents of memory location pointed out by 16-bit address into register L. It copies the contents of next memory location into register H. Example: LHLD 2040 H
- 11. Data Transfer Instructions Opcode Operand Description STA 16-bit address Store accumulator direct The contents of accumulator are copied into the memory location specified by the operand. Example: STA 2500 H
- 12. Data Transfer Instructions Opcode Operand Description STAX Reg. pair Store accumulator indirect The contents of accumulator are copied into the memory location specified by the contents of the register pair. Example: STAX B
- 13. Data Transfer Instructions Opcode Operand Description XCHG None Exchange H-L with D-E The contents of register H are exchanged with the contents of register D. The contents of register L are exchanged with the contents of register E. Example: XCHG
- 14. Data Transfer Instructions Opcode Operand Description SPHL None Copy H-L pair to the Stack Pointer (SP) This instruction loads the contents of H-L pair into SP. Example: SPHL
- 15. Data Transfer Instructions Opcode Operand Description PCHL None Load program counter with H-L contents The contents of registers H and L are copied into the program counter (PC). The contents of H are placed as the high-order byte and the contents of L as the low-order byte. Example: PCHL
- 16. Arithmetic Instructions • These instructions perform the operations like: • Addition • Subtract • Increment • Decrement
- 17. Addition • Any 8-bit number, or the contents of register, or the contents of memory location can be added to the contents of accumulator. • The result (sum) is stored in the accumulator. • No two other 8-bit registers can be added directly. • Example: The contents of register B cannot be added directly to the contents of register C.
- 18. Subtraction • Any 8-bit number, or the contents of register, or the contents of memory location can be subtracted from the contents of accumulator. • The result is stored in the accumulator. • Subtraction is performed in 2’s complement form. • If the result is negative, it is stored in 2’s complement form. • No two other 8-bit registers can be subtracted directly.
- 19. Increment / Decrement • The 8-bit contents of a register or a memory location can be incremented or decremented by 1. • The 16-bit contents of a register pair can be incremented or decremented by 1. • Increment or decrement can be performed on any register or a memory location.
- 20. Arithmetic Instructions Opcode Operand Description ADD R M Add register or memory to accumulator The contents of register or memory are added to the contents of accumulator. The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of the addition. Example: ADD B or ADD M
- 21. Arithmetic Instructions Opcode Operand Description ADC R M Add register or memory to accumulator with carry The contents of register or memory and Carry Flag (CY) are added to the contents of accumulator. The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of the addition. Example: ADC B or ADC M
- 22. Arithmetic Instructions Opcode Operand Description ADI 8-bit data Add immediate to accumulator The 8-bit data is added to the contents of accumulator. The result is stored in accumulator. All flags are modified to reflect the result of the addition. Example: ADI 45 H
- 23. Arithmetic Instructions Opcode Operand Description ACI 8-bit data Add immediate to accumulator with carry The 8-bit data and the Carry Flag (CY) are added to the contents of accumulator. The result is stored in accumulator. All flags are modified to reflect the result of the addition. Example: ACI 45 H
- 24. Arithmetic Instructions Opcode Operand Description DAD Reg. pair Add register pair to H-L pair The 16-bit contents of the register pair are added to the contents of H-L pair. The result is stored in H-L pair. If the result is larger than 16 bits, then CY is set. No other flags are changed. Example: DAD B
- 25. Arithmetic Instructions Opcode Operand Description SUB R M Subtract register or memory from accumulator The contents of the register or memory location are subtracted from the contents of the accumulator. The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of subtraction. Example: SUB B or SUB M
- 26. Arithmetic Instructions Opcode Operand Description SBB R M Subtract register or memory from accumulator with borrow The contents of the register or memory location and Borrow Flag (i.e. CY) are subtracted from the contents of the accumulator. The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of subtraction. Example: SBB B or SBB M
- 27. Arithmetic Instructions Opcode Operand Description SUI 8-bit data Subtract immediate from accumulator The 8-bit data is subtracted from the contents of the accumulator. The result is stored in accumulator. All flags are modified to reflect the result of subtraction. Example: SUI 45 H
- 28. Arithmetic Instructions Opcode Operand Description INR R M Increment register or memory by 1 The contents of register or memory location are incremented by 1. The result is stored in the same place. If the operand is a memory location, its address is specified by the contents of H-L pair. Example: INR B or INR M
- 29. Arithmetic Instructions Opcode Operand Description DCR R M Decrement register or memory by 1 The contents of register or memory location are decremented by 1. The result is stored in the same place. If the operand is a memory location, its address is specified by the contents of H-L pair. Example: DCR B or DCR M
- 30. Logical Instructions • These instructions perform logical operations on data stored in registers, memory and status flags. • The logical operations are: • AND • OR • XOR • Rotate • Compare • Complement
- 31. AND, OR, XOR • Any 8-bit data, or the contents of register, or memory location can logically have • AND operation • OR operation • XOR operation with the contents of accumulator. • The result is stored in accumulator.
- 32. Rotate • Each bit in the accumulator can be shifted either left or right to the next position.
- 33. Compare • Any 8-bit data, or the contents of register, or memory location can be compares for: • Equality • Greater Than • Less Than with the contents of accumulator. • The result is reflected in status flags.
- 34. Complement • The contents of accumulator can be complemented. • Each 0 is replaced by 1 and each 1 is replaced by 0.
- 35. Logical Instructions Opcode Operand Description CMP R M Compare register or memory with accumulator The contents of the operand (register or memory) are compared with the contents of the accumulator. The result of the comparison is shown by setting the flags of the PSW as follows:
- 36. Logical Instructions Opcode Operand Description CMP R M Compare register or memory with accumulator if (A) < (reg/mem): carry flag is set if (A) = (reg/mem): zero flag is set if (A) > (reg/mem): carry and zero flags are reset. Example: CMP B or CMP M
- 37. Logical Instructions Opcode Operand Description CPI 8-bit data Compare immediate with accumulator The 8-bit data is compared with the contents of accumulator. The values being compared remain unchanged. The result of the comparison is shown by setting the flags of the PSW as follows:
- 38. Logical Instructions Opcode Operand Description CPI 8-bit data Compare immediate with accumulator if (A) < data: carry flag is set if (A) = data: zero flag is set if (A) > data: carry and zero flags are reset Example: CPI 89H
- 39. Logical Instructions Opcode Operand Description ANA R M Logical AND register or memory with accumulator The contents of the accumulator are logically ANDed with the contents of register or memory. The result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of H-L pair. S, Z, P are modified to reflect the result of the operation. CY is reset and AC is set. Example: ANA B or ANA M.
- 40. Logical Instructions Opcode Operand Description ANI 8-bit data Logical AND immediate with accumulator The contents of the accumulator are logically ANDed with the 8-bit data. The result is placed in the accumulator. S, Z, P are modified to reflect the result. CY is reset, AC is set. Example: ANI 86H.
- 41. Logical Instructions Opcode Operand Description XRA R M Exclusive OR register or memory with accumulator The contents of the accumulator are XORed with the contents of the register or memory. The result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of H-L pair. S, Z, P are modified to reflect the result of the operation. Example: XRA B or XRA M.
- 42. Logical Instructions Opcode Operand Description ORA R M Logical OR register or memory with accumulator The contents of the accumulator are logically ORed with the contents of the register or memory. The result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of H-L pair. S, Z, P are modified to reflect the result. Example: ORA B or ORA M.
- 43. Logical Instructions Opcode Operand Description ORI 8-bit data Logical OR immediate with accumulator The contents of the accumulator are logically ORed with the 8-bit data. The result is placed in the accumulator. S, Z, P are modified to reflect the result. Example: ORI 86H.
- 44. Logical Instructions Opcode Operand Description XRA R M Logical XOR register or memory with accumulator The contents of the accumulator are XORed with the contents of the register or memory. The result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of H-L pair. S, Z, P are modified to reflect the result of the operation. Example: XRA B or XRA M.
- 45. Logical Instructions Opcode Operand Description RLC None Rotate accumulator left Each binary bit of the accumulator is rotated left by one position.
- 46. Logical Instructions Opcode Operand Description RRC None Rotate accumulator right Each binary bit of the accumulator is rotated right by one position. CY is modified according to bit D0. S, Z, P, AC are not affected. Example: RRC.
- 47. Logical Instructions Opcode Operand Description CMA None Complement accumulator The contents of the accumulator are complemented. No flags are affected. Example: CMA.
- 48. Branching Instructions • The branching instruction alter the normal sequential flow. • These instructions alter either unconditionally or conditionally.
- 49. Branching Instructions Opcode Operand Description JMP 16-bit address Jump unconditionally The program sequence is transferred to the memory location specified by the 16-bit address given in the operand. Example: JMP 2034 H.
- 50. Control Instructions • The control instructions control the operation of microprocessor.
- 51. Control Instructions Opcode Operand Description NOP None No operation No operation is performed. The instruction is fetched and decoded but no operation is executed. Example: NOP
- 52. Control Instructions Opcode Operand Description HLT None Halt The CPU finishes executing the current instruction and halts any further execution. An interrupt or reset is necessary to exit from the hal state. Example: HLT
- 53. Control Instructions Opcode Operand Description RIM None Read Interrupt Mask This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. The instruction loads eight bits in the accumulator with the following interpretations. Example: RIM