Lecture Notes Microprocessor and Controller Unit2

Microprocessor and Micro Controller
Unit II
8085 Pinout Signal, Functional Block Diagram
and Instruction Set
Prepared By
Dr. S.Murugan, Associate Professor
Department of Computer Science,
AlagappaGovernment Arts College, Karaikudi.
(Affiliated by AlagappaUniversity)
Mailid: muruganjit@gmail.com
Reference Book:
Microprocessor Architecture – Programming and Applications with 8085 – R. S. Gaonkar

8085 Microprocessor Unit (MPU)

The 8085 MPU
➢ The term microprocessing unit (MPU) is similar to
central processing unit (CPU) used in traditional
computers.
➢ The MPU as a device or a group of devices (as a unit)
that can communicate with peripherals, provide timing
signals, direct data flow, and perform computing task
as specified by the instructions in memory.

The 8085 MPU
➢ Limitations of MPU :
➢ The low-order address bus is multiplexed with the
data bus. The buses needed to be demultiplexed.
➢ Appropriate control signals need to be generated to
interface memory and I/O with the 8085 MPU.

The 8085 Microprocessor – Pinout Signal
➢ The 8085A is an 8-bit general-purpose microprocessor
capable of addressing 64K of memory.
➢ The device has 40 pins, requires a +5V single power
supply and can operate with a 3-MHz single phase
clock.
➢ Fig. 2.1 shows the logic pinout diagram of the 8085
microprocessor.

➢ All the signals classified into six groups:
➢ 1. Address bus
➢ 2. Data bus
➢ 3. Control and Status Signal
➢ 4. Power supply and frequency signals
➢ 5. Externally initiated signals
➢ 6. Serial I/O ports.

Figure 2.1 The 8085 Microprocessor Pinout and Signals

1. Address Bus
➢ The 8085 has 16 signal lines are used as address bus.
➢ These lines are split into two segments: A15 - A8 and
AD7 - AD0.
➢ The eight signal lines, A15-A8 are unidirectional and
used for the most significant bits, called the high-order
address, of a 16-bit address.
➢ The signal lines AD7-AD0 are used for a dual purpose.

2. Multiplexed Address/Data Bus
➢ The signal lines AD7-AD0 are bidirectional .
➢ It is used for a dual purpose, the low-order address
bus as well as data bus.
➢ These lines are enabled by the ALE (address Latch
Enable) signal.

3. Control and Status Signal
➢ It includes two control signals (RD and WR), three
status signals (IO/M. S1 and S0) to identify the nature
of the operations, one special symbol ALE).
➢ ALE – Address Latch Enable : When ALE is high, it
indicates that the bus (AD7-AD0 lines) is carrying an
address. When ALE is low, the bus (AD7-AD0 lines) is
typically used for transferring actual data.

➢ RD - Read: This signal indicates that the selected I/O or memory
device is to be read; and data are available on the data bus
➢ WR – Write : This signal indicates that the data on the data bus are
to be written into a selected I/O or Memory
➢ IO/M : This is a control signal that indicates whether the current
operation is related to I/O or memory. When this signal is high, it
indicates an I/O operation. When this signal is low, it indicates a
memory operation

➢ S1 and S0 : These are two status lines that indicate the specific type of
machine cycle (fetch, read, write, etc.).
➢ All the operations and their associated status signals are listed in Table
2.1
Table 2.1 8085 Machine Cycle Status and Control Signals

4. Power Supply and Clock Frequency
➢ Vcc : Pin 40 is the Vcc pin that connects to the positive power supply
(typically +5V). Vcc provides the necessary power for the operation of
the microprocessor and its internal circuits.
➢ Vss: Vss is typically connected to the system's ground (0V).
➢ X1, X2 : A crystal is connected to these two pins. The frequency is
internally divided by two; the system operates at 3 MHz. Totally, the
crystal should have a frequency of 6 MHz. The crystal generating a
stable clock signal at a fixed frequency.
➢ CLK (Out) – Clock Output : This signal can be used as the system
clock for other devices.

5. Externally Initiated Signal, Including Interrupts
➢ The 8085 has five interrupt signals that can be used to interrupt a
program execution.
➢ In addition to the interrupts, three pins – RESET, HOLD, and READY
– accept the externally initiated signals as inputs.
➢ The functions of these signals are listed in Table 2.2

Table 2.2 8085 Interrupts and Externally Initiated Signals

➢ RESET IN: When the signal on this pin goes low, the program counter
is set to zero and the MPU is set to zero.
➢ RESET OUT: This signal is used to reset other devices.

6. Serial IO Ports
➢ The 8085 has two signals to implement the serial transmission :
➢ SID (Serial Input Data) and SOD (Serial Output Data).
➢ In serial transmission, data bits are sent over a single line, one bit at a
time.

Functional Block Diagram (A Detailed Look at the 8085 MPU and Its Architecture)
➢ Figure 2.2 shows the internal architecture of the 8085.
➢ It includes the ALU (Arithmetic Logic Unit), Timing and Control Unit,
Instruction Register and Decoder, Register Array, Interrupt Control,
and Serial I/O Control.

Functional Block Diagram - The ALU
➢ The arithmetic/logic unit performs the computing functions: it includes
the accumulator, the temporary registers, the arithmetic and logic
circuits, and five flags.
➢ The temporary register is used to hold data during an arithmetic/logic
operation.
➢ The result is stored in accumulator, and the flags (flip-flops) set or reset
according to the result of the operation.

Functional Block Diagram - The ALU
➢ The arithmetic/logic unit performs the computing functions: it includes
the accumulator, the temporary registers, the arithmetic and logic
circuits, and five flags.
➢ The temporary register is used to hold data during an arithmetic/logic
operation.
➢ The result is stored in accumulator, and the flags (flip-flops) set or reset
according to the result of the operation.
➢ The flags are generally reflects data condition in the accumulator.
➢ The Bit position, Flag name, description, purpose and example
mnemonic are as follows:

Functional Block Diagram - The ALU – Flag Registers
Bit
Position
Flag Name Description Purpose Example
Mnemonic
7 Sign Flag (S) Set (1) if the result of the operation is
negative (i.e., the most significant bit of the
result is 1), otherwise reset (0).
Indicates if the result of an operation is
negative.
SBB (Subtract
with Borrow)
6 Zero Flag (Z) Set (1) if the result of the operation is zero,
otherwise reset (0).
Indicates if the result of an operation is
zero.
CMP
(Compare)
4 Auxiliary Carry
Flag (AC)
Set (1) if there is a carry from bit 3 to bit 4
during addition or a borrow during
subtraction, otherwise reset (0).
Used in BCD (Binary Coded Decimal)
arithmetic operations.
ADD (Add)
2 Parity Flag (P) Set (1) if the result has an even number of
1's (even parity), otherwise reset (0) for odd
parity.
Indicates whether the result has even or
odd parity.
INX (Increment
register pair)
0 Carry Flag (C) Set (1) if there is a carry-out from the most
significant bit during an addition operation,
or if there is a borrow during a subtraction.
Indicates carry/borrow during
arithmetic operations.
JC (Jump if
Carry)
1, 3, 5 Unused This bit is unused and always set to 0. This bit has no specific function in the
flag register.
N/A

➢ The bit positions reserved for these flags in the flag register are as
follows:
Functional Block Diagram - The ALU – Flag Registers

Functional Block Diagram - Timing and Control Unit
➢ This unit synchronizes all the microprocessor operations with the clock
and generates the control signals necessary for communication between
the microprocessor and peripherals.
➢ The RD and WR signals are sync pulses indicating the availability of
data on the data bus.

Functional Block Diagram - Instruction Register and Decoder
➢ The instruction register and the decoder are part of the ALU.
➢ When an instruction is fetched from memory, it is loaded in the
instruction register.
➢ The decoder decodes the instruction and establishes the sequence of
events to follow.

8085 Instruction Set and Classification
Instruction Set
➢ An instruction is a binary pattern designed inside a microprocessor to
perform a specific function.
➢ The entire group of instructions, called the instruction set, determines
what functions the micro processor can perform.

8085 Instruction Set and Classification
Classification:
➢ The 8085 instructions can be classified into the following five
functional categories:
➢ data transfer operations,
➢ arithmetic operations,
➢ logical operations,
➢ branching operations and
➢ machine control operations.

Instruction Classification - Data Transfer (Copy) Operations
➢ This group of instructions copies data from a location called a source to
another location, called a destination, without modifying the content of
the source.
➢ The various types of data transfer are listed below together with
examples of each type.

Instruction Classification - Data Transfer (Copy) Operations
S.No. Type Examples Mnemonics
1 Between Registers Copy or moves the contents of
register B into Register D.
MOV D,B
2 Specific data byte to a
register or a memory
location
Load Register B with the data
byte 32H.
MVI B, 32
3 Between a memory location
and a register
From the memory location
2000H to Register B
MOV B, 2000
4 Between an I/O device and
the accumulator
From an input keyboard to the
accumulator. Assume the
keyboard connected to I/O port
00H.
IN 00H

Instruction Classification – Arithmetic Operations
➢ These instructions perform arithmetic operations like addition,
subtraction, increment, and decrement.
➢ ADD (Add Register or Memory): Adds the content of a register or
memory to the accumulator. The sum is stored in the accumulator.
Example: ADD B (Add the contents of register B to the accumulator).
➢ SUB (Subtract Register or Memory): Subtracts the content of a
register or memory from the accumulator. The result is stored in the
accumulator. Example: SUB C (Subtract the contents of register C
from the accumulator).

Instruction Classification – Arithmetic Operations
➢ INR (Increment Register): Increments the content of a register or
memory by 1. The result is stored in the accumulator.
➢ Example: INR B (Increment the contents of register B by 1).
➢ DCR (Decrement Register): Decrements the content of a register or
memory by 1. The result is stored in the accumulator.
➢ Example: DCR C (Decrement the contents of register C by 1).

Instruction Classification - Logical Operation
➢ These instructions perform various logical operations with the
content of accumulator.
➢ AND, OR, Exclusiove-OR – Any 8-bit number, or the contents of a
register, or of a memory location can be logically ANDed, ORed, or
Exclusive-ORed with the contents of the accumulator. The results are
stored in the accumulator.
➢ Example: ANA B (Perform AND between A and B, and store
the result in A).
➢ Example: ORA B (Perform OR between A and B, and store the
result in A).
➢ Example: XRA C (XOR the contents of register C with A).

➢ Rotate : Each bit in the accumulator can be shifted either left or right
to the next position
➢ RLC: Each binary bit of the accumulator is rotated left by one
position.
➢ RRC: Each binary bit of the accumulator is rotated right by
one position

➢ Compare : Any 8 bit number, or the content of a register, or a
memory location can be compared for equality, greater than, or less
than, with the content of the accumulator.
➢ Complement: The contents of the accumulator can be
complemented; all zeroes are replaced by ones and all ones are
replaced by zeroes.
➢ Example : CMA (Complement the accumulator). If
Accumulator contains the value 06, then the complement of
Accumulator is 249.

Instruction Classification - Branching Operation
➢ These instructions are used to alter the flow of control in the program.
➢ JMP (Jump): Unconditional jump to a specified memory location.
➢ Example: JMP 2050H (Jump to address 2050H).
➢ JC (Jump if Carry): Jump to a specified address if the carry flag is set.
➢ Example: JC 2050H (Jump to 2050H if carry flag is set).
➢ JZ (Jump if Zero): Jump to a specified address if the zero flag is set.
➢ Example: JZ 2050H (Jump to 2050H if zero flag is set).

Instruction Classification - Branching Operation
➢ CALL (Call Subroutine): Calls a subroutine at a specified memory
address.
➢ Example: CALL 3000H (Call subroutine at address 3000H).
➢ RET (Return from Subroutine): Return from a subroutine.
➢ Example: RET (Return from the current subroutine).

Instruction Classification - Machine Control Operations
➢ These instructions control the processor’s execution, such as halting
the program (HLT) or enabling interrupts.

Lecture Notes Microprocessor and Controller Unit2

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