Module vi
- 1. MODULE VI CONTROL LOGIC DESIGN 1
- 2. Control and data-processor interaction 2
- 3. Control Organization Four Methods: 1. One flip-flop per state method 2. Sequence register and decoder method. 3. PLA control 4. Microprogram control 3
- 4. One flip-flop per state method 4
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- 6. Control logic with sequence register and decoder 6
- 7. PLA Control(Programmable Logic Array) 7
- 9. Hard-wired Control The Design is carried out in five steps: 1. The problem is stated. 2. An initial equipment configuration is assumed. 3. An algorithm is formulated. 4. The data-processor part is specified. 5. The control logic is designed. 9
- 10. Statement of the Problem: The problem here is to implement with hardware the addition and subtraction of two fixed point binary numbers represented in sign magnitude form. Compliment arithmetic may be used, provided the final result is in sign - magnitude form. The addition of two numbers stored in registers of finite length may result a sum that exceeds the storage capacity of the register by one bit. The extra bit is said to cause an overflow.The circuit must provide a flip-flop for storing a possible overflow bit. 10
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- 17. Design of Hard-wired Control 17
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- 23. Microprogram Sequencer Address sequencing capabilities of a typical sequencer: 1. increments the present address for control memory 2. Branches to an address as specified by the address field of the microinstruction 3. Branches to a given address if a specified status bit is equal to 1. 4. Transfers control to a new address as specified by an external source. 5. Has a facility for subroutine call and returns. 23
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