![15
Multiphase Converters
Atif Iqbal
Qatar University, Doha, Qatar
Shaikh Moinoddin
Aligarh Muslim University, Aligarh, India
Salman Ahmad
Aligarh Muslim University, Aligarh, India
Mohammad Ali
Aligarh Muslim University, Aligarh, India
Adil Sarwar
Aligarh Muslim University, Aligarh, India
Kishore N. Mude
University of Porto, Porto, Portugal,
Amrita Vishwa Vidyapeetham
University, Bengaluru, India
15.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457
15.2 Types and Topologies of Multiphase Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460
15.2.1 Multiphase AC-DC Converters • 15.2.2 Multiphase DC-DC
Converters • 15.2.3 Multiphase DC-AC Converters • 15.2.4 Multiphase AC-AC Converters
15.3 Multiphase Multipulse AC-DC Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464
15.3.1 Five Phase Uncontrolled Full Wave Bridge Rectifier • 15.3.2 Five-Phase Controlled Full
Wave Bridge Rectifier • 15.3.3 Multipulse Rectifiers • 15.3.4 Single-Way Multiphase Systems
Topologies • 15.3.5 Six-Phase AC to DC Converters
15.4 Multiphase DC-AC Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
15.4.1 Modeling and Control of a Five-Phase Voltage Source Inverter • 15.4.2 Carrier-Based
PWM • 15.4.3 Modeling and Control of a Seven-Phase VSI-Square Wave Mode • 15.4.4 Space
Vector PWM Techniques for a Seven-Phase Voltage Source Inverter
15.5 Multiphase AC-AC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 508
15.5.1 Introduction • 15.5.2 Brief Review • 15.5.3 Defining the Voltage Transfer
Ratio • 15.5.4 Simplified Modulation Strategy • 15.5.5 Other Control Techniques • 15.5.6 Future
Prospects
15.6 Multiphase DC-DC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
15.6.1 Multiphase Interleaved Buck Topology • 15.6.2 Synchronous Multiphase Buck
Topology • 15.6.3 Multiphase Boost Converter • 15.6.4 Coupled Inductor for
Multiphase Buck • 15.6.5 Advantages of Multiphase DC-DC Converters
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528
15.1 Introduction
Multiphase converters refer to converters with more than three
phases and are the extension of three-phase converters by add-
ing extra legs. From hardware point of view, there is least dif-
ference. However, control becomes more flexible and complex,
and higher degrees of redundancies are available. Multiphase
power converters have gained popularity in the last decade
because of the developments in the field of high-power switch-
ing devices and computational platform such as high-speed
digital signal processors and high-density field-programmable
gate arrays. The major push in the area of multiphase converter
is seen due to concern in developing clean transportation sys-
tems, renewable energy generation system (especially wind
energy system), and developing high-reliability variable-speed
electric drive system. Multiphase power converters are used in
numerous applications depending upon their role so as to
convert AC to DC, DC to AC, AC to AC, or DC to DC. The
major applications of DC to AC converters are found in
adjustable-speed drives, while AC to AC and AC to DC are
employed in multiphase renewable energy generation system.
Multiphase DC-DC converter finds its application in automo-
tive industry.
Multiphase power converter (DC-AC and AC-AC) fed
adjustable-speed drives offer numerous advantages when com-
pared with three-phase drives. The major advantages offered
are enhanced torque density (since in concentrated winding
multiphase electric machine low-order harmonics also contrib-
ute to the torque production unlike three-phase machines
where only fundamental current components generate torque),
lower torque pulsation, and higher frequency pulsation. The
electromagnetic torque of inverter-fed induction motor drive
possesses a considerable amount of ripple especially at low
speed [1,2]. This arises due to the interaction of higher-order
current harmonics with fundamental air-gap flux and
higher-order air-gap harmonics with fundamental current.
Sixth-harmonic pulsating torque is dominant in a three-phase
induction motor when inverter feeding the motor operated
Copyright © 2018 Elsevier Inc. All rights reserved.
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![in six-step mode. In a five-phase drive the most dominant
pulsating torque is a 10th harmonic and as such for n-phase
it is 2nth harmonic torque. Other advantages are lower
per-leg current rating for the same voltage rating (due to lower
current rating series and parallel switch combination is not
required and hence cheaper solution is achieved), greater fault
tolerance (machine can start and run even with loss of one or
more phase supply), lower dc link current harmonics and lower
harmonic losses.
Multiphase electric machines are becoming more popular in
the range of medium- and high-power applications [1–5]. Con-
sidering an inverter-fed high-power electric motor with power
rating exceeding the available rating of power semiconductor
switches, the designer has to increase the number of feeding
inverters. This implies higher number of phases on the stator
of the electric motor as well. Two solutions can be sought for
segmenting the power, either increase the number of phases
in multiple of three (parallel-connected multiple three-phase
inverters) or increase the number of legs of inverter with each
leg handling a power of P/n (P is the total power, and n is the
number of phases). The design solutions are shown in Fig. 15.1.
The solutions given in Fig. 15.1B have n number of parallel-
connected three-phase inverters each carrying power of P/n.
The supplied motor has multiple three-phase windings with
separate neutral points. The major advantage of these off-
the-shelf standard three-phase inverters is to supply the motor
with each inverter handling lower amount of power. However,
the major issue of this drive topology is the circulating current
due to the voltage mismatch of each three-phase inverter. The
electric motor in this case is called asymmetrical or split-phase
motor. This solution is preferred and most widely used in
industries because of the fact that the three-phase system solu-
tion is well proved and a mature technology:
Solution of Fig. 15.1C, in contrast to the previous solution,
works with a single inverter of n-phases supplying electric
motor of n-phase. Each phase or leg now handles P/n power,
and the circulating current is absent. The electric motor in this
case is called symmetrical n-phase motor. This solution is also
employed in high-power marine drive applications [6].
Reliability and fault tolerance are other driving forces leading
to the development of multiphase system. Due to high phase
number, fault tolerance is inherently guaranteed, which is of
high importance in safety critical applications such as ship pro-
pulsion, more electric aircrafts, electric vehicles, and industrial
setup where production loss is critical such as oil and gas plants
and military. The multiphase motor drive guarantees continu-
ous operation, however, with degraded performance under
fault conditions. The higher the phase number, the better is
the performance during faults. This make them highly attrac-
tive in applications mentioned above [7,8].
According to classical electric machine theory, the air-gap
flux harmonic content improves and becomes close to sinusoi-
dal with the increase in the number of phases. The improved
flux density waveform leads to: (i) reduced rotor losses due
to flux pulsation and eddy currents (this has importance for
high-speed permanent magnet machines since the eddy current
losses are very high at high speed in such kind of machines) and
(ii) improved torque quality with reduced amplitude of torque
pulsation that occurs at higher frequency (this is very impor-
tant when machine is subjected to high distorted current,
and limits are enforced on the maximum allowable torque
pulsation).
Multiphase generators, specially five phases and more, have
started to find a slot in the market due to their advantages over
three-phase counterpart [9,10]. This multiphase system could
be more suitable for direct drive wind energy, microturbines,
and electric vehicle applications since the need for gears can
be minimized. Multipulse rectifiers are employed, which have
Three-phase
Motor
Three-phase
DC/
AC converter
P
V
DC
(A)
n-Phase motor
(n=multiple
of 3)
Three-phase
DC/
AC converter
P/n
V
DC
Three-phase
DC/
AC converter
V
DC
Three-phase
DC/
AC converter
V
DC
P/n
P/n
(B)
n-Phase motor
n-Phase DC/AC
converter
P/n-per phase
V
DC
(C)
FIG. 15.1 (A) Three-phase drive, (B) multiple three-phase drive, and
(C) multiphase drive.
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![the ability to reduce the line current harmonic distortion and
normally do not require any LC filters or power factor improve-
ment devices. Multipulse DC can be obtained either by increas-
ing the number of phases of the converter or by the use of
phase-shifting transformer along with special secondary wind-
ing connections in the conventional six-pulse rectifiers. In drive
application, the use of phase-shifting transformer provides an
effective means to block common-mode voltages generated by
the rectifier and inverter, which would otherwise appear on
motor terminals, leading to a premature failure of machine
winding insulation. Normally AC-DC converters are classified
into power factor control rectifiers operated at high switching
frequency and line-commutated rectifiers (uncontrolled or con-
trolled) operated at power frequency or generated frequency.
The multiphase line-commutated converter normally offers
simple control, simple construction, and low cost but suffers
from poor input power factor, low input current THD, and uni-
directional current flow. The shortcoming of line-commutated
rectifiers is overcome by the use of high-switching-frequency
PWM rectifiers, voltage-source rectifiers, or current-source rec-
tifiers, but the switch current and voltage limitation may restrict
the use of PWM rectifiers in high-power applications.
Multiphase DC-AC voltage-source inverter is obtained from
three-phase voltage-source inverter by adding extra legs (each
leg has two switches in two-level inverter and a higher number
of switches for multilevel inverter). The two switches of the
same leg are complimentary in operation (i.e., when upper
switch is on, the lower switch must be off and vice versa).
The power switches can assume only two states, that is, on
(called level 1) or off (called level 0). Hence, as such for n-phase
inverter, there can be 2n
number of switching states. Consider-
ing a three-phase inverter, the number of switching states are 8,
and, for example, for a nine-phase inverter, the number of
switching states are 29
¼512 [5]. It is seen that the number of
switching states increases significantly with the increase in
the number of phases or legs. Higher numbers of switching
states offer flexibility in devising control techniques. Thus, mul-
tiphase inverter control has several degrees of flexibility in con-
trol. Multiphase inverter can be controlled using different
PWM techniques such as carrier-based sinusoidal PWM, har-
monic injection PWM, selective harmonic PWM, hybrid PWM,
and space-vector PWM. Each method can produce different
output magnitudes. Simple carrier-based PWM for multiphase
inverters works exactly the same as for three-phase inverters.
The maximum possible output phase-to-neutral voltage is
0.5 VDC, where VDC is DC-link voltage magnitude for multi-
phase inverter [1]. However, the output phase-to-neutral volt-
age magnitude varies for different phase numbers when using
space-vector PWM. Nevertheless, the output phase-to-neutral
voltage of multiphase inverters is less than that of a three-phase
inverter. Multiphase inverter space vectors are transformed into
multiple orthogonal planes, and control is implemented in
order to regulate each plane vectors. In multiphase variable-
speed drives (with distributed winding multiphase machine),
torque is controlled only from one plane vector (d-q), and
the rest of the plane vectors produce distortion and hence need
to be minimized using PWM techniques. When concentrated
winding multiphase machines are supplied using multiphase
voltage-source inverters, all plane vectors are used to enhance
the torque production. This is a unique feature of concentrated
winding multiphase machine not available in three-phase
machines. When implementing high-performance control such
as vector control and direct torque control, higher control flex-
ibility is available, and different solutions can be implemented.
Multiphase AC-AC converter more popularly known as mul-
tiphase matrix converter (MPMC) is also formulated by adding
extra legs in three-phase matrix converter configuration. They
are classified as direct matrix converters (DMC) and indirect
matrix converters (IMC). Each converter leg has three bidirec-
tional power switches each connected to one phase of the utility
grid system, and at the output, load is connected. The input is
fixed voltage and fixed frequency supply, while the output is of
variable voltage and variable frequency. There are configura-
tions where the number of input phases is three while the output
phase are more than three and vice versa [4,5]. The multiphase
matrix converter encompasses the advantages of three-phase
matrix converters and multiphase systems. The major applica-
tion areas are envisaged in multiphase wind energy system.
A matrix converter can be seen as an array of mn bidirec-
tional power semiconductor switches that can transform
m-phase fixed voltage and fixed frequency input to n-phase var-
iable voltage and variable frequency output without intermedi-
ate DC conversion stage. The input side of a matrix converter is
voltage fed, while the output side is current fed, and hence, an
inductive filter is required at the output side, and a capacitive
filter is used at the input side. As the load is itself of inductive
nature, the requirement of output filter diminishes. The size of
the input filter used in matrix converter is significantly smaller
than an equivalent voltage-source inverter.
Considering an mn matrix converter, the number of
switching states is 2mn
. Large numbers of switching states
are produced; however, not all of them are useful. Due to the
nature of input (being voltage source) and output (being cur-
rent source), the input should not short-circuited, and the out-
put should not be open-circuited. As a consequence, only one
switch in each leg conducts at one instant of time, and hence, a
usable number of switching states are mn
. In matrix converter,
the output (sinusoidal) is formed from input (sinusoidal),
and hence, output can assume any level depending upon the
instantaneous value of the input. This makes the switching
logic of matrix converter quite complex. The output voltage
of a three-phase input and three-phase output matrix converter
is 86.6% of the input voltage. The output-voltage magnitude
reduces for higher phase number of outputs; for example,
for a three-phase input and five-phase output matrix con-
verter, it is 78.86% [11], and this value decreases further with
increase in the output number of phases. The output voltage
becomes higher than the input for mn matrix converter
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![for mn; for example, for a five-phase input and three-phase
output, it is 104.4%, and this value further increases as m is
increased [4,12].
Multiphase matrix converters are constructed from bidirec-
tional power switches that are realized in the same way as a
three-phase matrix converter. The modulation strategies are
complex and can be built upon the concept of three-phase
matrix converter. However, significant challenges exist in
obtaining proper modulation technique for a multiphase matrix
converter. Some modulation strategies discussed in the litera-
ture are carrier-based PWM, space-vector PWM, and direct-
duty-ratio-based PWM [13–19].
Multiphase matrix converters find its application in wind
energy generation [20], power system [21,22], and ship propul-
sion [23]. When used in multiphase energy generation, usually
the input side of the matrix converter is of higher phase, and
the output side is three-phase connected to either utility grid
or feeding isolated load. A 27-phase input and 3-phase output
matrixconverterof100 MWpower rating ispresented in[24,25].
Present-day advancement in powering processors invariably
uses multiphase buck converter topology because of higher out-
put current and low-voltage requirement. Single-phase buck
converter works well for low-voltage applications with currents
up to 25 A. Higher filtering requirement and efficiency issue
limits the use of single-phase topology in applications such
as voltage regulator module (VRM). Interleaving as technically
known reduces ripple currents at the input and output.
A multiphase buck converter reduces considerably the i2
R cur-
rent power dissipation in the controlled switches and inductors.
The distribution of current in various paths in a multiphase
converter reduces the current magnitude through the switches,
thereby reducing the switching losses. The output filter require-
ment decreases in a multiphase implementation due to the
higher frequency of ripple current as a result of ripple current
cancelation in the power stage for each phase. The single-phase
implementation has much higher ripple content. Load tran-
sient performance is also better because of the reduction in
energy stored in each output inductor. The lower the ripple cur-
rent is, the less the perturbation will be. The input capacitors
supply all the input current to the buck converter if the input
wire to the converter is inductive. Improvement in multiphase
topologies and their control strategies promise improved per-
formance compared to the conventional multiphase buck
converter.
This chapter is organized into five different sections covering
the topologies, operation, and control of different types of
multiphase power converters. Section 15.2 describes the types
and classifications of different multiphase power converters.
Section 15.3 is dedicated to AC-DC converters considering
multiphase and multipulse output. Section 15.4 is devoted
to DC-AC converters especially focusing on five-phase and
seven-phase voltage-source inverter. Section 15.5 covers the
description of multiphase AC-AC converters, and multiphase
DC-DC converters are discussed in Section 15.6.
15.2 Types and Topologies of Multiphase
Converters
The requirements for the current and voltage continue to
increase with an increase in power level, and systems become
more and more complex. The amount of current/voltage of
power source to meet such requirements usually needs a com-
bination of several power controllers to improve the thermal
stress of the individual power components. The driving mech-
anism for this combination leaves one with two choices: single
phase or multiphase.
Multiphase converters reduce the input and output current
ripples by interleaving the two or more stages of power con-
verters. By increasing the phase number, the output-voltage
ripple and the input capacitor size can be curtailed without
increasing the switching frequency of the power devices. Load
dynamic performance is significantly improved during tran-
sients due to lower-output-voltage ripple and smaller output
inductors. The low switching losses and driver circuit losses
of power semiconductor devices at relatively low switching fre-
quency and the reduced power losses due to equivalent series
resistance (ESR) of the capacitors help achieve overall high effi-
ciency of converters. For multioutput applications, multiphase
converters may also provide the benefit of smaller input side
capacitors.
Single-phase versus multiphase converters are as follows:
(1) Single-phase converters work well for low voltages and
up to certain amount of current say about 25 A, but
power dissipation and efficiency start to become an
issue at higher currents. One suitable approach is to
develop multiphase converters [26].
(2) The output filter requirements decrease in multiphase
implementation due to the reduced current in the power
stage for each phase. Compared with single-phase
approach, the inductance and inductor size are drasti-
cally reduced because of lower average current and
lower saturation current.
(3) Ripplecurrentcancelationinthe outputfilterstageresults
in a reduced ripple voltage across the output capacitor
compared with single-phase approach. This is another
reason why a multiphase converter is preferred.
(4) Load transient performance is improved due to the
reduction of energy stored in each output inductor.
The reduction in ripple voltage as a result of current
cancelation contributes to minimal output-voltage over-
shoot and undershoots because many cycles will pass
before the loop responds. The lower the ripple current
is, the less the perturbation will be.
Like single-phase or three-phase converters, multiphase con-
verters are classified as AC-DC, DC-AC, DC-DC, and AC-AC
converters. Multiphase converters are simple extension of
three-phase converters. As far as hardware is concerned, there
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![is not much difference. However, the control complexity
increases manyfold with the increase in the number of phases.
There are further classifications in these converters. The classi-
fication of multiphase converters is shown in respective section.
15.2.1 Multiphase AC-DC Converters
A significant amount of work is done on developing novel
topologies of multipulse AC-DC converters since they have
huge potential applications for unidirectional and bidirectional
power flow starting from six pulses to a large number of pulses.
The major advantage of adopting a higher pulse number is the
current ripple reduction.
The novel configurations in multiphase AC-DC converter
were developed of unidirectional and bidirectional topologies
with three or more number of phases. Classification of multi-
phase AC-DC converters is shown in Fig. 15.2, which is based
on power flow, number of pulse used, isolated and nonisolated
topologies, and various techniques used to improve AC current
profile and output DC voltage waveform [27]. Based on the
application and requirements, some systems require unidirec-
tional power flow, and some require bidirectional power flow.
Unidirectional systems use diode rectifiers and transformer
circuit configurations in isolated and nonisolated topologies.
The unidirectional topologies have configurations of six pulses
and its multiple. If the voltage difference is more between input
and output, then isolated configuration is useful, and if the
difference is less, nonisolated topologies are used. However,
these are further classified as bridge and full-wave rectifiers.
These types of full-wave multipulse converters (MPC) can also
be further classified whether it uses double star or tapped poly-
gon transformer secondary to create twelve phases to feed full-
wave diode rectifiers. Both configurations have their own merits
and demerits, but both MPC configurations show the same per-
formance in terms of device and transformer utilization.
On the other hand, the bidirectional AC-DC converters have
the power flow from AC mains to DC output or vice versa and
normally use thyristors with phase angle control to obtain wide
varying DC output voltages. These MPCs use multiple winding
transformers to generate higher number of the phases. Like
unidirectional, these MPCs are also divided as isolated and
nonisolated. These are mainly used to feed DC motor drives
and synchronous motor drives.
15.2.2 Multiphase DC-DC Converters
Multiphase topologies can be configured as a step-down
(buck), step-up (boost), buck boost, and even forward con-
verter. A multiphase DC/DC converter according to the pre-
sent invention includes a plurality of DC/DC converters
whose outputs are connected in common to supply electric
power to a load and a load state detection portion that detects
a state of the load connected to the plurality of DC/DC con-
verters and outputs a detection result. Multiphase DC-DC
converters classification is shown in Fig. 15.3.
15.2.3 Multiphase DC-AC Converters
Multiphase DC-AC converters are the main source of multi-
phase adjustable-speed drives. The major driving force behind
the adoption of multiphase motor drive is due to the power
segmentation in large number of converter legs. The power
switching devices have limited voltage- and current-handling
capabilities. Hence, when used in high-power application,
series-and parallel combination of devices are required. This
is cumbersome solution because of dynamic voltage sharing
problem among the series-/parallel-connected power switching
devices. Better solution is obtained when the power per phase
or per leg is reduced by increasing the number of phases or
number of legs, and this is termed as multiphase DC-AC
Multiphase AC-DC
converters
Diode rectifiers
(uncontrolled)
Single way Isolated
SCRs/IGBTs
(controlled)
Non isolated Isolated Non isolated
Bridge type Full wave Bridge type Full wave 6/12/18/24 pulse
converters
6/12/18/24 pulse
converters
6/12/18/24 pulse
converters
12/18 pulse
converters
6/12/24 pulse
converters
6/12/18/24 pulse
converters
FIG. 15.2 Multiphase AC-DC converter classification.
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![inverters. Multiphase DC-AC inverters are simple in design as
they are simple extension of three-phase DC-AC inverter.
However, they offer large degree of switching redundancies
and hence great flexibility in control. Although control
becomes complex, the performance is improved manifold.
Multiphase DC-AC inverters can be built in the same topolo-
gies as that of their three-phase counterparts and hence have
the same calcifications and types. Multiphase AC-DC con-
verters normally classified as shown in Fig. 15.4.
First version of multiphase inverter technology is five-phase
VSI fed to star-connected five-phase load. Five-phase VSI
configuration found application for five-phase induction
machine and synchronous machine drives. Six-phase inverter
configuration was built with two two-level standard three-
phase VSIs, with two separate DC sources fed to dual three-
phase induction motor. Seven-phase VSI fed to star-connected
seven-phase load based on multiple space-vector modulation
and seven-phase VSI configuration found applications for
seven-phase permanent magnet synchronous and synchronous
reluctance motor drives. Fig. 15.5 shows simple five-phase
induction motor drive.
Multiphase inverters are also classified as cascaded H-bridge,
diode clamped, and flying capacitor topologies. They can also
be built in hybrid configuration. Multiphase impedance-source
inverters (ZSI) and quasi impedance-source inverters (qZSI)
are also reported in the literature [28]. ZSI and qZSI are special
inverters that have the capability of boosting the source voltage
and inverting DC to AC simultaneously. The boosting can be as
high as 200%–300%. They are popular in solar PV applications
since boosting and inversion is done in a single stage. Multi-
phase ZSI/qZSI is used to feed multiphase motor drives.
15.2.4 Multiphase AC-AC Converters
MultiphaseAC-AC converters are generallyclassified asACvolt-
age controllers, matrix converters, and cycloconverters. Fig. 15.6
shows various topologies of multiphase AC-AC converters. AC
voltage regulators are further classified as phase-controlled con-
verters and fully controlled voltage converters.
Three-phase cycloconverters are of several types. For example,
there are the 3-pulse cycloconverters, 6-pulse cycloconverters,
and 12-pulse cycloconverters. Typically, the three-pulse con-
verter is built with the three single, and the six-pulse converter
is generally the combination of two three-pulse converters and
Multiphase DC-DC
converters
Multiphase
buck converter
Multiphase
boost converter
Multiphase Buck
boost converter
Unidirectional
converter
Bidirectional
converter
Unidirectional
converter
Bidirectional
converter
Unidirectional
converter
Bidirectional
converter
FIG. 15.3 Multiphase DC-DC converter classification.
5-phase
motor
Cell-1
AC/DC
converter
1-phase AC 5-phase AC
van
ven
Cell-2
AC/DC
converter
FIG. 15.5 Simplified five-phase drive.
Multiphase DC-AC
converters
Two level
5-Phase
Multilevel
Flying
capacitor
3-Phase n-Phase
6-Phase
Cascaded
H-Bridge
Diode
clamped
FIG. 15.4 Multiphase DC-AC converter classifications.
462 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-6-320.jpg)
![so on. The 12-pulse converter is obtained by connecting two six-
pulse configurations in series and appropriate transformer con-
nections for the required phase shifted. Multiphase AC-AC
converter classification is shown in Fig. 15.6. By using the knowl-
edge of constructing a DC-modulated single-stage AC/AC
converter, a multistage AC/AC converter can be easily obtained.
Examples with complex structures are Luo converter, superlift
Luo converter, and multistage cascaded boost converter. Using
the same technique, one can construct DC-modulated multi-
phase AC/AC converters where they are classified as multiphase
AC/AC buck, boost, and buck-boost converter.
Cycloconverters are broadly classified as naturally commu-
tated and forced commutated. The later one is also known as
matrix converter. Multiphase matrix converters are in study
and are being studied in detail [4]. Fig. 15.7 shows some of
the possible configurations of frequency changers. The one
Multiphase AC-AC
converters
AC-AC voltage
regulator converters
Multiphase
phase controlled
AC voltage converter
Fully controlled
multiphase AC
voltage controller
Cycloconverters
With DC
energy storage
Without DC
energy storage
Hybrid
3-phase 3-pulse
converter
3-phase 6-pulse qud
converters
Matrix
converters
DC modulated multiphase
AC to AC converter
Buck converter
Boost
converter
Buck boost
converter
FIG. 15.6 Multiphase AC-AC converter classification.
Multiphase frequency
converters
With DC-link
VSR-VSI CSR-CSI
Without DC-link
(MPMC)
Direct
(DMMC)
Indirect
(IMMC)
Sparse MC
(SMC)
Ultra sparse MC
(USMC)
Multilevel
DMMC
Impedance-source MPMC
Possible topologies for
research
FIG. 15.7 Multiphase frequency changers. VSR, voltage source rectifier; VSI, voltage source inverter; CSR, current source rectifier; CSI, current source
inverter; MPMC, multiphase matrix converter; DMMC, direct multiphase matrix converter; IMMC, indirect multiphase matrix converter; SMC, sparse
matrix converter; USMC, ultra sparse matrix converter.
463
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-7-320.jpg)
![half-wave symmetry, the Fourier coefficients will be calculated
as follows:
bn ¼ 0 (15.7)
an ¼
1
π=10
ð
π
10
π
10
1:9021Vm cos ωt
ð Þ cos nωt
ð Þd ωt
ð Þ
¼ 6:067Vm
n + 1
ð Þ sin n1
ð Þ
π
10
h i
+ n1
ð Þ sin n + 1
ð Þ
π
10
h i
n2 1
ð Þ
8
:
9
=
;
an ¼
12:134Vm
n2 1
ð Þ
n sin
nπ
10
cos
π
10
cos
nπ
10
sin
π
10
n o
(15.8)
If the frequency of the source voltage is f, the output voltage has
harmonics at 10f, 20f, 30f …etc. Eq. (15.8) is simplified as
an ¼
12:134Vm
n2 1
ð Þ
cos
nπ
10
sin
π
10
n o
an ¼
3:75Vm
n2 1
ð Þ
cos
nπ
10
(15.9)
The DC component is found by putting n¼0 in Eq. (15.9), and
its value is
VDC ¼
a0
2
¼ 1:87Vm (15.10)
This is the same value as calculated in Eq. (15.5). The Fourier
series of the load voltage can be written as
vL t
ð Þ ¼
a0
2
+
X
∞
n¼10,20,⋯
an cos nωt
ð Þ (15.11)
After substituting the values of the coefficients, we obtain
vL t
ð Þ ¼ 1:87Vm 1
X
∞
n¼10,20,⋯
2
n2 1
ð Þ
cos
nπ
10
cos nωt
!
(15.12)
vL t
ð Þ ¼ 1:87Vm 1 +
2
99
cos 10ωt
2
399
cos 20ωt + ⋯
(15.13)
Fig. 15.12 shows the load voltage harmonics profile. Since each
diode conducts one fifth of the time, the average diode current
is given by Eq. (15.14).
ID,avg: ¼
1
2π
ð
7π
10
3π
10
IDCd ωt
ð Þ
2
6
4
3
7
5 ¼ 0:2IDC (15.14)
Eq. (15.14) indicates that a five-phase rectifier will have
switches with lower ratings as compared with the three-phase
counterpart, provided that both are feeding the same load as
average value of switch current in three-phase system is
33.33% and in this case it is 20% [9,10]. The input phase current
can be expressed as
is ¼
X
∞
n¼1,3,5....
4IDC
nπ
sin
nπ
5
sin nωt
ð Þ (15.15)
The fundamental component of input current is
is1 ¼ 0:7484IDC sin ωt
ð Þ (15.16)
The rms value of the fundamental component of input current is
Is ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1
π
ð
7π
10
3π
10
I2
DCdωt
v
u
u
u
u
t ¼
ffiffiffi
2
5
r
IDC (15.17)
PROBLEM 15.1 A five-phase bridge rectifier delivers
60 A current at a voltage of 317.5 V to a purely resistive
load. If the frequency of the source is 60 Hz, determine
the following:
(a) Efficiency of rectification
(b) Form factor
(c) Ripple factor
(d) Peak inverse voltage (PIV) of each diode
(e) Peak current through a diode
10 20 30 40 50 60 70
0
Harmonics order
Harmonics
magnitude
2.02%
0.5%
0.22%
0.13%
100%
0.08% 0.05% 0.04%
1
2
1.5
0.5
FIG. 15.12 Harmonics profile of output voltage.
466 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-10-320.jpg)
![SOLUTION Since VDC ¼1.87087Vm and Vrms ¼
1.87101Vm and also IDC ¼VDC/R and Irms ¼Vrms/R,
(a) Efficiency of rectification η ¼
Pac
PDC
¼
Vrms
2
R
VDC
2
R
¼
1:87107
ð Þ2
1:87087
ð Þ2 ¼ 99:97%
(b) Form factor FF ¼
Vrms
VDC
¼
1:87107
187087
¼ 100:011%
(c) Ripple factor RF ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
FF2 1
p
¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1:00011
ð Þ2
1
q
¼
1:483%
(d) Peak inverse voltage of each diode¼1.902Vm
Also, since VDC ¼1.87087 Vm and peak value of
phase voltage, Vm ¼
VDC
1:87087
¼
317:5
1:87087
¼ 169:70V
Hence, PIV ¼ 1:902169:70 ¼ 322:78V
(e) The average DC current through each diode is
IDC Diode
ð Þ ¼
IDC
5
¼
60
5
¼ 12A
Also, IDC Diode
ð Þ ¼ 4
π
ð
π
10
0
Im cos ωtdωt
IDC ¼ 0:19673Im
Im ¼
IDC
0:19673
¼
12
0:19673
¼ 61A
15.3.2 Five-Phase Controlled Full Wave Bridge
Rectifier
Whenever a diode is in forward-biased condition, it conducts,
but a thyristor (or controlled switch) requires a triggering signal
for its conduction. If all the diodes of a 10-pulse full-wave
uncontrolled converter are replaced by controlled switches (thy-
ristors), it becomes a controlled converter. Fig. 15.13 shows the
basic power circuit of a fully controlled 10-pulse 5-phase
AC-DC converter. In this case, the thyristors are switched at
an interval of 36 degrees sequentially as shown in Table 15.1.
When T1 and T2 are conducting van and vbn voltages with
respect to neutral appear at the load, that is, vad ¼van vdn,
which is the line voltage VL (vad ¼ 1:9021Vm sin ωt
ð π=10Þ).
At ωt¼π/2+α, T1 is commutated, as on this instant of time
vbn van, and the load current is transferred from T1 to T3.
There are 10 voltage pulses, and the instantaneous output volt-
age may become negative for an RL load, but the Vdc will always
have positive value, except for an active (RLE) load. It should be
noted that the line voltage corresponding to the nonadjacent
phase voltages is only appearing across the load. AC voltages
applied to the rectifier is given by Eq. (15.1).
The delay angle reference is taken from the point the thyris-
tor would begin to conduct if it were a diode. Thus, the delay
angle is an interval from the thyristor being forward-biased and
till the gate signal is applied. The corresponding waveforms are
shown in Fig. 15.14A–H [9,10]. Since each voltage pulse corre-
sponds to the line voltage and it appears for 1/10th period of the
cycle 2π/10, the average output voltage corresponding to vad
shown in Table (15.1) is given by
VDC ¼
1
2π
10
ð
7π
10 + α
5π
10 + α
1:902Vm sin ωt π=10
ð Þd ωt
ð Þ
VDC ¼
51:902Vm
π
cos ωt π=10
ð Þ
½
7π
10 + α
5π
10 + α
VDC ¼ 1:87Vm cos α
(15.18)
T1 T3 T5 T7 T9
T6 T8 T10 T2 T4
van ia
ia
ib
ic
id
ie
vbn
vcn
vdn
ven
n
IDC
p
q
wt
L
o
a
d
van
vbn
vcn
vdn
ven
72
degrees
FIG. 15.13 Five-phase full-wave bridge rectifier basic circuit.
TABLE 15.1 Thyristor firing instants and output voltage across the load
Time interval Thyristor fired Conducting thyristor Output voltages across load
[π/10+α, 3π/10+α] T10 T9 and T10 vo ¼ vec ¼ 1:902Vm sin ωt + 3π=10
ð Þ
[3π/10+α, 5π/10+α] T1 T10 and T1 vo ¼ vac ¼ 1:902Vm sin ωt + π=10
ð Þ
[5π/10+α, 7π/10+α] T2 T1 and T2 vo ¼ vad ¼ 1:902Vm sin ωt π=10
ð Þ
[7π/10+α, 9π/10+α] T3 T2 and T3 vo ¼ vbd ¼ 1:902Vm sin ωt 3π=10
ð Þ
[9π/10+α, 1π/10+α] T4 T3 and T4 vo ¼ vbe ¼ 1:902Vm sin ωt π=2
ð Þ
[11π/10+α, 13π/10+α] T5 T4 and T5 vo ¼ vce ¼ 1:902Vm sin ωt 7π=10
ð Þ
[13π/10+α, 15π/10+α] T6 T5 and T6 vo ¼ vca ¼ 1:902Vm sin ωt 9π=10
ð Þ
[15π/10+α, 17π/10+α] T7 T6 and T7 vo ¼ vda ¼ 1:902Vm sin ωt + 9π=10
ð Þ
[17π/10+α, 19π/10+α] T8 T7 and T8 vo ¼ vdb ¼ 1:902Vm sin ωt + 7π=10
ð Þ
[19π/10+α, 21π/10+α] T9 T8 and T9 vo ¼ veb ¼ 1:902Vm sin ωt + 5π=10
ð Þ
467
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![an ¼
1
π
ð
2π
0
ia cosnωt dωt
an ¼
1
π
ð
7π
10 + α
3π
10 + α
IDC cosnωt dωt
ð
17π
10 + α
13π
10 + α
IDC cosnωt dωt
2
6
6
4
3
7
7
5
an ¼
4IDC
nπ
sin
nπ
5
sinnα, n ¼ 1,3,5,… (15.24)
Similarly,
bn ¼
1
π
ð
2π
0
ia sin nωtdωt
bn ¼
1
π
ð
7π
10 + α
3π
10 + α
IDC sin nωtdωt
ð
17π
10 + α
13π
10 + α
IDC sin nωtdωt
2
6
6
4
3
7
7
5
bn ¼
4IDC
nπ
sin
nπ
5
cos nα, n ¼ 1,3,5,… (15.25)
Therefore, the rms value of nth harmonics current will be
given by
In ¼
1
ffiffiffi
2
p a2
n + b2
n
1
2 ¼
2
ffiffiffi
2
p
nπ
IDC sin
nπ
5
(15.26)
and
φn ¼ tan1 an
bn
¼ nα (15.27)
n¼1 will give the rms value of fundamental component of the
input current:
I1 ¼
2
ffiffiffi
2
p
π
IDC sin
π
5
¼ 0:529IDC (15.28)
Hence, the input current can be given by
is ¼
X
∞
n¼1,3,5,…
4IDC
nπ
sin
nπ
5
sin nωt nα
ð Þ (15.29)
The fundamental input current, (substituting, n¼1), is
is1 ¼
4IDC
π
sin
π
5
sin ωt α
ð Þ ¼ 0:7484IDC sin ωt α
ð Þ (15.30)
The rms value of the input current can be calculated as
Irms ¼
1
2π
ð
2π
0
i2
dωt
2
4
3
5
1
2
¼
2
2π
ð
7π
10 + α
3π
10 + α
I2
DCdωt
2
6
6
4
3
7
7
5
1
2
¼
ffiffiffi
2
5
r
IDC ¼ 0:6324IDC
(15.31)
The total harmonic distortion (THD) is given by
THD ¼
ffiffiffiffiffiffiffiffiffiffiffi
I2
I2
1
1
s
¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
0:634IDC
ð Þ2
0:529IDC
ð Þ2 1
s
¼ 65:5% (15.32)
Displacement factor
DF ¼ cos φ1
ð Þ ¼ cos α
ð Þ ¼ cos α (15.33)
Power factor
PF ¼
cos α
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1 + THD2
p ¼
I1
I
cos α ¼
0:529IDC
0:634IDC
cos α ¼ 0:8365 cos α
(15.34)
The load current is constant as the load is considered highly
inductive; from Fig. 15.14F, it is clear that each switch operates
for 2π/5 period of time in one cycle; accordingly, the switch
average current can be calculated as
Isw_avg: ¼
1
2π
ð
7π
10 + α
3π
10 + α
IDCdωt
2
6
6
4
3
7
7
5 ¼ 0:2IDC (15.35)
When calculated, the switch current is only 20% of DC-link
current [10]. The harmonic factor (HFn) is defined as the nor-
malized harmonic current of the supply with respect to the fun-
damental component (In/I1) and is calculated using Eq. (6.36):
HFn ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
In
I
2
1
s
(15.36)
PROBLEM 15.2 A five-phase full-wave bridge-controlled
rectifier has an AC input of 120 V rms at 60 Hz and
100 Ω load resistor. The delay angle is α¼π/12 radians.
Determine the following:
(a) Average current in the load
(b) Power absorbed by the load
469
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-13-320.jpg)
![(c) Efficiency of the rectifier
(d) The expression for the input current
(e) THD
(f ) Power factor of the rectifier
(g) Form factor and ripple factor
SOLUTION
(a) Average load voltage VDC ¼ 1:87Vm cos α ¼ 1:87
ffiffiffi
2
p
120 cos π=12
ð Þ ¼ 306:53V
Average load current IDC ¼
VDC
R
¼
306:53
100
¼ 3:06A
(b) Power absorbed by the load PDC ¼ VDC IDC ¼
306:533:06 ¼ 938W
(c) The rms value of the output voltage Vrms ¼
1:902Vm
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1
2 + 5
2π sin π
5
cos 2α
q
Vrms ¼ 1:902120
ffiffiffi
2
p
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1
2
+
5
2π
sin
π
5
cos 2
π
12
r
Vrms ¼ 307:08V
and Irms ¼
Vrms
R
¼
307:08
100
¼ 3:071A
Therefore, efficiency η ¼
PDC
Pac
¼
VDCIDC
VrmsIrms
¼
306:533:06
307:083:071
¼ 99:46%
(d) The expression for the input current is ¼
X
∞
n¼1,3,5,…
4IDC
nπ
sin
nπ
5
sin nωt nα
ð Þ
is ¼
X
∞
n¼1,3,5,…
3:9
n
sin
nπ
5
sin nωt nπ=12
ð Þ
(e) The rms value of the input current I ¼
ffiffi
2
5
q
IDC ¼
ffiffi
2
5
q
3:06 ¼ 1:935A
The rms value of fundamental component of the
input current
I1 ¼
2
ffiffiffi
2
p
π
sin
π
5
IDC ¼ 0:5293:06 ¼ 1:6187
THD ¼
ffiffiffiffiffiffiffiffiffiffiffi
I2
I2
1
1
s
¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1:935
ð Þ2
1:6187
ð Þ2 1
s
¼ 65:5%
(f ) The power factor PF ¼
cos α
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1 + THD2
p ¼
cos π=15
ð Þ
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1 + 0:655
ð Þ2
q ¼
0:818
(g) Form factor FF ¼
Vrms
VDC
¼
307:08
306:53
¼ 1:0018 ¼ 100:18%
Ripple factor RF ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
FF2 1
p
¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1:0018
ð Þ2
1
q
¼
0:06 ¼ 6%
15.3.3 Multipulse Rectifiers
The multipulse uncontrolled rectifiers are suitable for VSI-fed
drives, while the controlled rectifiers are employed for CSI
drives. As the number of pulses per cycle increases, the output
waveform gets improved. There are identical multipulse recti-
fiers connected in either parallel, series, or separate modes to
achieve higher pulses in the output. Fig. 15.15 shows general
layout of 12-, 18-, and 24-pulse rectifier circuits [29,30]. If
we employ 10-pulse rectifiers, then we can obtain 20, 30, and
40 pulses in the output.
Six pulse
rectifier
Six pulse
rectifier
Phase shifting
transformer
VDC1
+
−
VDC2
+
−
VDC1
+
−
VDC2
+
−
VDC3
+
−
VDC1
+
−
VDC2
+
−
VDC3
+
−
VDC4
+
−
FIG. 15.15 Multipulse uncontrolled/controlled rectifier’s arrangement.
470 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-14-320.jpg)
![15.3.3.1 12-Pulse Series Type Controlled Rectifier
Two six-pulse controlled rectifiers are powered by a phase-
shifting transformer with two secondary windings in delta
and star connections. Therefore, the phase angle between both
secondary windings shifts 30 degrees each. In this case with
12 pulses per cycle, the quality of output-voltage waveform
would definitely be improved with low ripple content [29].
Fig. 15.15 shows circuit configuration of a 12-pulse series-
type controlled rectifier. A three-phase transformer with two
secondary and one delta-connected primary feeds the two
identical six-pulse controlled rectifiers. The upper three-phase
bridge is fed from Y-connected secondary winding while lower
with Δ-connected secondary winding. Therefore, this arrange-
ment will result in the phase angle shifts between both second-
ary windings by 30 degrees. The outputs of the two six-pulse
rectifiers are connected in series, and the conduction period
of the line current for each converter is 120 degrees.
Consider an idealized 12-pulse rectifier where the line induc-
tance Ls and the total leakage inductance Llk of the transformer
are assumed to be zero and the magnitude of the current is con-
stant (ripple-free) [29]. In practical case, the ripple in the DC
current will be relatively low due to the series connection of
the two six-pulse rectifiers, where the leakage inductances of
the secondary windings can be considered in series.
For the purpose of eliminating the dominate lower-order har-
monics in the line current ia, the line-to-line voltage va1b1 of the
Y-connected secondary winding (N2 turns) is in phase with the
primary winding (N1 turns) voltage vab, while the Δ-connected
secondary winding (N3 turns) voltage va2b2 leads vab by [29]:
δ ¼ ∠va2b2
∠vab ¼ 30 degrees (15.37)
For the sake of simplicity, let N1 ¼ N,N2 ¼ N=2 and
N3 ¼
ffiffiffi
3
p
=2N (i.e., N1-N2-N3 ¼1:0.5:0.866).
Therefore, the rms line-to-line voltage of each secondary
winding will become
Va1b1 ¼ Va2b2 ¼ Vab=2 (15.38)
Since the two rectifiers are series-connected, net output, or
load, voltage Vdc ¼Vdc1 +Vdc2 ; since the waveforms of Vdc1
and Vdc2 are phase shifted from each other by 30 degrees ,
therefore, the waveform of output voltage Vdc consists of
12 pulses per cycle of supply voltage. The current waveforms
are illustrated in Fig. 15.16, where ia1 and ic2a2 are the phase
currents of secondary Y and Δ windings, respectively, and i
0
a1
and i
0
c2a2 are the currents referred from secondary side to the
primary side. The waveforms of reflected current to primary
side of secondary Y-connected winding i
0
a1 will be identical
to that of ia1 except that the magnitude is changed in ratio of
the number of turns of the two windings. However, when ia2
is referred to the primary side, the reflected waveform does
not keep the same waveform and magnitude. This is due to
phase displacements of the harmonic current when they are
referred from Δ-Y windings. This phase displacement is advan-
tageous as it will lead to the cancelation of low-order predom-
inant fifth and seventh harmonics from the currents of
transformer primary winding and does not appear in the line
current, which is given by Eq. (15.39):
ia ¼ i’
a1 + i’
a2 (15.39)
The secondary (Y-connected) line current ia1 can be expressed
by Eq. (15.40):
L
o
a
d
IDC
c
vcn
n
N1
vab
va2b2
ia2
ic2a2
ib2c2
ia = i′a1+i′a2c2
d= 30 degrees
d = 0
ia2b2
ib
a2
b2
c2
a1
b1
c1
ia1
ib1
ic1
b
vbn
a
van
ic
N2
N3
ib2
ic2
FIG. 15.16 Twelve-pulse series-type controlled rectifier connection circuit.
471
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![ia1 ¼
2
ffiffiffi
3
p
π
Idc
sin ωt
1
5
sin 5ωt
1
7
sin 7ωt +
1
11
sin 11ωt
+
1
13
sin 13ωt
1
17
sin 17ωt
1
19
sin 19ωt + …
2
6
6
4
3
7
7
5
(15.40)
Since the waveform of current ia1 is of half-wave symmetry, it
does not contain any even-order harmonics. Current ia does
not contain any triple harmonics either due to the consider-
ation of balanced three-phase system. The line current in
Δ-connected secondary winding such as ia2 leads ia1 by
30 degrees, and the Fourier expression of current ia2 is given
by Eq. (15.41):
ia2 ¼
2
ffiffiffi
3
p
π
Idc
sin ωt + 30degrees
ð Þ
1
5
sin 5 ωt + 30degrees
ð Þ
1
7
sin 7 ωt + 30degrees
ð Þ
+
1
11
sin 11 ωt + 30degrees
ð Þ
+
1
13
sin 13 ωt + 30degrees
ð Þ
1
17
sin 17 ωt + 30degrees
ð Þ
1
19
sin 19 ωt + 30degrees
ð Þ + …
2
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
3
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
(15.41)
Similar equations for ib2 and ic2 can be obtained. The current
i0
a1, which is identical to ia1 in wave shape, can be expressed
in Fourier series by Eq. (15.42):
i’
a1 ¼
ffiffiffi
3
p
π
Idc sin ωt
1
5
sin 5ωt
1
7
sin 7ωt
+
1
11
sin 11ωt +
1
13
sin 13ωt…
(15.42)
The phase currents in the Δ-connected secondary windings
ia2b2, ib2c2, and ic2a2 can be obtained from its line currents using
the transformation given in Eq. (15.43):
ia2b2
ib2c2
ic2a2
2
6
6
4
3
7
7
5 ¼
1
3
1 1 0
0 1 1
1 0 1
2
6
6
4
3
7
7
5
ia2
ib2
ic2
2
6
6
4
3
7
7
5 (15.43)
The phase currents in the Δ-connected secondary winding
ia2b2, ib2c2, and ic2a2 have a stepped waveform, each step being
of 60 degrees in width whereas Id/3 and 2Id/3 the heights. The
expression for phase current in the Δ-connected secondary
winding can be written as Eq. (15.44).
ic2a2 ¼
2
π
ffiffiffi
3
p Idc
sin ωt + 30degrees
ð Þ
1
5
sin 5 ωt + 30degrees
ð Þ
1
7
sin 7 ωt + 30degrees
ð Þ
+
1
11
sin 11 ωt + 30degrees
ð Þ + ⋯
sin ωt + 150degrees
ð Þ
+
1
5
sin 5 ωt + 150degrees
ð Þ
+
1
7
sin 7 ωt + 150degrees
ð Þ
1
11
sin 11 ωt + 150degrees
ð Þ ⋯
2
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
3
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
(15.44)
On simplification of Eq. (15.44), we have
ic2a2 ¼
2
π
Idc
sin ωt +
1
5
sin 5ωt +
1
7
sin 7ωt +
1
11
sin 11ωt
+
1
17
sin 17ωt +
1
19
sin 19ωt + ⋯
2
6
4
3
7
5
(15.45)
Similarly, the expressions for the currents ia2b2 and ib2c2 can be
obtained. The corresponding reflected current to the primary
side can be obtained from Eq. (15.45); by multiplying with turn
ratio (N3 : N1 ¼
ffiffiffi
3
p
: 2), we can obtain Eq. (15.46) [31]:
i’
c2a2 ¼
ffiffiffi
3
p
π
Idc
sin ωt +
1
5
sin 5ωt +
1
7
sin 7ωt +
1
11
sin 11ωt
+
1
13
sin 13ωt +
1
17
sin 17ωt +
1
19
sin 19ωt
+
1
23
sin 23ωt +
1
25
sin 25ωt + ⋯
2
6
6
6
6
6
4
3
7
7
7
7
7
5
(15.46)
Therefore, the line current ia ¼ i’
a1 + i’
c2a2 can be written as given
in Eq. (15.47):
ia ¼
2
ffiffiffi
3
p
π
Idc
sin ωt +
1
11
sin 11ωt +
1
13
sin 13ωt
+
1
23
sin 23ωt +
1
25
sin 25ωt + ⋯
2
6
4
3
7
5 (15.47)
Different current waveforms are shown in Fig. 15.17. It is evi-
dent from Eq. (15.47) that the two dominant harmonics, 5th
and 7th, are absent along with 17th and 19th, which improves
the THD of this type of converter configuration drastically.
15.3.3.2 Pulse Parallel-Type Controlled Rectifier
In this case, the outputs of the two six-pulse rectifiers are con-
nected in parallel. Fig. 15.18 shows circuit configuration of a
12-pulse parallel-type controlled rectifier. The circuit in the fig-
ure simply uses an isolation transformer with a Δ-connected
primary, a Y-connected secondary, and a second Δ-connected
secondary to obtain 30 degrees (electrical degrees) phase shift.
Since the instantaneous outputs of the two rectifiers are not
472 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-16-320.jpg)
![equal, an interphase reactor is necessary to support the differ-
ence in instantaneous rectifier output voltages and permit each
rectifier to operate independently [29]. The line current in pri-
mary winding of the transformer is the sum of reflected cur-
rents from the two secondary windings, and it becomes
stepped due to 30 degrees phase shift in two secondary currents
as discussed in Section 15.3.3.1. Therefore, the harmonics and
requirement of filter circuit parameters are reduced. Theoreti-
cally, input current harmonics for rectifier circuit is a function
of pulse number and can be expressed as
H ¼ Np 1
(15.48)
where N¼1, 2, 3… and p is pulse number.
For example, in a three-phase six-pulse rectifier, the input
current will have harmonic components at 5, 7, 11, 13, 17,
19, 23, 25, 29, 31, etc. multiples of the fundamental frequency.
For the 12-pulse system shown in Fig. 15.16, the input current
will have theoretical harmonic components at 11, 13, 23, 25, 35,
37, etc. multiples of the fundamental frequency as derived and
discussed in Section 15.3.3.1. Since the magnitude of each har-
monic is proportional to the reciprocal of the harmonic order,
the 12-pulse system naturally has a lower harmonic distortion
in input current.
The problem with the parallel connection of the rectifiers is
that thetworectifiersmustshare exactlyequalcurrenttoachieve
the desired reduction in harmonics. This would be achieved if
output voltages of both secondary windings matches exactly.
Because of the differences in the transformer secondary imped-
ances and open-circuit output voltages, this can be practically
accomplished for a given fixed load (typically rated load), but
not for loads varying over a range. This is the main problem
of the parallel 12-pulse configuration connection. Whereas in
the case of series connection of two rectifiers, the problems asso-
ciated with current sharing are avoided, and an interphase reac-
tor is not required. Parallel connections are normally preferred
for applications where high current ratings rather than har-
monics are the issue [32]. Generally, series connection of recti-
fiers is much simpler to implement than the parallel connection.
L
o
a
d
N1
a2
b2
c2
a1
b1
c1
N2
N3
FIG. 15.18 Twelve-pulse parallel-type controlled rectifier connection
circuit.
p/2 p 3p/2 2p
wt
wt
wt
wt
wt
wt
i′c2a2
i′a1
ia
3
2IDC
2
IDC
3
2
IDC
2
IDC
3
2
IDC
3
2
IDC
3
IDC
3
IDC
3
1
2
1
IDC
7p/6
5p/6 11p/6 2p
p 5p/3
2p/3
p/2
p/3
p/6 4p/3 3p/2
ia1
0
ia2
ic2a2
IDC
IDC
(A)
(B)
(C)
(D)
(E)
(F)
FIG. 15.17 Current waveforms of the 12-pulse series-connected con-
trolled rectifier (Ls¼Llk¼0). (A) Output line/phase current in star-
connected secondary winding. (B) Output line current in delta-connected
secondary winding. (C) Output phase current in delta-connected second-
ary winding. (D) Delta-connected secondary winding phase current
reflected to primary side. (E) Star-connected secondary winding phase
current reflected to primary side. (F) Total current in the primary side.
473
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-17-320.jpg)
![15.3.4 Single-Way Multiphase Systems
Topologies
The structure of single-way, m-phase rectifier is shown in
Fig. 15.19. In single-way structures, only one diode conducts
for single stage, and the remaining diodes are blocked. Due
to this, single-way structures are more convenient while
increasing the number of phases. In an m-phase, the diodes
used in the rectifier circuits are divided into a number of groups
in star connection. Each group will have three diodes, that is,
for a six-diode rectifier, there will be two groups, and for a
12-diode rectifier, there will be four groups [31]. In a normal
connection, the star points will be connected together. But in
this circuit, each group will have its all secondary windings,
and instead of a direct connection, the star points will be con-
nected through an interphase transformer. The common neu-
tral point serves as the negative terminal of the DC output
circuit.
For single-way topologies, the number of output pulses is
equal to the number of phases, that is, p¼m, and the number
of diodes are equal to m. Each diode is conducting for 2π/m
electric radians. Fig. 15.19 shows few pulses of output-voltage
waveform for m-phase half-wave uncontrolled rectifier. In gen-
eral, for an m-phase system, the average and rms value of the
output voltage is expressed by Eqs. (15.49) and (15.50),
respectively:
VDC ¼
Vm
2π=m
ð
π
m
π
m
cos ωt d ωt
ð Þ¼
Vm sin
π
m
π=m
(15.49)
rms voltage Vrms ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1
2π=m
ð
π
m
π
m
Vm cos ωt dωt
ð Þ2
v
u
u
u
u
t
Vrms ¼ Vm
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ffi
1
2
1 +
sin
2π
m
2π
m
2
6
6
4
3
7
7
5
v
u
u
u
u
u
t (15.50)
The form factor and ripple factors are expressed by Eqs. (15.51)
and (15.52), respectively. From these equations, it is evident
that if m ! ∞ ) FF ! 1 and RF ! 0,
FF ¼
Vrms
VDC
¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ffi
1
2
1 +
sin
2π
m
2π
m
2
6
6
4
3
7
7
5
v
u
u
u
u
u
t
sin
π
m
π
m
(15.51)
RF ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1 FF
ð Þ2
q
(15.52)
which implies that by increasing the number of phases in a
multiphase, single-way rectifier, the output voltage is
improved, that is, it becomes smoother. By connecting to a con-
ventional three-phase mains distribution, it is possible to
increase the number of “phases” by using transformers with
m separated secondary coils. The secondary coils can be con-
nected in a large number of ways. Also, by increasing the num-
ber of phases (as stated before, in single-way topologies, m¼p),
the ripple frequency increases, and its amplitude decreases.
This fact simplifies the filter design to reduce the ripple in
the load [31,32]. The output waveform for m-phase half-wave
diode rectifier is shown in Fig. 15.20. For highly inductive load,
the output DC current may be considered as constant (IDC).
The diode average current, rms current, and form factor can
be obtained by Eqs. (15.53)–(15.55):
ID avg:
ð Þ ¼
IDC
m
(15.53)
ID rms
ð Þ ¼
IDC
ffiffiffiffi
m
p (15.54)
Kf ¼
ID rms
ð Þ
ID avg
ð Þ
¼
ffiffiffiffi
m
p
(15.55)
L
o
a
d
vs1
vs2
vs3
vsm
D3
D1
D2
Dm
VDC
IDC
FIG. 15.19 m-Phase, single-way rectifier.
2p/m
Vm
vs3
vs2
vs1
iL
FIG. 15.20 Output waveform for m-phase half-wave diode rectifier.
474 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-18-320.jpg)
![15.3.5.2 Six-Phase Double-Bridge Full-Wave
Uncontrolled Rectifiers
Two circuits of the six-phase bridge full-wave diode rectifiers
are shown in Fig. 15.24 and are called as a six-phase bridge cir-
cuit and hexagon bridge circuit [31]. In this case, each diode
conducts for 60 degrees in a cycle. The average output voltage
is given by Eq. (15.62):
VDC ¼
2
π=3
ð
2π
3
π
3
Vm sin ωtdωt ¼
6Vm
π
(15.62)
15.3.5.3 Six-Phase Half-Wave Controlled Rectifiers
The six-phase half-wave controlled rectifiers are shown in
Fig. 15.25 [31]. Each thyristor conducts for π/3 radians in a
cycle. The firing angle α¼ωtπ/3 in the range of 0–2π/3.
The average output voltage is
VDC ¼
1
π=3
ð
2π
3 + α
π
3 + α
Vm sin ωtdωt ¼
3Vm
π
cos α (15.63)
Load
Vm
Idc
VDC
Vm
Load
Vm
IDC
VDC
3Vm
(A) (B)
FIG. 15.23 Six-phase half-wave diode rectifiers: (A) Y/Y circuit and (B) Δ/Y circuit.
Load
Va
3Vm
VDC
IDC
Neutral line may or
may not be connected
Load
VDC IDC
3Vm
3Vm
Vm
(B)
(A)
FIG. 15.24 Six-phase full-wave uncontrolled rectifiers: (A) six-phase bridge circuit and (B) six-phase hexagon bridge circuit.
476 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-20-320.jpg)
![Vrms ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1
π=3
ð
2π
3 + α
π
3 + α
Vm sin ωt
ð Þ2
dωt
2
6
6
4
3
7
7
5
v
u
u
u
u
u
t
¼ Vm
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ffi
1
2
+
3
ffiffiffi
3
p
4π
cos α
s
(15.64)
FF ¼
Vrms
Vdc
¼ 1:0008 (15.65)
RF ¼
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1:00082
12
p
¼ 0:042 (15.66)
PF ¼ 0:956 (15.67)
From Eq. (15.63), it is clear that the output voltage can have
positive (απ/2) and negative (απ/2) values. When απ/
2, the output current is (IDC ¼VDC/R), and when the firing
angle α is π/2, the output voltage can have negative values,
but the output current can only have positive values.
15.4 Multiphase DC-AC Converters
15.4.1 Modeling and Control of a Five-Phase
Voltage Source Inverter
This section is devoted to the development of a comprehensive
model of a five-phase voltage-source inverter based on space-
vector theory [32,33]. Proper modeling of voltage-source
inverters is important in devising appropriate control algo-
rithm. The complete model is broadly classified into two
groups, namely, square-wave and PWM modes based on the
operation of the inverter. The leg voltages and line voltages
along with phase voltages are illustrated. The Fourier analysis
of output phase-to-neutral voltages and nonadjacent voltages is
performed for square-wave mode. The output phase-to-neutral
voltage is shown to be essentially identical to those obtainable
with a three-phase voltage-source inverter. At each step, simu-
lation results are provided to support the analytic approach
results. The relationship between the phase and line voltages
for a five-phase system is also established.
For high-power application, stepped operation of inverter is
preferred over PWM mode to avoid switching losses. Square-
wave mode of operation is elaborated for 180 degrees conduction
mode, and the performance is evaluated in terms of harmonic
content of phase-to-neutral voltages.
15.4.1.1 Modeling of a Five-Phase VSI
Power circuit topology of a five-phase VSI is shown in
Fig. 15.26. Each switch in the circuit consists of two power semi-
conductor devices, connected in antiparallel. One of these is a
fully controllable semiconductor, such as a bipolar transistor,
MOSFET, or IGBT, while the second one is a diode. The input
of the inverter is a DC voltage, which is regarded further on as
being constant. The inverter outputs are denoted in Fig. 15.26
with lowercase symbols (a, b, c, d, and e), while the points of
connection of the outputs to inverter legs have symbols in cap-
ital letters (A,B,C,D,E). The basic operating principles of the
five-phase VSI are developed in what follows assuming the ideal
commutation and zero forward voltage drops.
15.4.1.2 Square Wave Mode of Operation
Discrete switching of power switches in an inverter leads to
stepped wave output termed as square-wave operation of the
inverter. Conventionally, 180 degrees conduction mode is con-
sidered leading to 10-step output phase voltages from the
inverter. Each switch conducts for half of the fundamental cycle,
Vm
IDC
VDC
Vm
Load Load
Vm
IDC
VDC
3Vm
(A) (B)
FIG. 15.25 Six-phase half-wave controlled rectifiers: (A) Y/Y circuit and (B) Δ/Y circuit.
477
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-21-320.jpg)
![that is, 180 degrees. The operation of upper and lower switches is
complimentary in operation, that is, when upper switch is on, the
lower switch is off and vice versa. In real-time application, a dead
time isprovided between the turning onoflower switch and turn-
ing offofupperswitch andviceversa.The incoming powerswitch
cannot be turned on unless the outgoing switch is completely
turned off. There is a finite time for complete turnoff of a power
switching device, and hence, a dead time is to be provided. This is
done in order to avoid short circuit of the source side.
180 degrees conduction mode
Each switch is assumed to conduct for 180 degrees(half of the
fundamental cycle), and the phase delay between firing of two
switches in any subsequent two phases is equal to 360/5
degrees¼72 degrees. The driving control gate/base signals
for the 10 switches of the inverter in Fig. 15.26 are illustrated
in Fig. 15.27. One complete cycle of operation of the inverter
can be divided into 10 distinct modes indicated in Fig. 15.27
and summarized in Table 15.2. It follows from these that at
any instant in time there are five switches that are “ON” and
five switches that are “OFF.” In the 10-step mode of operation,
there are two conducting switches from the upper five and
three from the lower five or vice versa.
Space vector of phase voltages in stationary reference frame
is defined, using power variant transformation [33]:
v ¼
2
5
va + avb + a2
vc + a2
vd + a
ve
(15.68)
where a¼exp(j2π/5), a2
¼exp(j4π/5), a*¼exp(j2π/5),
a*2
¼exp(j4π/5), and * stands for a complex conjugate.
Leg voltages (i.e., voltages between points A,B,C,D, and E and
the negative rail of the DC bus N in Fig. 15.26) are considered
first. The leg voltages from Fig. 15.27 are substituted in expres-
sion (15.68) to obtain their corresponding space vectors given
as in Eq. (15.69):
v1leg
!
v2leg
!
v3leg
!
v4leg
!
v5leg
!
v6leg
!
v7leg
!
v8leg
!
v9leg
!
v10leg
!
2
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
3
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
¼
2
5
VDC 2 cos
π
5
ej0
ejπ=5
ej2π=5
ej3π=5
ej4π=5
ejπ
ej6π=5
ej7π=5
ej8π=5
ej9π=5
2
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
3
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
(15.69)
TABLE 15.2 Modes of operation of the five-phase voltage-source inverter
(10-step operation)
Mode Switches ON Terminal polarity
1 9,10,1,2,3 A+
B+
C
D
E+
2 10,1,2,3,4 A+
B+
C
D
E
3 1,2,3,4,5 A+
B+
C+
D
E
4 2,3,4,5,6 A
B+
C+
D
E
5 3,4,5,6,7 A
B+
C+
D+
E
6 4,5,6,7,8 A
B
C+
D+
E
7 5,6,7,8,9 A
B
C+
D+
E+
8 6,7,8,9,10 A
B
C
D+
E+
9 1,7,8,9,10 A+
B
C
D+
E+
10 8,9,10,1,2 A+
B
C
D
E+
5 5
5
5
2p 6p 7p 8p 9p
4p
3p
2p
0
p
p
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
1 2 3 4 5 6
Modes
5 5 5 5
8
7
10
9
FIG. 15.27 Gating signals of a five-phase voltage-source inverter in
square-wave mode.
P
N
1
6 8 10 2 4
3 5 7 9
A B C D E
a b c d e
n
Load
FIG. 15.26 Five-phase voltage-source inverter power circuit.
478 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-22-320.jpg)
![is verified using a star-connected resistive load and a five-phase
induction machine.
15.4.1.10 180 Degrees Conduction Mode
The inverter is operated in 180 degrees conduction mode, and a
five-phase star-connected resistive load is connected across the
output terminal. The resulting phase voltage, nonadjacent line
voltages are illustrated in Figs. 15.44 and 15.45, respectively.
It is observed that the phase voltage generated using cheap
analog-circuit-based inverter shown in Fig. 15.41 is identical
to the one obtained using DSP as shown in Fig. 15.44. Similarly,
the nonadjacent line voltage of Fig. 15.42 is identical to the one
shown in Fig. 15.45. This verifies the correct design of the
analog-based inverter and also verifies the DSP code. The same
study is carried out using a five-phase induction motor as a
load. The resulting voltage and stator current waveforms are
presented in Fig. 15.46. The waveform is typical for such load.
15.4.2 Carrier-Based PWM
15.4.2.1 With Zero Sequence Signal
Carrier-based sinusoidal PWM is the most popular and widely
used PWM technique because of their simple implementation
in both analog and digital realization [32,34]. The principle of
carrier-based PWM true for a three-phase VSI is also applicable
to a multiphase VSI. The PWM signal is generated by comparing
a sinusoidal modulating signal with a triangular (double edge) or
a saw-tooth (single edge) carrier signal. The frequency of the
carrier is normally kept much higher compared to the
FIG. 15.41 Output phase “a–d” voltages for 180 degrees
conduction mode.
FIG. 15.42 Nonadjacent line voltage for 180 degrees conduction mode
with DC-link voltage equal to 180 V.
FIG. 15.43 AC side input current for 180 degrees conduction mode.
FIG. 15.44 Output phase voltage for 180 degrees conduction mode.
486 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-30-320.jpg)
![t
n ¼
1
2
vn
ts (15.96)
where t +
n and t
n are the positive and negative pulse widths in
the nth sampling interval, respectively, and vn is the normalized
amplitude of modulation signal. The normalization is done
with respect to Vdc. Eqs. (15.95) and (15.96) are referred as
the equal volt-second principle as applied to a three-phase
inverter [32,35,36]. The normalized peak value of the triangular
carrier wave is 0:5 in linear region of operation. Modulator
gain has the unity value while operating in the linear region,
and peak value of inverter output fundamental voltage is equal
to the peak value of the fundamental sinusoidal signal. Thus,
the maximum output phase voltages from a five-phase VSI
are limited to 0.5 p.u. This is also evident in [32,37]. Thus,
the output phase voltage from a three-phase and a five-phase
VSI are the same when utilizing carrier-based PWM.
15.4.2.2 Sinusoidal Pulse Width Modulation (SPWM)
The simplest continuous carrier-based PWM is obtained with
the selection of the zero-sequence signal as vvN t
ð Þ ¼ 0. Modu-
lation signals for all five inverter legs are equal to five sinusoidal
fundamental signals. Thus, while operating in the linear region,
maximum value of the modulation index of the SPWM has the
unity value, MSPWM ¼ 1. Modulation index is defined as the
ratio of the fundamental component amplitude of the line-
to-neutral inverter output voltage to one-half of the available
DC bus voltage. Thus,
M ¼
V1
0:5Vdc
(15.97)
where V1 is the fundamental output phase voltage.
15.4.2.3 Fifth Harmonic Injection PWM
The effect of the addition of harmonic with reverse polarity in
any signal is to reduce the peak of the reference signal. Aim here
is to bring the amplitude of the reference as low as possible, so
that the reference can then be pushed to make it equal to the car-
rier, resulting in the higher output voltage and better DC bus uti-
lization. Using this principle, third harmonic injection PWM
scheme is used in a three-phase VSI that results in increase in
the fundamental output voltage to 0.575Vdc [32,35]. Third har-
monic voltages do not appear in the output phase voltages and
are restricted to the leg voltages only. Following the same prin-
ciple, fifth harmonic injection PWM scheme can be developed to
increase the modulation index of a five-phase VSI.
The reference leg voltages are given as
V∗
ao ¼ 0:5M1Vdc cos ωt
ð Þ + 0:5M5Vdc cos 5ωt
ð Þ
V∗
bo ¼ 0:5M1Vdc cos ωt 2π=5
ð Þ + 0:5M5Vdc cos 5ωt
ð Þ
V∗
co ¼ 0:5M1Vdc cos ωt 4π=5
ð Þ + 0:5M5Vdc cos 5ωt
ð Þ
V∗
do ¼ 0:5M1Vdc cos ωt + 4π=5
ð Þ + 0:5M5Vdc cos 5ωt
ð Þ
V∗
eo ¼ 0:5M1Vdc cos ωt + 2π=5
ð Þ + 0:5M5Vdc cos 5ωt
ð Þ
(15.98)
It is to be noted that fifth harmonic has no effect on the value
of the reference waveform when ωt ¼ 2k + 1
ð Þπ=10, since
cos 5 2k + 1
ð Þπ=10
ð Þ ¼ 0 for all odd k. Thus, M5 is chosen to
make the peak magnitude of the reference of (15.98) that occurs
where the fifth harmonic is zero. This ensures the maximum
possible value of the fundamental component. The reference
voltage reaches a maximum when
dV∗
ao
dt
¼ 0:5M1Vdc sin ωt 0:5 5M5Vdc sin 5ωt ¼ 0 (15.99)
This yield
M5 ¼ M1
sin π=10
ð Þ
5
for ωt ¼ π=10 (15.100)
Thus, the maximum modulation index can be determined
from
V∗
ao ¼ 0:5M1Vdc cos ωt
ð Þ0:5
sin π=10
ð Þ
5
M1Vdc cos 3ωt
ð Þ
¼ 0:5Vdc (15.101)
The above equation gives
M1 ¼
1
cos π=10
ð Þ
for ωt ¼ π=10 (15.102)
Thus, the output fundamental voltage is increased by 5.15%
higher than the value obtainable using simple carrier-based
PWM by injecting 6.18% fifth harmonic in fundamental. The
fifth harmonic is in opposite phase to that of the fundamental.
15.4.2.4 Offset or Triangular Zero-Sequence
Injection PWM
Another way of increasing the modulation index is to add an
offset voltage to the references. This will effectively do the same
function as above. The offset voltage is given as
Voffest ¼
Vmax + Vmin
2
(15.103)
where vmax ¼ max va, vb, vc, vd, ve
ð Þ and vmin ¼ min va, vb, vc;
ð
vd, veÞ. Note that this is the same as for a three-phase inverter.
In case of three-phase VSI, the offset voltage is simply third
harmonic triangular wave of 25% magnitude of fundamental.
The peak of the fundamental is 0.575 p.u., (0.406 p.u. rms), the
peak of the resultant modulating signal is 0.5 p.u. (0.353 p.u.
rms), and the peak of the offset is 0.147 p.u. (0.104 p.u. rms).
Hence, offset peak is 25% of the fundamental peak.
In a five-phase VSI, the offset is found as the fifth-harmonic
triangular wave of 9.55% of the fundamental input reference.
This value has been established by simulations. Offset addition
requires only addition operation and hence is suitable for prac-
tical implementation.
488 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-32-320.jpg)
![simple extension of method used in a three-phase inverter (use
oftwoadjacentlargelengthvectors)andsecond approachwhere
four adjacent vectors are used (two large and two medium
lengths). The first approach gives higher output voltage; how-
ever, the output voltages contain lower-order harmonics, more
specifically, the third and seventh. The second approach offers
sinusoidal output voltage; however, the magnitude is lower.
The first approach used only 10 outer large length vectors to
implement the symmetrical SVPWM. Two neighboring active
space vectors and two zero space vectors are utilized in one
switching period to synthesize the input reference voltage. In
total, 20 switchings take place in one switching period, so that
the state of each switch is changed twice. The switching is done
in such a way that, in the first switching half period, the first
zero vector is applied, followed by two active state vectors
and then by the second zero state vector. The second switching
half period is the mirror image of the first one. The symmetrical
SVPWM is achieved in this way. This method is the simplest
extension of space-vector modulation of three-phase VSIs.
An ideal SVPWM of a five-phase inverter should satisfy a
number of requirements. Firstly, in order to keep the switching
frequency constant, each switch can change state only twice in
the switching period (once “on” to “off” and once “off” to “on”
or vice versa). Secondly, the rms value of the fundamental phase
voltage of the output must be equal to the rms of the reference
space vector. Thirdly, the scheme must provide full utilization of
the available DC bus voltage. Finally, since the inverter is aimed
at supplying the load with sinusoidal voltages, the low-order
harmonic content needs to be minimized (this especially applies
to the third and seventh harmonic). These criteria are used in
assessing the merits and demerits of various SVPWM.
15.4.2.6 Space Vector PWM for Sinusoidal Output
The purpose here is to generate sinusoidal output phase voltages
using space-vector PWM. Application of two neighboring
medium active space vectors together with two large active space
vectors in each switching period makes it possible to maintain
zero average value in the second plane and consequently provid-
ing sinusoidal output. Use of four active space vectors per
switching period requires the calculation of four application
times, labeled here tal,tbl,tam,tbm. The expressions used for the
calculation of dwell times of various space vector are [32,38]
tal ¼
v∗
s
Vm sin π=5
ð Þ
τ
1 + τ2
ts sin
π
5
kα
tbl ¼
v∗
s
Vm sin π=5
ð Þ
τ
1 + τ2
ts sin α k1
ð Þ
π
5
tam ¼
v∗
s
Vm sin π=5
ð Þ
1
1 + τ2
ts sin
π
5
kα
tbm ¼
v∗
s
Vm sin π=5
ð Þ
1
1 + τ2
ts sin α k1
ð Þ
π
5
t0 ¼ ts tal tbl tam tbm
(15.104)
where ta ¼ tal + tam; tb ¼ tbl + tbm. This is in essence allocates
61.8% more dwell times to large space vectors compared with
medium space vector, thus satisfying the constraints of produc-
ing zero average voltage in the x-y plane. This can be more
clearly seen from Fig. 15.50.
It is seen from Fig. 15.50 that the vectors in x-y plane are in
such a position to cancel each other by using the dwell time
Eq. (15.104). The applications of active and zero space vectors
are arranged in such a way as to obtain a symmetrical SVPWM.
The space-vector disposition in sector I is illustrated in
Fig. 15.51. Modulation signals of SVPWM are identical to those
obtained with offset addition. Switching pattern is a symmetrical
PWMwith twocommutationsperinverterleg. Thespacevectors
are applied in odd sectors using sequence v31, val, vbm, vam;
½
vbl, v32, vbl, vam, vbm, val, v31, while the sequence is v31, vbl;
½
vam, vbm, val, v32, val, vbm, vam, vbl, v31 in even sectors.
It can be easily observed from Eq. (15.104) that the zero-vector
application time remains positive for 0 v∗
s 0:5257Vdc.
Thus, the output phase voltage from a VSI using this Space
Vector PWM scheme is 0.5257Vdc, which is 5.15% higher com-
pared with the output obtainable with carrier-based sinusoidal
PWM without harmonic injection and equal to the output
obtainable with zero-sequence (fifth-harmonic) signal injection.
p/5
v*
s
ta
va
ts
tb
vb
ts
d
q
v2
v
2
v1
v11
v12
v12
(A)
(B)
2p/5
v11
v1
y
x
FIG. 15.50 Principle of the calculation of vector application times,
(A) d-q plane and (B) x-y plane.
490 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-34-320.jpg)
![Simulation is carried out using Matlab/Simulink to imple-
ment the SVPWM with application of four active and a zero
vector. The resulting waveform and harmonic spectrum are
shown in Fig. 15.52. The average leg voltage is depicted in
Fig. 15.51, and it is observed that the leg voltage is now quite
similar to one obtained in three-phase VSI. The phase voltage
is completely sinusoidal without any low-order harmonics. The
spectrum of phase voltage shows the maximum achievable
output equals to 0.5257 p.u. (keeping DC-link voltage equals
to unity).
15.4.2.7 Experimental Implementation
Experimental setup is prepared in the laboratory to implement
the carrier-based and space-vector PWM techniques discussed
in the previous section. A five-phase voltage-source inverter is
developed using intelligent power module. Texas Instrument
DSP TMS320F2812 is used as the processor to implement
the control algorithm. Since this DSP can be coded in C or C
++, it is more user-friendly, and they have dedicated 16 hard-
ware PINS to generate the desired PWM signals. The PWM cir-
cuits associated with compare units make it possible to generate
up to eight PWM output channels (per Event Manger) with
programmable dead band and polarity. This DSP is specifically
meant for use in motor drive purposes, and it can control up to
eight-phase two-level inverter. The control code is written in C
++ language in Code composer studio 3.1 that runs in a PC.
The control signal generated by PC is transferred to the DSP
board through RS 232 cable connected in parallel printer port
of the PC. The DSP board is connected to the power module
through dedicated control cable. The DSP interfacing circuit
along with required A/D and D/A converter is built on the
DSP board itself procured from VI Microsystems.
Five-phase carrier-based PWM is implemented keeping the
switching frequency equal to 10 kHz. The resulting waveform
of leg voltage and corresponding phase voltage along with
phase ‘a’, ‘b’, and ‘c’ are shown in Figs. 15.53 and 15.54,
respectively.
Fifth-harmonic injection scheme is also implemented using
DSP coding with fifth-harmonic signal equal to 0.0618 p.u. The
resulting waveform of leg and corresponding phase voltage
(unfiltered) are shown in Figs. 15.55 and 15.56, respectively.
Triangular zero sequence injection PWM (TIPWM) is also
implemented. The resulting waveform of phase voltage along
with phase ‘a’, ‘b’, and ‘c’ currents and triangular zero-sequence
injection are shown in Figs. 15.57 and 15.58, respectively.
15.4.3 Modeling and Control of a Seven-Phase
VSI-Square Wave Mode
This section details the modeling and control of a seven-phase
VSI. The modeling of seven-phase VSI is done for 14-step oper-
ation using space-vector approach [39]. The PWM operation
V11 V1 V32 V1 V11
V31 V31
V2
V12
V12
V2
2
tam
4
to
2
tbl
2
tal
2
tbm
2
to
2
tbm
2
tal
2
tbl
2
tam
4
to
Sector I
FIG. 15.51 Switching pattern in sector I using large and medium space
vectors.
0 0.01 0.02 0.03 0.04 0.05 0.06
–1
–0.5
0
0.5
1
Phase
'a'
voltage
(p.u.)
Time (s)
0 50 100 150 200 250 300 350 400 450 500
0
0.2
0.4
Phase
'a'
voltage
spectrum
(p.u.)
Frequency (Hz)
FIG. 15.52 Spectrum of phase “a” voltage for sinusoidal output of SVPWM.
491
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-35-320.jpg)
![mode is elaborated in Section 15.4.4 [40,41]. Conventional
180 degrees conduction mode is considered. The procedure
adopted here follows from Section 15.4.1. The analytic expres-
sions for harmonic components and THD are derived for phase
voltages and second nonadjacent line voltages. The same is
then verified using simulation and experimental results.
Section 15.4.3.2 deals with the modeling and control of a
seven-phase voltage-source inverter in pulse-width modulation
mode. There are a total of 128 switching state where the first
14 states lead to 14-step mode of operation and the rest of
114 switching states fall in PWM mode. Out of total 128 space
vectors, two space vectors corresponding to the switching states
FIG. 15.54 Unfiltered phase “a” voltage along with phase ‘a’, ‘b’, and ‘c’ currents using carrier-based PWM.
FIG. 15.53 Unfiltered leg “A” voltage along with phase ‘a’, ‘b’, and ‘c’ currents using carrier-based PWM.
492 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-36-320.jpg)
![Simulation results are provided to support the analytic and
theoretical findings. It is demonstrated in Section 15.4.3 that
there are a total of 14 distinct sectors with 25.714286 degrees
(π/7 radians) spacing. The innermost space vectors in d-q
plane are redundant and are therefore omitted from further
discussion. This is in full compliance with observation
where it is stated that only subset with maximum length vec-
tors has to be used for any given combination of the switches
that are “on” and “off” (3–4 and 4–3 in this case). The middle
region space vectors correspond to two switches being “on”
from upper (lower) set and five switches being “off” from
lower (upper) set or vice versa and one switch being “on” from
upper (lower) set and six switches being “off” from lower
(upper) set or vice versa. It follows that, there are nine, 14sided
regular polygons are formed by the vectors. The “set number”
of vectors forming these polygons is already defined in
Table 15.9.
15.4.4.1 Space Vector Pulse Width Modulation
(SVPWM) With Sinusoidal Output
This section develops SVPWM schemes for a seven-phase VSI.
At first, the conventional method of using only set-1 vectors is
taken up followed by set-1 plus set-2 and set-1 plus set-2 plus
set-6 vectors (SVPWM with sinusoidal output) schemes.
The methods discussed in the preceding sections generate
low-order harmonic since they utilize either two or four active
vectors in one switching period. As emphasized in [40], the
number of applied active space vectors for multiphase VSI with
an odd phase number should be equal to n1
ð Þ, n is the num-
ber of phases of inverter, for sinusoidal output. This means that
one needs to apply six active vectors in each switching period,
rather than two or four for obtaining sinusoidal output. More-
over, the dwell time of each vector should be chosen in such a
way as to eliminate vectors of both x1-y1 and x2-y2 planes. Thus,
six active vectors (in sector 1, active vectors no. 1, 2, 15, 16, 71,
and 72 are used) and one zero vector are chosen to implement
the SVPWM. The chosen vectors belong to the first, second,
and sixth sets.
The switching pattern and the sequence of the space vec-
tors for this scheme are illustrated in Fig. 15.66. It is observed
from the switching pattern of Fig. 15.66 that the switching in
all the phases is staggered, that is, all switches change state at
different instants of time. The total number of switching in
each switching period is still 28, thus preserving the require-
ment that each switch changes state only twice in a switching
period. The selection of space vectors for other sectors is listed
in Table 15.10.
The vector disposition of sector I is shown in Fig. 15.67 in all
the three planes.
4
t0
2
ta2
2
ta1
4
t0
2
tb1
2
tb1
2
t0
VA
VB
VC
VD
VE
VF
VG
Sector I
2
tb2
2
tb2
2
ta1
2
ta2
2
ta3
2
ta3
2
tb3
2
tb3
127
127
128
71
71 16
16 1
1 2
2 15 15
72 72
Vectors
FIG. 15.66 Switching pattern and space-vector disposition for one cycle
of operation.
TABLE 15.10 Sector-wise switching sequence when the first, second, and sixth set of vectors are applied
Sector number Sequence of vectors in operation
I 127 71 16 1 2 15 72 128 72 15 2 1 16 71 127
II 127 73 16 3 2 17 72 128 72 17 2 3 16 73 127
III 127 73 18 3 4 17 74 128 74 17 4 3 18 73 127
IV 127 75 18 5 4 19 74 128 74 19 4 5 18 75 127
V 127 75 20 5 6 19 76 128 76 19 6 5 20 75 127
VI 127 77 20 7 6 21 76 128 76 21 6 7 20 77 127
VII 127 77 22 7 8 21 78 128 78 21 8 7 22 77 127
VIII 127 79 22 9 8 23 78 128 78 23 8 9 22 79 127
IX 127 79 24 9 10 23 80 128 80 23 10 9 24 79 127
X 127 81 24 11 10 25 80 128 80 25 10 11 24 81 127
XI 127 81 26 11 12 25 82 128 82 25 12 11 26 81 127
XII 127 83 26 13 12 27 82 128 82 27 12 13 26 83 127
XIII 127 83 28 13 14 27 84 128 84 27 14 13 28 83 127
XIV 127 71 28 1 14 15 84 128 84 15 14 1 28 71 127
505
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-49-320.jpg)
![Using equal volt-second criterion, for sector I, the following
is obtained:
vdq ¼ 0:642δ1 + 0:5148δ15 + 0:2857δ71
vx1y1 ¼ 0:1586δ1 0:3563δ15 + 0:2857δ71
vx2y2 ¼ 0:2291δ1 + 0:1272δ15 + 0:2857δ71
(15.143)
Or the above equations can be represented as
vd
vx1
vx2
2
4
3
5 ¼ K
½
δ1
δ15
δ71
2
4
3
5
vq
vy1
vy2
2
6
4
3
7
5 ¼ K
½
δ2
δ16
δ72
2
4
3
5
where
K
½ ¼
0:642 0:5148 0:2857
0:15686 0:3563 0:2857
0:2291 0:1272 0:2857
2
4
3
5
and δ1, δ15, δ71, δ2, δ16, and δ72 are duty cycles of vector num-
bers 1, 15, 71, 2, 16, and 72, respectively; their coefficiants
are the respective magnitudes of the vectors and negative sign
showing the opposite to normal direction.
Since [K] is nonsingular matrix, its inverse is existing (det
[K]¼0.1634). Therefore, expressions for duty cycles can be
written as
δ1
δ15
δ71
2
6
4
3
7
5 ¼ K
½ 1
vd
vx1
vx2
2
6
4
3
7
5
δ2
δ16
δ72
2
6
4
3
7
5 ¼ K
½ 1
vq
vy1
vy2
2
6
4
3
7
5
(15.144)
where K
½ 1
¼
0:8455 0:6792 1:5248
0:6792 1:5248 0:8455
0:3754 1:2209 1:9002
2
4
3
5
Solving for δ1, δ15, δ71, δ2, δ16, and δ72 by assuming
vx1 ¼ vx2 ¼ vy1 ¼ vy2 ¼ 0 , from (15.144), one gets
δ1
δ15
δ71
2
6
4
3
7
5 ¼ vd
0:8455
0:6792
0:3754
2
6
4
3
7
5
δ2
δ16
δ72
2
6
4
3
7
5 ¼ vq
0:8455
0:6792
0:3754
2
6
4
3
7
5
(15.145)
Expression for duty cycle of zero is given as
δ0 ¼ 1 δ1 + δ15 + δ71 + δ2 + δ16 + δ72
ð Þ (15.146)
Since δ0 0, therefore,
δ1 + δ15 + δ71 + δ2 + δ16 + δ72
ð Þ 1 (15.147)
Subtituting the values of duty cycles from (15.145) in (15.147),
one gets
vd + vq ¼ 0:526288
Hence,
v∗
s max
¼ vd + vq cos
π
14
¼ 0:513 (15.148)
where δ1, δ15, and δ71 are duty cycles and suffixes denote
the vector numbers; their coefficiants are their respective
1
2
15
16
71
72
d-axis
q-axis
v1, v2 = 0.642 VDC
v15, v16
v71, v72
= 0.3563 VDC
= 0.2857 VDC
v1, v2 = 0.1586 VDC
v15, v16
v71, v72
= 0.3563 VDC
= 0.2857 VDC
v1, v2 = 0.2291 VDC
v15, v16
v71, v72
= 0.1272 VDC
= 0.2857 VDC
7
(A)
(B)
(C)
1
2
15
16
71
72
y1-axis
x1-axis
x2-axis
y2-axis
7
2p
7
3p
1
2
15
16
71
72
p
FIG. 15.67 Space-vector disposition in sector I: (A) d-q plane, (B) x1-y1
plane, and (C) x2-y2 plane.
506 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-50-320.jpg)
![15.4.4.2 Summary
Section 15.4.1 develops a space-vector model of a five-phase volt-
age-source inverter, and it is shown that two sets of space vectors
exist, namely, d-q and x-y. The second set of space vectors termed
here as x-y space is essentially third harmonic of the space vector
in d-q plane. Altogether, there exist 32 space vectors out of which
30 are active and 2 are zero vectors. Complete mapping of the
space vectors are provided in Section 15.4.1. Step operation of
the inverter is elaborated in terms of different conduction mode,
that is, 180 degrees is taken up as conduction angle. Fourier anal-
ysis is presented in terms of analytic expressions, and simulation
results are provided to support the analytic expressions.
Carrier-based PWM and space-vector PWM schemes for a
five-phase VSI are analyzed and compared using analytic, sim-
ulation and experimental approach. Relationship between
modulation signal (fundamental and zero-sequence signal)
and space vector is established, which indicates a transforma-
tion between arbitrary carrier-based PWM and space-vector
modulation. A direct relationship is formulated between line-
to-line voltage and space vector. It is found that the line-to-line
voltage is determined by only active vectors and is independent
of zero vectors. Relationship between modulation signals and
space-vector sectors is identified. Analytic expressions of distri-
bution of zero-vector application times for sinusoidal, fifth-
harmonic injection, and triangular zero-sequence injection
are determined. Equivalence between switching pattern of
space-vector PWM and carrier type is highlighted. Perfor-
mance of modulator in terms of THD of output phase voltages
is determined for triangular and saw-tooth carrier signals, and
the poor performance of saw-tooth carrier is indicated.
Four different space-vector PWM schemes for a seven-phase
voltage-source inverter are described. At first, the conventional
technique of using the largest set of space vectors is extended
to a seven-phase inverter. This technique provides maximum
DCbusutilization(0.6259),buttheoutputphasevoltagesaredis-
tortedwithsignificantamountoflow-orderharmonicsespecially
third and fifth. These harmonics are due to free flow of x1-y1 and
x2-y2 plane vectors. The second proposed method cancels the x1-
y1 plane space vectors, and thus, the low-order harmonic more
than three is eliminated in the output phase voltage waveform.
Third method is investigated that eliminates vectors of x2-y2
plane. Themodulation index is thesamefor thesecond and third
methods with the elimination of different set of harmonics. The
DCbusutilizationisintermediate.Thelastmethodcancelsallthe
space vectors x1-y1 and x2-y2 planes, thus providing a sinusoidal
output voltage with least DC bus utilization. The experimental
setup and the results are also provided.
15.5 Multiphase AC-AC Converter
15.5.1 Introduction
AC-AC converter refers to a topology of converters in which
the amplitude, frequency, and phase of the AC supply can be
altered according to the requirement of the load without
employing reactive DC link in between. As discussed in
Chapter 14, polyphase AC-AC converters can be classified as
naturally commutated cycloconverters (NCC) and forced com-
mutated cycloconverters (FCC). FCCs when implemented for
low- and medium-power drives by employing high switching
semiconductor bidirectional switches result in what is com-
monly known as matrix converter (MC). This section deals with
the multiphase matrix converters (with phase numbers more
than three) and the theory that pertains to it. It is observed that
as number of phases increase, the number of vectors to be dealt
with in space-vector modulation-based techniques is quite
large. For an mn MC, the useful number of states is mn
[4]. Thus, for a 37 MC, 2187 vectors are to be handled. Other
way is to resort to classical methods in which output target volt-
ages are defined and friendly harmonics are added to the target
phase voltages such that the sinusoidal nature of line voltages
are not altered. These target voltages are then fabricated from
the input side voltages such that the average in one time sample
follows the target voltage sample.
Multiphase matrix converters (MPMC) (Fig. 15.70) can be
broadly classified into direct multiphase matrix converters
(DMMC) and indirect multiphase matrix converters (IMMC).
Although the maximum output voltage achievable is the same
for both, the advantage with the indirect multiphase matrix con-
verters is that the established modulation strategies employed
for controlled rectifiers and inverters are readily applicable. In
this section, the target is to present the theory on DMMC.
The bidirectional switches that are employed for the multiphase
matrix converters are the same as employed for conventional
33 matrix converter. Although the work on MPMCs is still
in research domain and a statement of encouragement can be
given to young researchers, possible applications of MPMCs
can be wind energy systems (WES) employing multiphase gen-
erator sets, or multiphase motors can be interfaced with the
existing three-phase grid using MPMCs.
in1
in2
o1
Input
lines
Output lines
S11
S12
S1m
S21
S22
S2m
Sn1
Sn2
Snm
o2 on
inm
FIG. 15.70 DMMC with m input lines and n input lines.
508 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-52-320.jpg)
![15.5.2 Brief Review
A time line of research in the field of MPMC is shown in
Fig. 15.71. The first theory addressing MPMC for odd number
of input and output phases was given way back in 1989 [42].
The theory was recently extended to all configurations in
[12]. This paper also extends the Venturini method to 3n
case, where n can be even or odd. Further, it also presents a sim-
plified modulation strategy for MPMC for any number of
phases. The first work on the modulation strategy of MPMC
was reported in [18]. In this work, the authors use a continuous
carrier and the predetermined duty ratio signals to directly gen-
erate the gating signals. This explains the origin of the name,
that is, the “direct-duty-ratio-based PWM.” A duty ratio is cal-
culated for each switch, and since this applies to each output
phase independently, it can be used to supply multiphase loads.
The input number of phases is restricted to three since the
modulation requires identification of the values of the input
voltages as the maximum, medium, and minimum. Another
approach applied on 39 MC is shown by the same authors
in [16], named as carrier-based PWM scheme. Venturini
method is also explored for 35 MC in [11,43]. Space-vector
approach is the most explored approach and is discussed for
various configurations in [17,44–47]. Multiphase open-end
loads can also be supplied through dual MPMCs and are prac-
tically assessed in [48,49]. A 35 MC is discussed in [50], in
which a least number of commutations are employed in one
time sample. This leads to the reduction in common-mode
voltage. IMMC has recently received commendable attention
in [51,52]. The former paper gives carrier-based approach
for a 35 MC that can also be realized employing space-vector
approach. The later one discussed space-vector-based
approach for a 35 MC in the overmodulation range and
achieves a VTR of 0.923, which otherwise is 0.7886.
15.5.3 Defining the Voltage Transfer Ratio
All modulation strategies whether scalar or space-vector-based
require the understanding of maximum achievable output volt-
age, that is, the maximum voltage transfer ratio (VTRmax) and
its implementation. In scalar methods, the output reference
voltages are maneuvered by the addition of friendly harmonics
in order to achieve VTRmax. For this, a detailed understanding
of how to manipulate the sinusoids is required. Thus, in this
section, the theory of VTRmax that is achievable in an MPMC
is discussed, and expressions for all the possible cases are
derived. The approach will be general for any number of input
and output phases until and unless specified. Illustrations are
mainly done for 35 MC.
15.5.3.1 The Unutilized Region
Consider initially, an m1 converter. The m-phase input volt-
age set is defined as
vin t
ð Þ ¼ vin1
t
ð Þ,vin2
t
ð Þ,…,vinm
t
ð Þ
½
¼ Vin cos ωint + i1
ð Þ
2π
m
m
i¼1
(15.149)
Let the duty cycles for which the output is connected to the
inputs through switches S1, S2,…,Sm be
M t
ð Þ
½ ¼ M1 t
ð Þ,M2 t
ð Þ,…,Mm t
ð Þ
½ (15.150)
The actual output voltage (w.r.t. input neutral) is obtained as
vo t
ð Þ ¼ M t
ð Þ
½ vT
in t
ð Þ (15.151)
The duty cycle of each switch is such calculated that in one time
sample, the average of the actual output voltages follows the
reference voltage. Thus, for all arbitrary output frequencies,
the VTR for a three-input system can have a maximum reach
up to 0.5. Generalizing this for multiple input phases, the
VTRmax is given as
Vo cos
π
m
(15.152)
This leaves a region of 1cos (π/m) unutilized. This region
decreases with the increase in the number of input lines. The
utilized and unutilized regions are shown for three-phase input
case in Fig. 15.72.
For five-phase input set, according to (15.151), approxi-
mately 19.1% of the input voltage space still remains unutilized.
1989
Alesina, Venturini
generalized theory for
VTRs for odd phase input/
output MC [2]
1. Moin, Iqbal
duty ratio based,
3 X n [4],
2. __, Carrier
9 [5]
based, 3X9 [5]
Moin, Iqbal
space vector,
3X5 [8]
1. Moin, Salam reduced
vector-count Space-
vector, 3X7 [11]
2. Moin, Abu-Rub
space vector, dual MC
3X5 [14],
1. Ali, Iqbal
Generalized theory for VTRs of mXn MC,
simplified algorithm for IDF on DMMC, [3]
Iqbal
2. Sayed,
Scalar strategy based on least commtation
number, 3 X 5 [15]
1. Nguyen, Lee
carrier based 3X5 IMC [16]
2. Chai, Xiao
Space vector (overmodulation), 3X5 IMC [17] IMMC
DMMC
2011 2012 2015 2016
FIG. 15.71 Year-wise development of MPMC.
509
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-53-320.jpg)
![where Vo ¼(VTRmax)Vin, and VTRmax ¼0.75. The optimized
output voltages for this case are seen in Fig. 15.80.
Even-phase input and odd-phase output MC
When inputs are even and outputs are odd, only output-voltage
optimization is done. So in accordance with (15.175), the ref-
erence output voltages are written as
vo t
ð Þ ¼ Vo cos ωot + j1
ð Þ
2π
n
1
n
sin
π
2n
Vo cos nωot
n
j¼1
(15.183)
where Vo ¼(VTRmax)Vin and VTRmax is defined by (15.166).
For 63 MC, (15.182) is written as
vo t
ð Þ ¼ Vo cos ωot + j1
ð Þ
2π
n
1
6
Vo cos 3ωot
n
j¼1
Vo ¼qVin and VTRmax ¼1. This is illustrated in Fig. 15.81. The
appreciable fact is that VTRmax is unity, which is 0.7321 only, if
optimization is not done.
15.5.4 Simplified Modulation Strategy
This method is discussed in [12] lately. It is simple and is appli-
cable to any MC configuration. Moreover, unity input displace-
ment factor (IDF) is achieved. The results clearly exhibitthe IDF.
Matrix operations are done to derive the modulation matrix
[M]nm. Considering matrix mn converter shown in
Fig. 15.70 and applying Kirchhoff’s voltage law, combining
with constraint equation is derived as
–1
–0.5
0
0.5
1
Input voltages
Output voltages
vhin
Voltage
(with
respect
to
input
voltages)
0 2p
p
Angle (rad)
FIG. 15.81 Optimized output voltages for 63 matrix converter (q¼1, fo ¼3fin).
–1
–0.5
0
0.5
1
Input voltages
Output voltages
vhin
Voltage
(with
respect
to
input
voltages)
0 2p
p
Angle (rad)
FIG. 15.80 Optimized output voltages for 36 matrix converter (q¼0.75, fo ¼3fin).
0 2p
p
–1
–0.5
0
0.5
Angle (rad)
1
Input voltages
Output voltages
Voltage
(with
respect
to
input
voltages)
FIG. 15.79 Optimized output voltages for 35 matrix converter (q¼0.7886, fo ¼3fin).
514 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-58-320.jpg)
![vo1
vo2
vo3
⋮
von
1
1
1
⋮
1
2
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
3
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
|fflfflffl{zfflfflffl}
Y 2n1
¼
vin1 vin2 … vinm
0 0 … 0
0 0 … 0
⋮
0 0 … 0
1 1 … 1
0 0 … 0
⋮
0 0 … 0
0 0 … 0
zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{
1
0 0 … 0
vin1 vin2 … vinm
0 0 … 0
⋮
0 0 … 0
0 0 … 0
1 1 … 1
0 0 … 0
⋮
0 0 … 0
zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{
2
0 0 … 0
0 0 … 0
vin1 vin2 … vinm
⋮
0 0 … 0
0 0 … 0
0 0 … 0
1 1 … 1
⋮
0 0 … 0
zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{
3
…
…
…
…
…
…
0 0 … 0
0 0 … 0
0 0 … 0
… ⋮
vin1 vin2 … vinm
0 0 … 0
0 0 … 0
0 0 … 0
⋮
1 1 … 1
zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{
n
9
=
;
2n
2
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
3
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
|fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}
A 2nnm
½M11 M12 M13 ⋯ M1mT
½M21 M22 M23 ⋯ M2mT
½M31 M32 M33 ⋯ M3mT
⋮ ⋮ ⋮ ⋯ ⋮
½Mn1 Mn2 Mn3 ⋯ MnmT
2
6
6
6
6
6
4
3
7
7
7
7
7
5
|fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}
X nm1
(15.184)
X denotes the modulation vector, and Y is the vector of desired
output voltages. Now, X is derived as
X ¼ AT
AAT
1
Y (15.185)
AAT
when solved will have terms
Xm
i¼1
v2
ini
and
Xm
i¼1
vini
, so,
let
Xm
i¼1
v2
ini
¼ L and
Xm
i¼1
vini
¼ M. Each term of X when
Eq. (15.184) is solved is of similar pattern and can be shown as
Mji ¼
1
mLM2
ð Þ
voj
mvini
M
ð ÞMvini
+ L
(15.186)
where Mji is the time-based index corresponding to the switch
Sji that connects jth output to the ith input. The time duration
for which this switch is on is calculated by multiplying this
index with sampling time. Further solving by considering m
balanced input phases and finally neglecting the terms with
denominators with high value, solution for mn matrix con-
verter is written as
Mji ¼
1
m
1 +
2vini
voj
V2
in
(15.187)
This formula is general for all input and output cases and does
not carry any discrimination of odd or even. voj is the target
output voltage, which for optimum output voltages are referred
to expressions derived in previous sections. Experimental pro-
totype of 39 MC is shown in Fig. 15.82, and experimental
results for 35 matrix converter obtained are shown in
Fig. 15.83.
15.5.5 Other Control Techniques
Other modulation strategies that are discussed for MPMCs are
space-vector modulation [17], sinusoidal carrier-based modu-
lation [16], and direct-duty-ratio-based method [18]. Novel
methods like reduced commutation method [50] is also
considered.
Space-vector PWM technique is highly recommended for
VSIs as it increases the DC bus utilization and is easily digitally
realized. This method is extended to multiphase matrix
converters and is realized for 35 MC in [17]. In this algo-
rithm, the input currents and output line voltages are repre-
sented on space-vector planes as shown in Fig. 15.84. The
number of switching states for an mn MC is 2mn
. However,
after applying the constraints discussed in Chapter 14, these
reduce to mn
. For example, for a 35 MC, a total number
of combinations can be 215
, that is, 32,768, and with con-
straints, this figure reduces to 35
, that is, 243 combinations.
However, in [17], only 93 active and three zero vectors are uti-
lized and are further categorized into 4 groups, namely, large
vectors (30 vectors), medium vectors (30 vectors), small vectors
(30 vectors), and zero vectors (3 vectors). Fig. 15.84 exhibits
input current and output line voltage space vectors in which
only large (L) and medium (M) vectors are shown. The detailed
calculations of the dwelling times can be seen in [17]:
A new modulation technique is introduced in [50], where
least commutation number is achieved. According to normal
SVPWM, Venturini or the method discussed in Section 15.5.5,
in one switching time cycle, the output voltage must ride on
all input voltage, and the average of these samples must be
equal to the reference output voltage. This leads to (m1)n
Gating pulses
Autotransformer
3 × 9 Matrix converter
9-f RL- load
Computer
3-f
Supply
ABCN
FPGA based
controller
Bidirectional
module
VHDL
code
FIG. 15.82 Experimental prototype of a 39 MC.
515
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-59-320.jpg)
![commutations per switching cycle. For 35 MC, this will be
10 commutations and are shown in Fig. 15.85A. However, the
method proposed in [50] employs only five commutations per
cycle, as shown in Fig 15.85B. This provides low THD in output
voltages and reduction in the stress on the switches.
15.5.6 Future Prospects
In the above sections, the main focus was on DMMC; however,
IMMC is now getting considerable attention [51,52]. Research
on MPMCs is still under progress, and there is a lot of scope left
in this area. The possible areas of research are summarized,
which in conjunction with one another may create a new area
of research:
In Terms of Topology
Z-source DMMC and IMMC
Multiphase multilevel MC
Multiphase multimodular matrix converters
Sparse and ultrasparse multiphase MC
In Terms of Control
Overmodulation in DMMC
Enhanced SVPWM techniques
Reactive power control
Predictive control
Periodic control
Low-switching-frequency PWM
There are many more areas to be considered. Moreover,
filter design, EMI considerations, and consideration of faults
and unbalanced supplies for MPMCs are also the areas of
research.
15.6 Multiphase DC-DC Converter
A multiphase DC-DC converter consists of two or more
DC-DC converters operating in parallel at the same frequency
with a proper phase shift existing between each other. The par-
allel operating converters has a common DC source (battery, PV
panel, etc.) that feeds power to a common load. Consequently,
this type of circuit configuration enables the load to be subjected
to an effective frequency that is a multiple of the converter fre-
quency (f ), thereby increasing the ripple frequency of the supply
harmonic current. The filter requirement is reduced compared
with a single-level implementation. The multiphase DC-DC
step-down converter or buck converter offers a viable solution
for the voltage regulator module (VRM), which is used to power
the microprocessors in computers and other applications. At
present, VRMs require output voltage less than 1 V and an out-
put current of more than 100 A [53].
Various topologies have been reported in literature with
varying control strategy [53,54]. The most common topologies
are as follows:
1. Multiphase interleaved buck topology
2. Multiphase synchronous buck topology
3. Multiphase tapped-inductor buck topology
4. Multiphase interleaved boost topology
15.6.1 Multiphase Interleaved Buck Topology
Fig. 15.86 shows an n phase multiphase interleaved buck con-
verter. The individual phase ripple frequency is added to obtain
an output current with high ripple frequency. The ripple
cancellation of inductor current for a three phase converter
(A)
(B)
FIG. 15.83 Experimental output (A) phase voltage and (B) currents (fo ¼50 Hz).
516 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-60-320.jpg)
![is shown in Fig. 15.87A. The inductor current ripples add up to
give three times the ripple frequency with respect to the con-
verter operating individually. The magnitude of output current
also increases. The ripple cancellation of the output inductor
current reduces the requirement of the output capacitance
and consequently lowers the cost and reduces the power dissi-
pation. The increased input ripple current frequency causes the
multiphase buck converter to have reduced input ripple current
magnitude (Fig. 15.87B), thereby reducing the size requirement
of input capacitor and cost reduction of the overall system.
15.6.1.1 Operation of Multiphase Buck Converter
The operation of a two-phase interleaved buck converter
(Fig. 15.88) has been discussed in detail. The operating princi-
ple remains the same in all higher phases of the converter.
Inductors ensure that continuous current flows through the
load and the resultant current through output is the sum of
the current through each inductor. The frequency of ripples
in the current through load is twice that of frequency of ripple
current through each inductor. The sum of duty ratios of the
two switches is less than or equal to 1.
15.6.1.2 Modes of Operation
Mode 1. S1 is on and S2 is off (T1)
When S1 is on, current flows through the circuit as shown in
Fig. 15.89. The diode D1 is reverse-biased because of the
Ei
Ii
Ii¢
Ii≤
6
p
ai
ao
a
a
b
Vi
±2L, ±5L, ±8L,
±11L ±14L
±2M, ±5M, ±8M,
±11M, ±15M
±1L, ±4L, ±7L,
±10L, ±13L
±1M, ±4M, ±7M,
±10M, ±13M
±3M, ±6M, ±9M,
±12M, ±15M
±3L, ±6L, ±9L,
±12L, ±14L
Vo
Vo¢
Vo≤
Vi
±13L, ±14L,
±15L
±10M, ±11M,
±12M
±10L, ±11L,
±12L
±7M, ±8M,
±9M
±7L, ±8L,
±9L
±4M, ±5M,
±6M
±4L, ±5L,
±6L
±1M, ±2M,
±3M
±1L, ±2L,
±3L ±13M, ±14M,
±15M
I
II
III
IV
V
VI
VII
VIII IX
X
(B)
(A)
FIG. 15.84 (A) Input current and (B) output-voltage space vectors cor-
responding to large and medium vectors [17].
(B)
(A)
r s t
r s t
r s t
r s t
r s t
a
b
c
d
e
T
r s
r s
r s t
s t
t
a
b
e
c
d
T
FIG. 15.85 (A) Commutation in one time cycle with conventional
schemes [43] and (B) commutation in one time cycle observed in [50].
VDC
L2
DC
load
C
L1
S2
S1
Ln
L3
Sn
S1
FIG. 15.86 n-Phase interleaved buck converter.
517
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-61-320.jpg)
![B ¼ B1D1 + 1D1 D3
ð ÞB2 + B3D3 (15.200)
Assuming the duty ratio of mode 1 and 3 are same, then for
mode 2, it is 1D
Therefore,
A ¼ A1 + A3
ð ÞD + 12D
ð ÞA2 (15.201)
B ¼ B1 + B3
ð ÞD + 12D
ð ÞB2 (15.202)
15.6.1.5 Small Signal Analysis
In small-signal analysis, it is assumed that all variables are per-
turbed around steady-state operating point. Applying pertur-
bations to above equation leads to
_
X + _
x ¼ A1 + A3
ð Þ D + d
ð Þ + 12 D + d
ð ÞA2
f g X
+ x
+ B1 + B3
ð Þ D + d
ð Þ + 12 D + d
ð ÞB2
f g U
+ u
(15.203)
Where average term is represented by a superscript while small
signal term is represented by small letters. Neglecting the prod-
uct of terms containing small signal and taking the derivative of
steady-state component as zero simplify the above equation to
_
x ¼ A1 + A3
ð ÞD + 12D
ð ÞA2
f gx + B1 + B3
ð ÞD
½
+ 12D
ð ÞB2u + A1 + A3 2A2
ð ÞX + B1 + B3 2B2
ð ÞU
½ d
(15.204)
Taking Laplace transform on both sides,
s_
x ¼ A1 + A3
ð ÞD + 12D
ð ÞA2
f gx s
ð Þ + B1 + B3
ð ÞD
½
+ 12D
ð ÞB2u s
ð Þ + A1 + A3 2A2
ð ÞX
½
+ B1 + B2 2B3
ð ÞUd s
ð Þ (15.205)
_
x ¼ SI A
½ 1
B1 + B3
ð ÞD + 12D
ð ÞB2
½ u s
ð Þ
f
+ M’
X + NU
d s
ð Þg (15.206)
where M’
¼ A1 + A3 2A2
ð Þ and N ¼ B1 + B2 2B3
ð Þ:
Vo S
ð Þ ¼ CT
x s
ð Þ (15.207)
Putting the value of Eq. (15.204) into Eq. (15.205), we have
vo s
ð Þ
vDC s
ð Þ
¼
s 1D
ð Þ L1 + L2
ð Þ
s3L1L2C + s
L1L2
R
+ s 1D
ð Þ2
L1 + L2
ð Þ
(15.208)
vo s
ð Þ
d s
ð Þ
¼
s 1D
ð Þ L1 + L2
ð Þs2
L1L2 iL1
+ iL2
ð Þ
s3L1L2C + s
L1L2
R
+ s 1D
ð Þ2
L1 + L2
ð Þ
(15.209)
In the above analysis, ESR, ESL, and other parasitic parameters
have been neglected. The detailed analysis including the
parasitic parameters has been carried out by [55,56]. The wave-
form of current through the inductors and the output current
for a two-phase buck converter are shown in Fig. 15.90. The
frequency of ripple in output current is clearly seen to be twice
compared with the single-phase counterpart.
Small signal analysis can be extended for an n phase
converter. The time-interleaved control will ensure higher-
frequency ripple pulses, thereby lesser requirement of filtering.
Moreover, the cost and space requirement will also come down.
15.6.1.6 Discontinuous Conduction Mode
When the value of L1 and L2 is small, the current through load
could be discontinuous. This is undesirable as the output volt-
age then becomes function of inductance complicating the con-
trol operation [55].
15.6.1.7 Variation of Output Current Ripple With
Duty Ratio and Design Consideration
The main advantage of multiphase topology is the cancellation
of ripple in the output current, which reduces the size of induc-
tance and improves the transient response and the output
capacitance requirement is minimized. The voltage tolerance
criteria under varying load make multiphase buck converters
working as VRMs use small inductance so that the power
can be transferred quickly from the source side to the load side.
However, small value of inductance causes large ripples in
inductor current under steady state condition. So a compro-
mise between the two has be taken into consideration while
designing. The magnitude of inductor current ripples (consid-
ering inductance to be same in each buck converter loop) and
the inductance value are related to each other by the equation:
ΔiL ¼
d vDC 1d
ð Þ
Lfs
(15.210)
Multiphase buck converters interleave (alternate flow of cur-
rent through the inductor in each of the converter cycle) the
inductor currents in each converter operating in parallel, and
hence drastically reduces the total ripples in the current which
flows through the output capacitor. With the reduction in cur-
rent ripple, the output voltage ripple is also greatly reduced.
Therefore with lesser filter requirement, the transient response
of the system improves. Hence, a smaller value of capacitance at
the output can be used for meeting the transient requirement.
Moreover, there is more space for variations in output voltage
magnitude during load transient. Consequently, multiphase
operation enhances the performance under load transient
condition [57,58].
In multiphase converters, the current ripple cancelation
effect Ki can be defined as the ratio of the magnitudes of output
current ripple (ΔiO) and inductor current ripple (ΔiL). For n
phase buck converter, the current ripple cancellation factor
Ki is defined as [57]
520 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-64-320.jpg)
![Ki ¼
ΔiO
ΔiL
¼ 1
m
nd
1 + mnd
ð Þ (15.211)
where m ¼ floor nd
ð Þ, the maximum integer that does not
exceed nd.
For a small duty ratio, the current ripple cancellation is poor.
The output current ripples increases for small duty ratios fur-
ther because of the increase in the individual inductor current
ripples, which can be seen from the Eq. (15.210). Substituting
the Eq. (15.210) into Eq. (15.209), the output current ripples
magnitude for multiphase buck converters can be derived, as
follows [57]
ΔiO ¼ ΔiL Ki ¼
d vDC 1d
ð Þ
Lfs
1
m
nd
1 + mnd
ð Þ
(15.212)
Fig. 15.91 shows the effect of duty ratio on the ripple of the out-
put current for multiphase buck converters. Multiphase inter-
leaved buck converters are basically governed by the same
design equations as that of the single phase buck converter.
There are n interleaved paths in a multiphase buck converter
where the number of phases of the converter is represented
by n. Each channel behaves as an independent buck converter.
Let the output voltage and output current in a multiphase buck
converter are denoted by vo and io respectively. The relation of
output frequency and output current of multiphase converter
with one phase of multiphase buck converter is given by
fO ¼ N fS (15.213)
where fO represents is the output current ripple frequency and
fS represents the frequency of single phase ripple current. Volt
second balance relationship can be used to develop the design
equation for the inductor at the output.
VL ¼ L
di
dt
(15.214)
or
L ¼ VL
dt
di
(15.215)
0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043
0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043
0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043
0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043
0
1
2
1
2
3
0
1
2
0
1
2
Time (S)
Currents
through
inductors
(A)
Input
current
(A)
Gate
1
Gate
2
FIG. 15.90 Output current and gate pulses (simulated).
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Duty ratio
Normalized
output
ripple
current
N=1
N=5
N =7
N=6
N =4
N=3
N=2
FIG. 15.91 Variation of ripple with duty ratio and phases.
521
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-65-320.jpg)
![where di ¼ ΔiL ¼ the ripple current through the output induc-
tor of each channel.
Forsmallchange iniL wecancomfortableconsiderdi¼ΔiL ¼
the ripple current flowingthrough inductor atthe outputofeach
interleaved channel. During off cycle dt ¼ 1d
ð ÞTS where TS
represents the switching period and d represents the duty ratio
of the individual switch,
Eq. (15.214) becomes
L ¼
vO 1d
ð Þ
ΔiL fs
(15.216)
or
L ¼
d vDC 1d
ð Þ
ΔiL fs
(15.217)
The output voltage is kept almost constant with the selection of
proper output capacitor. Equivalent series resistance (ESR) and
an equivalent series inductance (ESL) are added to the output
capacitor to represent a real model. At high frequency switch-
ing, ESR is dominant over ESL. So, for the purpose of analysis
ESL can be neglected. The minimum capacitance for a multi-
phase converter can then be given by the following equation
CO ¼
ΔiO
8fS ΔvO
(15.218)
15.6.2 Synchronous Multiphase Buck Topology
The disadvantage of a conventional multiphase buck converter
is the significant power loss during the diode conduction
period, which is the product of the forward voltage drop and
its current. Synchronous buck topology has a better efficiency
than standard multiphase interleaved buck converter. This is
obtained by replacing the diodes of multiphase buck converter
by MOSFETs. Theoretical study done by [57] shows that the
losses in a multiphase buck converter is more due to the
forward conduction loss of the diode. The on-resistance
(RDS,ON) of MOSFET connected in place of diode is in the
milliohm range during conduction hence the losses during con-
duction is quite less compared to its conventional counterpart
thus efficiency improves.
As shown in Fig. 15.92A, a synchronous multiphase inter-
leaved buck topology is obtained by replacing the diodes with
MOSFET. Dead-times between (S1, S1’), (S2, S2’) and other
switch pairs are introduced to prevent shoot-through. For a
two phase synchronous converter, the current through the
inductor continues to flow through internal body diode of
MOSFET (S2) during the dead time. On application of gate
signal on MOSFET (S2), the current through inductor flows
through S2. As mentioned earlier, with technological advance-
ment there is a requirement for larger current by the processors
to meet the growing diverse application demand. The multi-
phase synchronous buck topology has been adopted in industry
to handle such high current processors. The majority of VRC
for laptop processor and embedded system board are using
synchronous topology today instead of conventional buck.
The Intel roadmap suggests that the voltage will be reduced
by 0.6 fraction with each passing generation of processor. Cur-
rently, the input supply voltage to microprocessors embedded
system board is in the range of 0.8–1.6 V [58–60]. But to gene-
rate a very low output voltage from higher output voltage, the
duty ratio for multiphase synchronous buck converters should
be very small. This increases the losses across the switches and
the overall converter efficiency reduces. So a synchronous
tapped inductor multiphase buck converter topology has been
proposed [57] to overcome this disadvantage. A synchronous
tapped inductor multiphase buck converter is shown in
Fig. 15.92B. To realize a tapped inductor buck converter, only
a minor modification in the original buck converter circuit is
required.
VDC
L2
DC
load
C
L1
S2
S1
Ln
L3
Sn
S3
VDC
L2
DC
load
C
L 1
S2
S1
Ln
L3
Sn
S3
S1′ S2′ S3′ Sn′
S1′ S2′ S3′ Sn′
(A) (B)
FIG. 15.92 (A) Synchronous multiphase buck converter and (B) synchronous tapped inductor multiphase buck converter.
522 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-66-320.jpg)
![15.6.3 Multiphase Boost Converter
There is an increasing popularity for high power boost con-
verters among power electronic designers in the industrial,
automotive and telecom industries for high power application.
For large power levels, efficiency becomes quite important in
the power converter components. The multiphase boost con-
verter is a viable option for such applications (Fig. 15.93). The
ripple voltage and currents in both the input and output capac-
itors of a multiphase boost converter is very less. Therefore
smaller components are required for filtering purpose. Thus,
the requirement of bulky heat sinks and forced-air cooling is
not there is case of multiphase boost converter [61,62]. Hence,
the efficiency of such converters are quite high. The direction
of power flow is different in a multiphase buck and boost con-
verter which otherwise have same circuit topology. The input of
the buck converter and the output of the boost converter are
pulsating type current. On the other hand, the output of the buck
converter and the input to the boost converter are continuous
currents.
15.6.3.1 Modes of Operation
Mode 1
During mode 1, both the switches S1 and S2 are on, and the
diodes D1 and D2 are in the off condition:
diL1
dt
¼
VDC
L1
(15.219)
diL2
dt
¼
VDC
L2
(15.220)
dvO
dt
¼
VO
RC
(15.221)
The coefficient matrix for this mode can be written as
A1 ¼
0 0 0
0 0 0
0 0
1
RC
2
6
6
4
3
7
7
5B1 ¼
1
L1
1
L2
0
2
6
6
6
6
4
3
7
7
7
7
5
(15.222)
Mode 2
During mode 2, switch S1 is in on condition, switch S2 is in
off condition, and the corresponding diodes are in the
complementary switching states, that is, D1 is in off condition
and D2 is in on condition, respectively:
diL1
dt
¼
VDC
L1
(15.223)
diL2
dt
¼
VDC
L2
VO
L2
(15.224)
dvO
dt
¼
il2
C
VO
RC
(15.225)
A2 ¼
0 0 0
0 0
1
L2
0
1
C
1
RC
2
6
6
6
4
3
7
7
7
5
B2 ¼
1
L1
1
L2
0
2
6
6
6
6
4
3
7
7
7
7
5
(15.226)
Mode 3
In mode 3, switch S1 is in off condition, switch S2 is in on con-
dition, and the corresponding diodes D1 and D2 are in on and
off conditions, respectively:
diL1
dt
¼
VDC
L1
VO
L1
(15.227)
diL2
dt
¼
VS
L2
(15.228)
dv0
dt
¼
iL1
C
VO
RC
(15.229)
A3 ¼
0 0
1
L1
0 0 0
1
C
0
1
RC
2
6
6
6
6
4
3
7
7
7
7
5
B3 ¼
1
L1
1
L2
0
2
6
6
6
6
6
4
3
7
7
7
7
7
5
(15.230)
Mode 4
During mode 4, the semiconductor switches S1 and S2 are in off
condition, and the diodes D1 and D2 are in on condition:
diL1
dt
¼
VDC
L1
VO
L1
(15.231)
diL2
dt
¼
VDC
L2
VO
L2
(15.232)
dvO
dt
¼
il1
c
+
il2
c
VO
RC
(15.233)
VDC
L2
DC
load
C
L1
S2
S1
D2
D1
FIG. 15.93 Multiphase boost topology.
523
15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-67-320.jpg)
![A4 ¼
0 0
1
L1
0 0
1
L2
1
C
1
C
1
RC
2
6
6
6
6
6
6
6
4
3
7
7
7
7
7
7
7
5
B4 ¼
1
L1
1
L2
0
2
6
6
6
6
4
3
7
7
7
7
5
(15.234)
The coefficient matrix for the two-phase boost converter are
defined as
A
½ ¼ A1d1 + A2d2 + A3d3 + A4d4 (15.235)
B
½ ¼ B1d1 + B2d2 + B3d3 + B4d4 (15.236)
U
½ ¼ VS (15.237)
d1 + d2 + d3 + d4 ¼ 1 (15.238)
Expressions for A1, A2, A3, and A4 are defined above.
Output equation can be written as y t
ð Þ ¼ 0 0 1
½
iL1
iL2
vO
2
4
3
5
Fig. 15.94 shows switching diagram for a multiphase boost
converter while Fig. 15.95 shows current through inductors
and output current.
15.6.4 Coupled Inductor for Multiphase Buck
Ripple cancelation in the output or input current for buck and
boost operation, respectively, is one of the major advantage of
interleaving technique. But, there is reduction in total input
current and output current ripple only while large ripples are
still present in the individual inductor present in each inter-
leaved converter [13]. Moreover, the large current ripples in
the inductor causes large copper loss. These large conduction
losses in inductors and switching losses in the switch cannot
be resolved by interleaving technique. Therefore, in order to
overcome this problem, multiphase interleaved buck and boost
converters have coupled inductors. The equivalent inductances
of the coupling inductor reduces in case of coupled inductor
multiphase buck topology thereby reducing the ripple current
in the coupled inductors. The transient response is not compro-
mised. Fig. 15.96 shows a two level Coupled inductor multi-
phase boost converter. In Fig. 15.97, current flowing through
inductors in case of coupled and uncoupled configuration
has been compared.
15.6.4.1 Modes of Operation
Mode 1
During mode 1, the switches S2 is on, and the diode D1 is
conducting:
vL1
¼ L1
diL1
dt
+ M
diL2
dt
¼ VDC VO (15.239)
VDC
L2
DC
load
D2
C
L1
S2
D1
S1
IL1 Flow of current through L1
iL2 Flow of current through L2
IL1 Flow of current through L1
iL2 Flow of current through L2
VDC
L2
DC
load
D2
D1
L1
C
S2
S1
VDC VDC
C
L1
S2
D1
S1
DC
load
DC
load
L2 D2 L2 D2
D1
L1
C
S2
S1
IL1 Flow of current through L1
iL2 Flow of current through L2
IL1 Flow of current through L1
iL2 Flow of current through L2
FIG. 15.94 Switching diagram for multiphase boost converter: (A) Mode 1 and Mode 2, (B) Mode 3 and Mode 4.
524 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-68-320.jpg)
![When L1 ¼L2 ¼L, equivalent inductance is
Lmode,2 ¼ LM (15.246)
Mode 3
During mode 3, switch S1 is on, and the diode D2 is conducting.
The equivalent inductance will be same as in mode 1.
Mode 4
During mode 4, switch S1 and switch S2 are in off condition,
and the corresponding diodes are in on condition. The equiv-
alent inductance will be the same as in mode 2.
The peak-to-peak current in the case of coupled and
uncoupled converter topologies are given by
ΔIripple ¼
VDCd
Lmode,1fs
(15.247)
ΔIripple ¼
VDCd
Lfs
(15.248)
where fs is the switching frequency and Lmode,1 and L are induc-
tances of coupled and uncoupled converter. Clearly, the peak
variation of input current in the case of coupled inductor is less
compared with uncoupled inductor topology.
15.6.5 Advantages of Multiphase DC-DC
Converters
Some of the advantages associated with multiphase DC-DC
converters are listed below:
• Output ripple increases in multiplicity, reducing the filter
requirements
• Reduction in the size and cost of output inductor and
capacitor
• Reduction in the size and cost of input capacitor
• Reduced overall loss in the circuit compared with same
rated single-phase counterpart
• Ideally suited for application requiring tight current reg-
ulation like VRM
• High-power and load current application like DC motor
drives
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15 Multiphase Converters](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-71-320.jpg)
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528 A. Iqbal et al.](https://image.slidesharecdn.com/multiphaseconverters-221022054613-fa146400/85/Multiphase-Converters-pdf-72-320.jpg)
Multiphase Converters.pdf
- 1. 15 Multiphase Converters Atif Iqbal Qatar University, Doha, Qatar Shaikh Moinoddin Aligarh Muslim University, Aligarh, India Salman Ahmad Aligarh Muslim University, Aligarh, India Mohammad Ali Aligarh Muslim University, Aligarh, India Adil Sarwar Aligarh Muslim University, Aligarh, India Kishore N. Mude University of Porto, Porto, Portugal, Amrita Vishwa Vidyapeetham University, Bengaluru, India 15.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457 15.2 Types and Topologies of Multiphase Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460 15.2.1 Multiphase AC-DC Converters • 15.2.2 Multiphase DC-DC Converters • 15.2.3 Multiphase DC-AC Converters • 15.2.4 Multiphase AC-AC Converters 15.3 Multiphase Multipulse AC-DC Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464 15.3.1 Five Phase Uncontrolled Full Wave Bridge Rectifier • 15.3.2 Five-Phase Controlled Full Wave Bridge Rectifier • 15.3.3 Multipulse Rectifiers • 15.3.4 Single-Way Multiphase Systems Topologies • 15.3.5 Six-Phase AC to DC Converters 15.4 Multiphase DC-AC Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477 15.4.1 Modeling and Control of a Five-Phase Voltage Source Inverter • 15.4.2 Carrier-Based PWM • 15.4.3 Modeling and Control of a Seven-Phase VSI-Square Wave Mode • 15.4.4 Space Vector PWM Techniques for a Seven-Phase Voltage Source Inverter 15.5 Multiphase AC-AC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 508 15.5.1 Introduction • 15.5.2 Brief Review • 15.5.3 Defining the Voltage Transfer Ratio • 15.5.4 Simplified Modulation Strategy • 15.5.5 Other Control Techniques • 15.5.6 Future Prospects 15.6 Multiphase DC-DC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516 15.6.1 Multiphase Interleaved Buck Topology • 15.6.2 Synchronous Multiphase Buck Topology • 15.6.3 Multiphase Boost Converter • 15.6.4 Coupled Inductor for Multiphase Buck • 15.6.5 Advantages of Multiphase DC-DC Converters References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526 Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528 15.1 Introduction Multiphase converters refer to converters with more than three phases and are the extension of three-phase converters by add- ing extra legs. From hardware point of view, there is least dif- ference. However, control becomes more flexible and complex, and higher degrees of redundancies are available. Multiphase power converters have gained popularity in the last decade because of the developments in the field of high-power switch- ing devices and computational platform such as high-speed digital signal processors and high-density field-programmable gate arrays. The major push in the area of multiphase converter is seen due to concern in developing clean transportation sys- tems, renewable energy generation system (especially wind energy system), and developing high-reliability variable-speed electric drive system. Multiphase power converters are used in numerous applications depending upon their role so as to convert AC to DC, DC to AC, AC to AC, or DC to DC. The major applications of DC to AC converters are found in adjustable-speed drives, while AC to AC and AC to DC are employed in multiphase renewable energy generation system. Multiphase DC-DC converter finds its application in automo- tive industry. Multiphase power converter (DC-AC and AC-AC) fed adjustable-speed drives offer numerous advantages when com- pared with three-phase drives. The major advantages offered are enhanced torque density (since in concentrated winding multiphase electric machine low-order harmonics also contrib- ute to the torque production unlike three-phase machines where only fundamental current components generate torque), lower torque pulsation, and higher frequency pulsation. The electromagnetic torque of inverter-fed induction motor drive possesses a considerable amount of ripple especially at low speed [1,2]. This arises due to the interaction of higher-order current harmonics with fundamental air-gap flux and higher-order air-gap harmonics with fundamental current. Sixth-harmonic pulsating torque is dominant in a three-phase induction motor when inverter feeding the motor operated Copyright © 2018 Elsevier Inc. All rights reserved. https://doi.org/10.1016/B978-0-12-811407-0.00016-7 457
- 2. in six-step mode. In a five-phase drive the most dominant pulsating torque is a 10th harmonic and as such for n-phase it is 2nth harmonic torque. Other advantages are lower per-leg current rating for the same voltage rating (due to lower current rating series and parallel switch combination is not required and hence cheaper solution is achieved), greater fault tolerance (machine can start and run even with loss of one or more phase supply), lower dc link current harmonics and lower harmonic losses. Multiphase electric machines are becoming more popular in the range of medium- and high-power applications [1–5]. Con- sidering an inverter-fed high-power electric motor with power rating exceeding the available rating of power semiconductor switches, the designer has to increase the number of feeding inverters. This implies higher number of phases on the stator of the electric motor as well. Two solutions can be sought for segmenting the power, either increase the number of phases in multiple of three (parallel-connected multiple three-phase inverters) or increase the number of legs of inverter with each leg handling a power of P/n (P is the total power, and n is the number of phases). The design solutions are shown in Fig. 15.1. The solutions given in Fig. 15.1B have n number of parallel- connected three-phase inverters each carrying power of P/n. The supplied motor has multiple three-phase windings with separate neutral points. The major advantage of these off- the-shelf standard three-phase inverters is to supply the motor with each inverter handling lower amount of power. However, the major issue of this drive topology is the circulating current due to the voltage mismatch of each three-phase inverter. The electric motor in this case is called asymmetrical or split-phase motor. This solution is preferred and most widely used in industries because of the fact that the three-phase system solu- tion is well proved and a mature technology: Solution of Fig. 15.1C, in contrast to the previous solution, works with a single inverter of n-phases supplying electric motor of n-phase. Each phase or leg now handles P/n power, and the circulating current is absent. The electric motor in this case is called symmetrical n-phase motor. This solution is also employed in high-power marine drive applications [6]. Reliability and fault tolerance are other driving forces leading to the development of multiphase system. Due to high phase number, fault tolerance is inherently guaranteed, which is of high importance in safety critical applications such as ship pro- pulsion, more electric aircrafts, electric vehicles, and industrial setup where production loss is critical such as oil and gas plants and military. The multiphase motor drive guarantees continu- ous operation, however, with degraded performance under fault conditions. The higher the phase number, the better is the performance during faults. This make them highly attrac- tive in applications mentioned above [7,8]. According to classical electric machine theory, the air-gap flux harmonic content improves and becomes close to sinusoi- dal with the increase in the number of phases. The improved flux density waveform leads to: (i) reduced rotor losses due to flux pulsation and eddy currents (this has importance for high-speed permanent magnet machines since the eddy current losses are very high at high speed in such kind of machines) and (ii) improved torque quality with reduced amplitude of torque pulsation that occurs at higher frequency (this is very impor- tant when machine is subjected to high distorted current, and limits are enforced on the maximum allowable torque pulsation). Multiphase generators, specially five phases and more, have started to find a slot in the market due to their advantages over three-phase counterpart [9,10]. This multiphase system could be more suitable for direct drive wind energy, microturbines, and electric vehicle applications since the need for gears can be minimized. Multipulse rectifiers are employed, which have Three-phase Motor Three-phase DC/ AC converter P V DC (A) n-Phase motor (n=multiple of 3) Three-phase DC/ AC converter P/n V DC Three-phase DC/ AC converter V DC Three-phase DC/ AC converter V DC P/n P/n (B) n-Phase motor n-Phase DC/AC converter P/n-per phase V DC (C) FIG. 15.1 (A) Three-phase drive, (B) multiple three-phase drive, and (C) multiphase drive. 458 A. Iqbal et al.
- 3. the ability to reduce the line current harmonic distortion and normally do not require any LC filters or power factor improve- ment devices. Multipulse DC can be obtained either by increas- ing the number of phases of the converter or by the use of phase-shifting transformer along with special secondary wind- ing connections in the conventional six-pulse rectifiers. In drive application, the use of phase-shifting transformer provides an effective means to block common-mode voltages generated by the rectifier and inverter, which would otherwise appear on motor terminals, leading to a premature failure of machine winding insulation. Normally AC-DC converters are classified into power factor control rectifiers operated at high switching frequency and line-commutated rectifiers (uncontrolled or con- trolled) operated at power frequency or generated frequency. The multiphase line-commutated converter normally offers simple control, simple construction, and low cost but suffers from poor input power factor, low input current THD, and uni- directional current flow. The shortcoming of line-commutated rectifiers is overcome by the use of high-switching-frequency PWM rectifiers, voltage-source rectifiers, or current-source rec- tifiers, but the switch current and voltage limitation may restrict the use of PWM rectifiers in high-power applications. Multiphase DC-AC voltage-source inverter is obtained from three-phase voltage-source inverter by adding extra legs (each leg has two switches in two-level inverter and a higher number of switches for multilevel inverter). The two switches of the same leg are complimentary in operation (i.e., when upper switch is on, the lower switch must be off and vice versa). The power switches can assume only two states, that is, on (called level 1) or off (called level 0). Hence, as such for n-phase inverter, there can be 2n number of switching states. Consider- ing a three-phase inverter, the number of switching states are 8, and, for example, for a nine-phase inverter, the number of switching states are 29 ¼512 [5]. It is seen that the number of switching states increases significantly with the increase in the number of phases or legs. Higher numbers of switching states offer flexibility in devising control techniques. Thus, mul- tiphase inverter control has several degrees of flexibility in con- trol. Multiphase inverter can be controlled using different PWM techniques such as carrier-based sinusoidal PWM, har- monic injection PWM, selective harmonic PWM, hybrid PWM, and space-vector PWM. Each method can produce different output magnitudes. Simple carrier-based PWM for multiphase inverters works exactly the same as for three-phase inverters. The maximum possible output phase-to-neutral voltage is 0.5 VDC, where VDC is DC-link voltage magnitude for multi- phase inverter [1]. However, the output phase-to-neutral volt- age magnitude varies for different phase numbers when using space-vector PWM. Nevertheless, the output phase-to-neutral voltage of multiphase inverters is less than that of a three-phase inverter. Multiphase inverter space vectors are transformed into multiple orthogonal planes, and control is implemented in order to regulate each plane vectors. In multiphase variable- speed drives (with distributed winding multiphase machine), torque is controlled only from one plane vector (d-q), and the rest of the plane vectors produce distortion and hence need to be minimized using PWM techniques. When concentrated winding multiphase machines are supplied using multiphase voltage-source inverters, all plane vectors are used to enhance the torque production. This is a unique feature of concentrated winding multiphase machine not available in three-phase machines. When implementing high-performance control such as vector control and direct torque control, higher control flex- ibility is available, and different solutions can be implemented. Multiphase AC-AC converter more popularly known as mul- tiphase matrix converter (MPMC) is also formulated by adding extra legs in three-phase matrix converter configuration. They are classified as direct matrix converters (DMC) and indirect matrix converters (IMC). Each converter leg has three bidirec- tional power switches each connected to one phase of the utility grid system, and at the output, load is connected. The input is fixed voltage and fixed frequency supply, while the output is of variable voltage and variable frequency. There are configura- tions where the number of input phases is three while the output phase are more than three and vice versa [4,5]. The multiphase matrix converter encompasses the advantages of three-phase matrix converters and multiphase systems. The major applica- tion areas are envisaged in multiphase wind energy system. A matrix converter can be seen as an array of mn bidirec- tional power semiconductor switches that can transform m-phase fixed voltage and fixed frequency input to n-phase var- iable voltage and variable frequency output without intermedi- ate DC conversion stage. The input side of a matrix converter is voltage fed, while the output side is current fed, and hence, an inductive filter is required at the output side, and a capacitive filter is used at the input side. As the load is itself of inductive nature, the requirement of output filter diminishes. The size of the input filter used in matrix converter is significantly smaller than an equivalent voltage-source inverter. Considering an mn matrix converter, the number of switching states is 2mn . Large numbers of switching states are produced; however, not all of them are useful. Due to the nature of input (being voltage source) and output (being cur- rent source), the input should not short-circuited, and the out- put should not be open-circuited. As a consequence, only one switch in each leg conducts at one instant of time, and hence, a usable number of switching states are mn . In matrix converter, the output (sinusoidal) is formed from input (sinusoidal), and hence, output can assume any level depending upon the instantaneous value of the input. This makes the switching logic of matrix converter quite complex. The output voltage of a three-phase input and three-phase output matrix converter is 86.6% of the input voltage. The output-voltage magnitude reduces for higher phase number of outputs; for example, for a three-phase input and five-phase output matrix con- verter, it is 78.86% [11], and this value decreases further with increase in the output number of phases. The output voltage becomes higher than the input for mn matrix converter 459 15 Multiphase Converters
- 4. for mn; for example, for a five-phase input and three-phase output, it is 104.4%, and this value further increases as m is increased [4,12]. Multiphase matrix converters are constructed from bidirec- tional power switches that are realized in the same way as a three-phase matrix converter. The modulation strategies are complex and can be built upon the concept of three-phase matrix converter. However, significant challenges exist in obtaining proper modulation technique for a multiphase matrix converter. Some modulation strategies discussed in the litera- ture are carrier-based PWM, space-vector PWM, and direct- duty-ratio-based PWM [13–19]. Multiphase matrix converters find its application in wind energy generation [20], power system [21,22], and ship propul- sion [23]. When used in multiphase energy generation, usually the input side of the matrix converter is of higher phase, and the output side is three-phase connected to either utility grid or feeding isolated load. A 27-phase input and 3-phase output matrixconverterof100 MWpower rating ispresented in[24,25]. Present-day advancement in powering processors invariably uses multiphase buck converter topology because of higher out- put current and low-voltage requirement. Single-phase buck converter works well for low-voltage applications with currents up to 25 A. Higher filtering requirement and efficiency issue limits the use of single-phase topology in applications such as voltage regulator module (VRM). Interleaving as technically known reduces ripple currents at the input and output. A multiphase buck converter reduces considerably the i2 R cur- rent power dissipation in the controlled switches and inductors. The distribution of current in various paths in a multiphase converter reduces the current magnitude through the switches, thereby reducing the switching losses. The output filter require- ment decreases in a multiphase implementation due to the higher frequency of ripple current as a result of ripple current cancelation in the power stage for each phase. The single-phase implementation has much higher ripple content. Load tran- sient performance is also better because of the reduction in energy stored in each output inductor. The lower the ripple cur- rent is, the less the perturbation will be. The input capacitors supply all the input current to the buck converter if the input wire to the converter is inductive. Improvement in multiphase topologies and their control strategies promise improved per- formance compared to the conventional multiphase buck converter. This chapter is organized into five different sections covering the topologies, operation, and control of different types of multiphase power converters. Section 15.2 describes the types and classifications of different multiphase power converters. Section 15.3 is dedicated to AC-DC converters considering multiphase and multipulse output. Section 15.4 is devoted to DC-AC converters especially focusing on five-phase and seven-phase voltage-source inverter. Section 15.5 covers the description of multiphase AC-AC converters, and multiphase DC-DC converters are discussed in Section 15.6. 15.2 Types and Topologies of Multiphase Converters The requirements for the current and voltage continue to increase with an increase in power level, and systems become more and more complex. The amount of current/voltage of power source to meet such requirements usually needs a com- bination of several power controllers to improve the thermal stress of the individual power components. The driving mech- anism for this combination leaves one with two choices: single phase or multiphase. Multiphase converters reduce the input and output current ripples by interleaving the two or more stages of power con- verters. By increasing the phase number, the output-voltage ripple and the input capacitor size can be curtailed without increasing the switching frequency of the power devices. Load dynamic performance is significantly improved during tran- sients due to lower-output-voltage ripple and smaller output inductors. The low switching losses and driver circuit losses of power semiconductor devices at relatively low switching fre- quency and the reduced power losses due to equivalent series resistance (ESR) of the capacitors help achieve overall high effi- ciency of converters. For multioutput applications, multiphase converters may also provide the benefit of smaller input side capacitors. Single-phase versus multiphase converters are as follows: (1) Single-phase converters work well for low voltages and up to certain amount of current say about 25 A, but power dissipation and efficiency start to become an issue at higher currents. One suitable approach is to develop multiphase converters [26]. (2) The output filter requirements decrease in multiphase implementation due to the reduced current in the power stage for each phase. Compared with single-phase approach, the inductance and inductor size are drasti- cally reduced because of lower average current and lower saturation current. (3) Ripplecurrentcancelationinthe outputfilterstageresults in a reduced ripple voltage across the output capacitor compared with single-phase approach. This is another reason why a multiphase converter is preferred. (4) Load transient performance is improved due to the reduction of energy stored in each output inductor. The reduction in ripple voltage as a result of current cancelation contributes to minimal output-voltage over- shoot and undershoots because many cycles will pass before the loop responds. The lower the ripple current is, the less the perturbation will be. Like single-phase or three-phase converters, multiphase con- verters are classified as AC-DC, DC-AC, DC-DC, and AC-AC converters. Multiphase converters are simple extension of three-phase converters. As far as hardware is concerned, there 460 A. Iqbal et al.
- 5. is not much difference. However, the control complexity increases manyfold with the increase in the number of phases. There are further classifications in these converters. The classi- fication of multiphase converters is shown in respective section. 15.2.1 Multiphase AC-DC Converters A significant amount of work is done on developing novel topologies of multipulse AC-DC converters since they have huge potential applications for unidirectional and bidirectional power flow starting from six pulses to a large number of pulses. The major advantage of adopting a higher pulse number is the current ripple reduction. The novel configurations in multiphase AC-DC converter were developed of unidirectional and bidirectional topologies with three or more number of phases. Classification of multi- phase AC-DC converters is shown in Fig. 15.2, which is based on power flow, number of pulse used, isolated and nonisolated topologies, and various techniques used to improve AC current profile and output DC voltage waveform [27]. Based on the application and requirements, some systems require unidirec- tional power flow, and some require bidirectional power flow. Unidirectional systems use diode rectifiers and transformer circuit configurations in isolated and nonisolated topologies. The unidirectional topologies have configurations of six pulses and its multiple. If the voltage difference is more between input and output, then isolated configuration is useful, and if the difference is less, nonisolated topologies are used. However, these are further classified as bridge and full-wave rectifiers. These types of full-wave multipulse converters (MPC) can also be further classified whether it uses double star or tapped poly- gon transformer secondary to create twelve phases to feed full- wave diode rectifiers. Both configurations have their own merits and demerits, but both MPC configurations show the same per- formance in terms of device and transformer utilization. On the other hand, the bidirectional AC-DC converters have the power flow from AC mains to DC output or vice versa and normally use thyristors with phase angle control to obtain wide varying DC output voltages. These MPCs use multiple winding transformers to generate higher number of the phases. Like unidirectional, these MPCs are also divided as isolated and nonisolated. These are mainly used to feed DC motor drives and synchronous motor drives. 15.2.2 Multiphase DC-DC Converters Multiphase topologies can be configured as a step-down (buck), step-up (boost), buck boost, and even forward con- verter. A multiphase DC/DC converter according to the pre- sent invention includes a plurality of DC/DC converters whose outputs are connected in common to supply electric power to a load and a load state detection portion that detects a state of the load connected to the plurality of DC/DC con- verters and outputs a detection result. Multiphase DC-DC converters classification is shown in Fig. 15.3. 15.2.3 Multiphase DC-AC Converters Multiphase DC-AC converters are the main source of multi- phase adjustable-speed drives. The major driving force behind the adoption of multiphase motor drive is due to the power segmentation in large number of converter legs. The power switching devices have limited voltage- and current-handling capabilities. Hence, when used in high-power application, series-and parallel combination of devices are required. This is cumbersome solution because of dynamic voltage sharing problem among the series-/parallel-connected power switching devices. Better solution is obtained when the power per phase or per leg is reduced by increasing the number of phases or number of legs, and this is termed as multiphase DC-AC Multiphase AC-DC converters Diode rectifiers (uncontrolled) Single way Isolated SCRs/IGBTs (controlled) Non isolated Isolated Non isolated Bridge type Full wave Bridge type Full wave 6/12/18/24 pulse converters 6/12/18/24 pulse converters 6/12/18/24 pulse converters 12/18 pulse converters 6/12/24 pulse converters 6/12/18/24 pulse converters FIG. 15.2 Multiphase AC-DC converter classification. 461 15 Multiphase Converters
- 6. inverters. Multiphase DC-AC inverters are simple in design as they are simple extension of three-phase DC-AC inverter. However, they offer large degree of switching redundancies and hence great flexibility in control. Although control becomes complex, the performance is improved manifold. Multiphase DC-AC inverters can be built in the same topolo- gies as that of their three-phase counterparts and hence have the same calcifications and types. Multiphase AC-DC con- verters normally classified as shown in Fig. 15.4. First version of multiphase inverter technology is five-phase VSI fed to star-connected five-phase load. Five-phase VSI configuration found application for five-phase induction machine and synchronous machine drives. Six-phase inverter configuration was built with two two-level standard three- phase VSIs, with two separate DC sources fed to dual three- phase induction motor. Seven-phase VSI fed to star-connected seven-phase load based on multiple space-vector modulation and seven-phase VSI configuration found applications for seven-phase permanent magnet synchronous and synchronous reluctance motor drives. Fig. 15.5 shows simple five-phase induction motor drive. Multiphase inverters are also classified as cascaded H-bridge, diode clamped, and flying capacitor topologies. They can also be built in hybrid configuration. Multiphase impedance-source inverters (ZSI) and quasi impedance-source inverters (qZSI) are also reported in the literature [28]. ZSI and qZSI are special inverters that have the capability of boosting the source voltage and inverting DC to AC simultaneously. The boosting can be as high as 200%–300%. They are popular in solar PV applications since boosting and inversion is done in a single stage. Multi- phase ZSI/qZSI is used to feed multiphase motor drives. 15.2.4 Multiphase AC-AC Converters MultiphaseAC-AC converters are generallyclassified asACvolt- age controllers, matrix converters, and cycloconverters. Fig. 15.6 shows various topologies of multiphase AC-AC converters. AC voltage regulators are further classified as phase-controlled con- verters and fully controlled voltage converters. Three-phase cycloconverters are of several types. For example, there are the 3-pulse cycloconverters, 6-pulse cycloconverters, and 12-pulse cycloconverters. Typically, the three-pulse con- verter is built with the three single, and the six-pulse converter is generally the combination of two three-pulse converters and Multiphase DC-DC converters Multiphase buck converter Multiphase boost converter Multiphase Buck boost converter Unidirectional converter Bidirectional converter Unidirectional converter Bidirectional converter Unidirectional converter Bidirectional converter FIG. 15.3 Multiphase DC-DC converter classification. 5-phase motor Cell-1 AC/DC converter 1-phase AC 5-phase AC van ven Cell-2 AC/DC converter FIG. 15.5 Simplified five-phase drive. Multiphase DC-AC converters Two level 5-Phase Multilevel Flying capacitor 3-Phase n-Phase 6-Phase Cascaded H-Bridge Diode clamped FIG. 15.4 Multiphase DC-AC converter classifications. 462 A. Iqbal et al.
- 7. so on. The 12-pulse converter is obtained by connecting two six- pulse configurations in series and appropriate transformer con- nections for the required phase shifted. Multiphase AC-AC converter classification is shown in Fig. 15.6. By using the knowl- edge of constructing a DC-modulated single-stage AC/AC converter, a multistage AC/AC converter can be easily obtained. Examples with complex structures are Luo converter, superlift Luo converter, and multistage cascaded boost converter. Using the same technique, one can construct DC-modulated multi- phase AC/AC converters where they are classified as multiphase AC/AC buck, boost, and buck-boost converter. Cycloconverters are broadly classified as naturally commu- tated and forced commutated. The later one is also known as matrix converter. Multiphase matrix converters are in study and are being studied in detail [4]. Fig. 15.7 shows some of the possible configurations of frequency changers. The one Multiphase AC-AC converters AC-AC voltage regulator converters Multiphase phase controlled AC voltage converter Fully controlled multiphase AC voltage controller Cycloconverters With DC energy storage Without DC energy storage Hybrid 3-phase 3-pulse converter 3-phase 6-pulse qud converters Matrix converters DC modulated multiphase AC to AC converter Buck converter Boost converter Buck boost converter FIG. 15.6 Multiphase AC-AC converter classification. Multiphase frequency converters With DC-link VSR-VSI CSR-CSI Without DC-link (MPMC) Direct (DMMC) Indirect (IMMC) Sparse MC (SMC) Ultra sparse MC (USMC) Multilevel DMMC Impedance-source MPMC Possible topologies for research FIG. 15.7 Multiphase frequency changers. VSR, voltage source rectifier; VSI, voltage source inverter; CSR, current source rectifier; CSI, current source inverter; MPMC, multiphase matrix converter; DMMC, direct multiphase matrix converter; IMMC, indirect multiphase matrix converter; SMC, sparse matrix converter; USMC, ultra sparse matrix converter. 463 15 Multiphase Converters
- 8. with a DC link is also commonly known as back-to-back (B2B) topology. Although B2B converter does the AC-AC conversion, it is sort of a paradigm to classify the topologies without the DC link under AC-AC converters. Also, the figure shows the possibility of research in the field of multiphase matrix converters. 15.3 Multiphase Multipulse AC-DC Converters Solid-state AC-DC converters are widely used in a number of applications such as adjustable-speed drives (ASDs), high-voltage DC (HVDC) transmission, and electrochemical processes such as electroplating, telecommunication power sup- plies, battery charging, uninterruptible power supplies (UPS), high-capacity magnet power supplies, high-power induction heating equipment, aircraft converter systems, plasma power supplies, and converters for renewable energy conversion sys- tems. These converters, which are also known as rectifiers, are generally fed from three-phase AC supply in power rating above few kilowatts. They exhibit the problems of power quality in terms of injected harmonics, resulting in poor power factor, AC voltage distortion, and rippled DC outputs. Because of these problems in AC-DC conversion, several standards and guide- lines are laid down, which are to be referred by designers, man- ufacturers, and users. Therefore, various methods are used to mitigate these problems in AC-DC converters. Normally, filters are recommended in already existing installations, which may be passive, active, or hybrid types depending upon rating and economic considerations. These filters have been developed from small to large power ratings to reduce the power quality problems of AC-DC converters. However, in some cases, the ratings of these filters are close to the converter rating, which not only increases the cost but also increases the losses and com- ponent count, resulting in reduced reliability of the system. However, in future installations, it is preferred to modify the converter structure at design stage either using active or passive (magnetic) wave shaping of input currents or using multipulse AC-DC converters by using multiphase system or different con- nections of standard three-phase six-pulse AC-DC converters. At higher power level, generally, multiphase system is preferred. It reduces the ripples in the line current and load voltages dras- tically, and thus, EMI reduces, and the harmonic filter require- ments also become very nominal. 15.3.1 Five Phase Uncontrolled Full Wave Bridge Rectifier The circuit diagram of a simplified five-phase (ten pulses) uncontrolled rectifier consisting of 10 diodes (D1–D10) is shown in Fig. 15.8, where van, vbn, vcn, vdn, and ven are the supply phase voltages having peak value of Vm given by Eq (15.1): van ¼ Vm sin ωt ð Þ vbn ¼ Vm sin ωt 2π=5 ð Þ vcn ¼ Vm sin ωt 4π=5 ð Þ vdn ¼ Vm sin ωt 6π=5 ð Þ van ¼ Vm sin ωt 8π=5 ð Þ (15.1) The diodes are assumed ideal and are numbered according to their conduction sequence 1,2- ,3- 3,4- 4,5- 5,6- 6,7- 7,8- 8,9- 9,1. The line voltages for adjacent phases will be different from that of nonadjacent phases. The line voltages for adjacent and nonadjacent phases can be obtained from the respective phasor diagrams shown in Figs. 15.9 and 15.10, respectively, as follows: For adjacent phases, vab ¼ van vbn vab ¼ Vm sin ωt ð ÞVm sin ωt 2π=5 ð Þ vab ¼ 2Vm sin π=5 ð Þ cos ωt π=5 ð Þ ∵sin α sin β ¼ 2 cos α + β 2 sin αβ 2 vab ¼ 1:1755Vm sin ωt + 3π=10 ð Þ (15.2) D1 D3 D5 D7 D9 D6 D8 D10 D2 D4 ven n IDC p q ia ib ic id ie ia wt L o a d 72 degrees vdn vcn vbn van van vbn vcn vdn ven FIG. 15.8 Five-phase full-wave uncontrolled rectifier circuit. van vbn vcn vdn ven –vbn 72 degrees 54 degrees vab FIG. 15.9 Phasor diagram of the line voltages of adjacent phases. 464 A. Iqbal et al.
- 9. For nonadjacent phases, vad ¼ van vdn ¼ Vm sin ωt ð ÞVm sin ωt 6π=5 ð Þ ¼ 2Vm sin 3π=5 ð Þ cos ωt 6π=10 ð Þ vad ¼ 1:9021Vm sin ωt π=10 ð Þ (15.3) Fig. 15.11A shows the waveforms of the maximum and mini- mum value of phase voltage in different intervals. The maxi- mum phase voltage Vpn and minimum phase voltage Vqn described by Eq (15.4) will appear at the output terminals p and q. Both the diodes in the same leg never conduct simulta- neously, which avoids direct short circuit in the leg. In the upper leg, the diodes (odd numbered) having its anode con- nected with phase voltage of highest value among phases will conduct. Similarly, in the bottom leg, the diodes (even num- bered) having its cathode connected with lowest phase voltage will conduct at any instant of time: Vpn ¼ max van, vbn, vcn, vdn, ven ð Þ Vqn ¼ min van, vbn, vcn, vdn, ven ð Þ (15.4) The output-voltage waveform shown in Fig. 15.11B is a 10-pulse waveform appearing across the load. For a purely resistive load, the waveform of the line current ia shown in Fig. 15.11C has two humps per half cycle of the supply fre- quency. The other four line currents, ib, ic, id, and ie, have the same waveform as ia but lag from ia by 2π/5, 4π/5, 6π/5, and 8π/5 radians, respectively. The average and rms value of output voltage at load can be calculated as VDC ¼ 1 2π=10 ð 7π 10 π 2 1:902Vm sin ωt π=10 ð Þd ωt ð Þ VDC ¼ 1:87087Vm (15.5) Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 2π=10 ð 7π 10 π 2 1:902Vm sin ωt π=10 ð Þ ½ 2 d ωt ð Þ v u u u u t Vrms ¼ 1:87107Vm (15.6) For a resistive load, the harmonics of the output voltage can be found by using Fourier series analysis. To find the Fourier coef- ficients, we integrate vbe from π/10 to +π/10. Considering the van vbn vcn vdn ven −vdn 18 degrees vad 72 degrees FIG. 15.10 Phasor diagram for the addition of nonadjacent phases. −0.5 0 0.5 +Vm D9 D10 van vbn vcn vdn ven ven veb vec vac vad vbd vbe vce vca vda vdb veb −ncn D2 −ndn D4 −nen D6 −nan D8 −nbn wt wt wt wt −Vm 0 Vm 0.5Vm 1.5Vm 1.9Vm v vo VDC ia iD1 0 0 D1 D3 D5 D7 D9 (A) (B) (C) (D) π/5 2π/5 3π/5 4π/5 6π/5 7π/5 8π/5 9π/5 2π π p/10 5p/10 3p/10 7p/10 11p/10 15p/10 2p 3p/10 7p/10 11p/10 15p/10 2p 13p/10 17p/10 2p 9p/10 FIG. 15.11 (A) Phase voltages w.r.t p and q points, (B) output voltage across the load, (C) phase “a” current, and (D) diode current. 465 15 Multiphase Converters
- 10. half-wave symmetry, the Fourier coefficients will be calculated as follows: bn ¼ 0 (15.7) an ¼ 1 π=10 ð π 10 π 10 1:9021Vm cos ωt ð Þ cos nωt ð Þd ωt ð Þ ¼ 6:067Vm n + 1 ð Þ sin n1 ð Þ π 10 h i + n1 ð Þ sin n + 1 ð Þ π 10 h i n2 1 ð Þ 8 : 9 = ; an ¼ 12:134Vm n2 1 ð Þ n sin nπ 10 cos π 10 cos nπ 10 sin π 10 n o (15.8) If the frequency of the source voltage is f, the output voltage has harmonics at 10f, 20f, 30f …etc. Eq. (15.8) is simplified as an ¼ 12:134Vm n2 1 ð Þ cos nπ 10 sin π 10 n o an ¼ 3:75Vm n2 1 ð Þ cos nπ 10 (15.9) The DC component is found by putting n¼0 in Eq. (15.9), and its value is VDC ¼ a0 2 ¼ 1:87Vm (15.10) This is the same value as calculated in Eq. (15.5). The Fourier series of the load voltage can be written as vL t ð Þ ¼ a0 2 + X ∞ n¼10,20,⋯ an cos nωt ð Þ (15.11) After substituting the values of the coefficients, we obtain vL t ð Þ ¼ 1:87Vm 1 X ∞ n¼10,20,⋯ 2 n2 1 ð Þ cos nπ 10 cos nωt ! (15.12) vL t ð Þ ¼ 1:87Vm 1 + 2 99 cos 10ωt 2 399 cos 20ωt + ⋯ (15.13) Fig. 15.12 shows the load voltage harmonics profile. Since each diode conducts one fifth of the time, the average diode current is given by Eq. (15.14). ID,avg: ¼ 1 2π ð 7π 10 3π 10 IDCd ωt ð Þ 2 6 4 3 7 5 ¼ 0:2IDC (15.14) Eq. (15.14) indicates that a five-phase rectifier will have switches with lower ratings as compared with the three-phase counterpart, provided that both are feeding the same load as average value of switch current in three-phase system is 33.33% and in this case it is 20% [9,10]. The input phase current can be expressed as is ¼ X ∞ n¼1,3,5.... 4IDC nπ sin nπ 5 sin nωt ð Þ (15.15) The fundamental component of input current is is1 ¼ 0:7484IDC sin ωt ð Þ (15.16) The rms value of the fundamental component of input current is Is ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 π ð 7π 10 3π 10 I2 DCdωt v u u u u t ¼ ffiffiffi 2 5 r IDC (15.17) PROBLEM 15.1 A five-phase bridge rectifier delivers 60 A current at a voltage of 317.5 V to a purely resistive load. If the frequency of the source is 60 Hz, determine the following: (a) Efficiency of rectification (b) Form factor (c) Ripple factor (d) Peak inverse voltage (PIV) of each diode (e) Peak current through a diode 10 20 30 40 50 60 70 0 Harmonics order Harmonics magnitude 2.02% 0.5% 0.22% 0.13% 100% 0.08% 0.05% 0.04% 1 2 1.5 0.5 FIG. 15.12 Harmonics profile of output voltage. 466 A. Iqbal et al.
- 11. SOLUTION Since VDC ¼1.87087Vm and Vrms ¼ 1.87101Vm and also IDC ¼VDC/R and Irms ¼Vrms/R, (a) Efficiency of rectification η ¼ Pac PDC ¼ Vrms 2 R VDC 2 R ¼ 1:87107 ð Þ2 1:87087 ð Þ2 ¼ 99:97% (b) Form factor FF ¼ Vrms VDC ¼ 1:87107 187087 ¼ 100:011% (c) Ripple factor RF ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi FF2 1 p ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1:00011 ð Þ2 1 q ¼ 1:483% (d) Peak inverse voltage of each diode¼1.902Vm Also, since VDC ¼1.87087 Vm and peak value of phase voltage, Vm ¼ VDC 1:87087 ¼ 317:5 1:87087 ¼ 169:70V Hence, PIV ¼ 1:902169:70 ¼ 322:78V (e) The average DC current through each diode is IDC Diode ð Þ ¼ IDC 5 ¼ 60 5 ¼ 12A Also, IDC Diode ð Þ ¼ 4 π ð π 10 0 Im cos ωtdωt IDC ¼ 0:19673Im Im ¼ IDC 0:19673 ¼ 12 0:19673 ¼ 61A 15.3.2 Five-Phase Controlled Full Wave Bridge Rectifier Whenever a diode is in forward-biased condition, it conducts, but a thyristor (or controlled switch) requires a triggering signal for its conduction. If all the diodes of a 10-pulse full-wave uncontrolled converter are replaced by controlled switches (thy- ristors), it becomes a controlled converter. Fig. 15.13 shows the basic power circuit of a fully controlled 10-pulse 5-phase AC-DC converter. In this case, the thyristors are switched at an interval of 36 degrees sequentially as shown in Table 15.1. When T1 and T2 are conducting van and vbn voltages with respect to neutral appear at the load, that is, vad ¼van vdn, which is the line voltage VL (vad ¼ 1:9021Vm sin ωt ð π=10Þ). At ωt¼π/2+α, T1 is commutated, as on this instant of time vbn van, and the load current is transferred from T1 to T3. There are 10 voltage pulses, and the instantaneous output volt- age may become negative for an RL load, but the Vdc will always have positive value, except for an active (RLE) load. It should be noted that the line voltage corresponding to the nonadjacent phase voltages is only appearing across the load. AC voltages applied to the rectifier is given by Eq. (15.1). The delay angle reference is taken from the point the thyris- tor would begin to conduct if it were a diode. Thus, the delay angle is an interval from the thyristor being forward-biased and till the gate signal is applied. The corresponding waveforms are shown in Fig. 15.14A–H [9,10]. Since each voltage pulse corre- sponds to the line voltage and it appears for 1/10th period of the cycle 2π/10, the average output voltage corresponding to vad shown in Table (15.1) is given by VDC ¼ 1 2π 10 ð 7π 10 + α 5π 10 + α 1:902Vm sin ωt π=10 ð Þd ωt ð Þ VDC ¼ 51:902Vm π cos ωt π=10 ð Þ ½ 7π 10 + α 5π 10 + α VDC ¼ 1:87Vm cos α (15.18) T1 T3 T5 T7 T9 T6 T8 T10 T2 T4 van ia ia ib ic id ie vbn vcn vdn ven n IDC p q wt L o a d van vbn vcn vdn ven 72 degrees FIG. 15.13 Five-phase full-wave bridge rectifier basic circuit. TABLE 15.1 Thyristor firing instants and output voltage across the load Time interval Thyristor fired Conducting thyristor Output voltages across load [π/10+α, 3π/10+α] T10 T9 and T10 vo ¼ vec ¼ 1:902Vm sin ωt + 3π=10 ð Þ [3π/10+α, 5π/10+α] T1 T10 and T1 vo ¼ vac ¼ 1:902Vm sin ωt + π=10 ð Þ [5π/10+α, 7π/10+α] T2 T1 and T2 vo ¼ vad ¼ 1:902Vm sin ωt π=10 ð Þ [7π/10+α, 9π/10+α] T3 T2 and T3 vo ¼ vbd ¼ 1:902Vm sin ωt 3π=10 ð Þ [9π/10+α, 1π/10+α] T4 T3 and T4 vo ¼ vbe ¼ 1:902Vm sin ωt π=2 ð Þ [11π/10+α, 13π/10+α] T5 T4 and T5 vo ¼ vce ¼ 1:902Vm sin ωt 7π=10 ð Þ [13π/10+α, 15π/10+α] T6 T5 and T6 vo ¼ vca ¼ 1:902Vm sin ωt 9π=10 ð Þ [15π/10+α, 17π/10+α] T7 T6 and T7 vo ¼ vda ¼ 1:902Vm sin ωt + 9π=10 ð Þ [17π/10+α, 19π/10+α] T8 T7 and T8 vo ¼ vdb ¼ 1:902Vm sin ωt + 7π=10 ð Þ [19π/10+α, 21π/10+α] T9 T8 and T9 vo ¼ veb ¼ 1:902Vm sin ωt + 5π=10 ð Þ 467 15 Multiphase Converters
- 12. The rms output voltage is Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 2π=10 ð 7π 10 + α 5π 10 + α 1:902Vm sin ωt π=10 ð Þ ð Þ2 v u u u u u t Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 51:9022 V2 m π ð 7π 10 + α 5π 10 + α 1 cos 2 ωt π 10 2 v u u u u u t d ωt ð Þ Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 51:9022 V2 m 2π ωt 1 2 sin 2 ωt π 10 7π 10 + α 5π 10 + α v u u t Vrms ¼ 1:902Vm ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 2 + 5 2π sin π=5 ð Þ cos 2α r (15.19) It is evident from Fig. 15.14D that the instantaneous output voltage is continuous for απ/5; therefore, for any passive load, the load current will be continuous. For 3π/10απ/5, the continuity of load current depends on the phase angle of load (φ) and discontinuous for purely resistive load (φ¼0). For α3π/10, the load current will be always discon- tinuous for the passive load (Vdc 0), whereas for active load (RLE), there will be fourth-quadrant operation (Vdc 0 and Idc 0). Fig. 15.14E shows the input phase current, which is a quasis- quare wave. Since the instantaneous value of load current is assumed to be constant, so the phase current will be +IDC in the interval (3π/10+α and 7π/10+α) and IDC in the interval (13π/10+α and 17π/10+α). Also, each phase currents will be displaced from each other by 2π/5, irrespective of thyristor firing angles. The input phase current ia can be expressed in Fourier series as ia ¼ IDC + X ∞ n¼1,2,3,… an cos nωt + bn sin nωt ð Þ ia ¼ IDC + X ∞ n¼1,2,3,… ffiffiffi 2 p In sin nωt + φn ð Þ (15.20) where In is the rms value of nth harmonic component of the input current and is given by In ¼ 1 ffiffiffi 2 p a2 n + b2 n 1 2 (15.21) The φn is the nth harmonic phase shift and is given by φn ¼ tan1 an bn (15.22) Also, due to the symmetry of waveform, IDC ¼ 1 2π ð 2π 0 i ωt ð Þdωt ¼ 0 (15.23) 0 ve a va vpn 72 degrees vb vc vd -vb -vc -vd -ve -va -vb 0 Vm 0.5Vm Vdb Veb Vec Vac Vad Vbd Vbe Vce Vca Vda Vdb p/10 3p/10 −IDC T7,T8 T8,T9 T9,T10 T10,T1 T1,T2 T2,T3 T3,T4 T4,T5 T5,T6 T6,T7 T7,T8 1.5Vm 1.902Vm g1 g3 g5 g7 g9 g2 g4 g6 g8 g10 IDC iL iT1 ia vT1 vL wt wt wt wt wt wt wt wt vqn Vm −Vm v 0.5Vm (A) (B) (C) (D) (E) (F) (G) (H) +IDC +IDC 5p/10 7p/10 p9/10 11p/10 13p/10 15p/10 17p/10 19p/10 21p/10 p/5 3p/5 p 7p/5 9p/5 2p FIG. 15.14 (A) Supply voltage with positive and negative waveforms, (B) gate pulses for firing upper-leg switches, (C) gate pulses for firing lower-leg switches, (D) output-voltage waveform, (E) supply current of phase a, (F) switch 1 current, (G) load current, and (H) voltage across switch 1. 468 A. Iqbal et al.
- 13. an ¼ 1 π ð 2π 0 ia cosnωt dωt an ¼ 1 π ð 7π 10 + α 3π 10 + α IDC cosnωt dωt ð 17π 10 + α 13π 10 + α IDC cosnωt dωt 2 6 6 4 3 7 7 5 an ¼ 4IDC nπ sin nπ 5 sinnα, n ¼ 1,3,5,… (15.24) Similarly, bn ¼ 1 π ð 2π 0 ia sin nωtdωt bn ¼ 1 π ð 7π 10 + α 3π 10 + α IDC sin nωtdωt ð 17π 10 + α 13π 10 + α IDC sin nωtdωt 2 6 6 4 3 7 7 5 bn ¼ 4IDC nπ sin nπ 5 cos nα, n ¼ 1,3,5,… (15.25) Therefore, the rms value of nth harmonics current will be given by In ¼ 1 ffiffiffi 2 p a2 n + b2 n 1 2 ¼ 2 ffiffiffi 2 p nπ IDC sin nπ 5 (15.26) and φn ¼ tan1 an bn ¼ nα (15.27) n¼1 will give the rms value of fundamental component of the input current: I1 ¼ 2 ffiffiffi 2 p π IDC sin π 5 ¼ 0:529IDC (15.28) Hence, the input current can be given by is ¼ X ∞ n¼1,3,5,… 4IDC nπ sin nπ 5 sin nωt nα ð Þ (15.29) The fundamental input current, (substituting, n¼1), is is1 ¼ 4IDC π sin π 5 sin ωt α ð Þ ¼ 0:7484IDC sin ωt α ð Þ (15.30) The rms value of the input current can be calculated as Irms ¼ 1 2π ð 2π 0 i2 dωt 2 4 3 5 1 2 ¼ 2 2π ð 7π 10 + α 3π 10 + α I2 DCdωt 2 6 6 4 3 7 7 5 1 2 ¼ ffiffiffi 2 5 r IDC ¼ 0:6324IDC (15.31) The total harmonic distortion (THD) is given by THD ¼ ffiffiffiffiffiffiffiffiffiffiffi I2 I2 1 1 s ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 0:634IDC ð Þ2 0:529IDC ð Þ2 1 s ¼ 65:5% (15.32) Displacement factor DF ¼ cos φ1 ð Þ ¼ cos α ð Þ ¼ cos α (15.33) Power factor PF ¼ cos α ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 + THD2 p ¼ I1 I cos α ¼ 0:529IDC 0:634IDC cos α ¼ 0:8365 cos α (15.34) The load current is constant as the load is considered highly inductive; from Fig. 15.14F, it is clear that each switch operates for 2π/5 period of time in one cycle; accordingly, the switch average current can be calculated as Isw_avg: ¼ 1 2π ð 7π 10 + α 3π 10 + α IDCdωt 2 6 6 4 3 7 7 5 ¼ 0:2IDC (15.35) When calculated, the switch current is only 20% of DC-link current [10]. The harmonic factor (HFn) is defined as the nor- malized harmonic current of the supply with respect to the fun- damental component (In/I1) and is calculated using Eq. (6.36): HFn ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi In I 2 1 s (15.36) PROBLEM 15.2 A five-phase full-wave bridge-controlled rectifier has an AC input of 120 V rms at 60 Hz and 100 Ω load resistor. The delay angle is α¼π/12 radians. Determine the following: (a) Average current in the load (b) Power absorbed by the load 469 15 Multiphase Converters
- 14. (c) Efficiency of the rectifier (d) The expression for the input current (e) THD (f ) Power factor of the rectifier (g) Form factor and ripple factor SOLUTION (a) Average load voltage VDC ¼ 1:87Vm cos α ¼ 1:87 ffiffiffi 2 p 120 cos π=12 ð Þ ¼ 306:53V Average load current IDC ¼ VDC R ¼ 306:53 100 ¼ 3:06A (b) Power absorbed by the load PDC ¼ VDC IDC ¼ 306:533:06 ¼ 938W (c) The rms value of the output voltage Vrms ¼ 1:902Vm ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 2 + 5 2π sin π 5 cos 2α q Vrms ¼ 1:902120 ffiffiffi 2 p ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 2 + 5 2π sin π 5 cos 2 π 12 r Vrms ¼ 307:08V and Irms ¼ Vrms R ¼ 307:08 100 ¼ 3:071A Therefore, efficiency η ¼ PDC Pac ¼ VDCIDC VrmsIrms ¼ 306:533:06 307:083:071 ¼ 99:46% (d) The expression for the input current is ¼ X ∞ n¼1,3,5,… 4IDC nπ sin nπ 5 sin nωt nα ð Þ is ¼ X ∞ n¼1,3,5,… 3:9 n sin nπ 5 sin nωt nπ=12 ð Þ (e) The rms value of the input current I ¼ ffiffi 2 5 q IDC ¼ ffiffi 2 5 q 3:06 ¼ 1:935A The rms value of fundamental component of the input current I1 ¼ 2 ffiffiffi 2 p π sin π 5 IDC ¼ 0:5293:06 ¼ 1:6187 THD ¼ ffiffiffiffiffiffiffiffiffiffiffi I2 I2 1 1 s ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1:935 ð Þ2 1:6187 ð Þ2 1 s ¼ 65:5% (f ) The power factor PF ¼ cos α ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 + THD2 p ¼ cos π=15 ð Þ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 + 0:655 ð Þ2 q ¼ 0:818 (g) Form factor FF ¼ Vrms VDC ¼ 307:08 306:53 ¼ 1:0018 ¼ 100:18% Ripple factor RF ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi FF2 1 p ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1:0018 ð Þ2 1 q ¼ 0:06 ¼ 6% 15.3.3 Multipulse Rectifiers The multipulse uncontrolled rectifiers are suitable for VSI-fed drives, while the controlled rectifiers are employed for CSI drives. As the number of pulses per cycle increases, the output waveform gets improved. There are identical multipulse recti- fiers connected in either parallel, series, or separate modes to achieve higher pulses in the output. Fig. 15.15 shows general layout of 12-, 18-, and 24-pulse rectifier circuits [29,30]. If we employ 10-pulse rectifiers, then we can obtain 20, 30, and 40 pulses in the output. Six pulse rectifier Six pulse rectifier Phase shifting transformer VDC1 + − VDC2 + − VDC1 + − VDC2 + − VDC3 + − VDC1 + − VDC2 + − VDC3 + − VDC4 + − FIG. 15.15 Multipulse uncontrolled/controlled rectifier’s arrangement. 470 A. Iqbal et al.
- 15. 15.3.3.1 12-Pulse Series Type Controlled Rectifier Two six-pulse controlled rectifiers are powered by a phase- shifting transformer with two secondary windings in delta and star connections. Therefore, the phase angle between both secondary windings shifts 30 degrees each. In this case with 12 pulses per cycle, the quality of output-voltage waveform would definitely be improved with low ripple content [29]. Fig. 15.15 shows circuit configuration of a 12-pulse series- type controlled rectifier. A three-phase transformer with two secondary and one delta-connected primary feeds the two identical six-pulse controlled rectifiers. The upper three-phase bridge is fed from Y-connected secondary winding while lower with Δ-connected secondary winding. Therefore, this arrange- ment will result in the phase angle shifts between both second- ary windings by 30 degrees. The outputs of the two six-pulse rectifiers are connected in series, and the conduction period of the line current for each converter is 120 degrees. Consider an idealized 12-pulse rectifier where the line induc- tance Ls and the total leakage inductance Llk of the transformer are assumed to be zero and the magnitude of the current is con- stant (ripple-free) [29]. In practical case, the ripple in the DC current will be relatively low due to the series connection of the two six-pulse rectifiers, where the leakage inductances of the secondary windings can be considered in series. For the purpose of eliminating the dominate lower-order har- monics in the line current ia, the line-to-line voltage va1b1 of the Y-connected secondary winding (N2 turns) is in phase with the primary winding (N1 turns) voltage vab, while the Δ-connected secondary winding (N3 turns) voltage va2b2 leads vab by [29]: δ ¼ ∠va2b2 ∠vab ¼ 30 degrees (15.37) For the sake of simplicity, let N1 ¼ N,N2 ¼ N=2 and N3 ¼ ffiffiffi 3 p =2N (i.e., N1-N2-N3 ¼1:0.5:0.866). Therefore, the rms line-to-line voltage of each secondary winding will become Va1b1 ¼ Va2b2 ¼ Vab=2 (15.38) Since the two rectifiers are series-connected, net output, or load, voltage Vdc ¼Vdc1 +Vdc2 ; since the waveforms of Vdc1 and Vdc2 are phase shifted from each other by 30 degrees , therefore, the waveform of output voltage Vdc consists of 12 pulses per cycle of supply voltage. The current waveforms are illustrated in Fig. 15.16, where ia1 and ic2a2 are the phase currents of secondary Y and Δ windings, respectively, and i 0 a1 and i 0 c2a2 are the currents referred from secondary side to the primary side. The waveforms of reflected current to primary side of secondary Y-connected winding i 0 a1 will be identical to that of ia1 except that the magnitude is changed in ratio of the number of turns of the two windings. However, when ia2 is referred to the primary side, the reflected waveform does not keep the same waveform and magnitude. This is due to phase displacements of the harmonic current when they are referred from Δ-Y windings. This phase displacement is advan- tageous as it will lead to the cancelation of low-order predom- inant fifth and seventh harmonics from the currents of transformer primary winding and does not appear in the line current, which is given by Eq. (15.39): ia ¼ i’ a1 + i’ a2 (15.39) The secondary (Y-connected) line current ia1 can be expressed by Eq. (15.40): L o a d IDC c vcn n N1 vab va2b2 ia2 ic2a2 ib2c2 ia = i′a1+i′a2c2 d= 30 degrees d = 0 ia2b2 ib a2 b2 c2 a1 b1 c1 ia1 ib1 ic1 b vbn a van ic N2 N3 ib2 ic2 FIG. 15.16 Twelve-pulse series-type controlled rectifier connection circuit. 471 15 Multiphase Converters
- 16. ia1 ¼ 2 ffiffiffi 3 p π Idc sin ωt 1 5 sin 5ωt 1 7 sin 7ωt + 1 11 sin 11ωt + 1 13 sin 13ωt 1 17 sin 17ωt 1 19 sin 19ωt + … 2 6 6 4 3 7 7 5 (15.40) Since the waveform of current ia1 is of half-wave symmetry, it does not contain any even-order harmonics. Current ia does not contain any triple harmonics either due to the consider- ation of balanced three-phase system. The line current in Δ-connected secondary winding such as ia2 leads ia1 by 30 degrees, and the Fourier expression of current ia2 is given by Eq. (15.41): ia2 ¼ 2 ffiffiffi 3 p π Idc sin ωt + 30degrees ð Þ 1 5 sin 5 ωt + 30degrees ð Þ 1 7 sin 7 ωt + 30degrees ð Þ + 1 11 sin 11 ωt + 30degrees ð Þ + 1 13 sin 13 ωt + 30degrees ð Þ 1 17 sin 17 ωt + 30degrees ð Þ 1 19 sin 19 ωt + 30degrees ð Þ + … 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 (15.41) Similar equations for ib2 and ic2 can be obtained. The current i0 a1, which is identical to ia1 in wave shape, can be expressed in Fourier series by Eq. (15.42): i’ a1 ¼ ffiffiffi 3 p π Idc sin ωt 1 5 sin 5ωt 1 7 sin 7ωt + 1 11 sin 11ωt + 1 13 sin 13ωt… (15.42) The phase currents in the Δ-connected secondary windings ia2b2, ib2c2, and ic2a2 can be obtained from its line currents using the transformation given in Eq. (15.43): ia2b2 ib2c2 ic2a2 2 6 6 4 3 7 7 5 ¼ 1 3 1 1 0 0 1 1 1 0 1 2 6 6 4 3 7 7 5 ia2 ib2 ic2 2 6 6 4 3 7 7 5 (15.43) The phase currents in the Δ-connected secondary winding ia2b2, ib2c2, and ic2a2 have a stepped waveform, each step being of 60 degrees in width whereas Id/3 and 2Id/3 the heights. The expression for phase current in the Δ-connected secondary winding can be written as Eq. (15.44). ic2a2 ¼ 2 π ffiffiffi 3 p Idc sin ωt + 30degrees ð Þ 1 5 sin 5 ωt + 30degrees ð Þ 1 7 sin 7 ωt + 30degrees ð Þ + 1 11 sin 11 ωt + 30degrees ð Þ + ⋯ sin ωt + 150degrees ð Þ + 1 5 sin 5 ωt + 150degrees ð Þ + 1 7 sin 7 ωt + 150degrees ð Þ 1 11 sin 11 ωt + 150degrees ð Þ ⋯ 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 (15.44) On simplification of Eq. (15.44), we have ic2a2 ¼ 2 π Idc sin ωt + 1 5 sin 5ωt + 1 7 sin 7ωt + 1 11 sin 11ωt + 1 17 sin 17ωt + 1 19 sin 19ωt + ⋯ 2 6 4 3 7 5 (15.45) Similarly, the expressions for the currents ia2b2 and ib2c2 can be obtained. The corresponding reflected current to the primary side can be obtained from Eq. (15.45); by multiplying with turn ratio (N3 : N1 ¼ ffiffiffi 3 p : 2), we can obtain Eq. (15.46) [31]: i’ c2a2 ¼ ffiffiffi 3 p π Idc sin ωt + 1 5 sin 5ωt + 1 7 sin 7ωt + 1 11 sin 11ωt + 1 13 sin 13ωt + 1 17 sin 17ωt + 1 19 sin 19ωt + 1 23 sin 23ωt + 1 25 sin 25ωt + ⋯ 2 6 6 6 6 6 4 3 7 7 7 7 7 5 (15.46) Therefore, the line current ia ¼ i’ a1 + i’ c2a2 can be written as given in Eq. (15.47): ia ¼ 2 ffiffiffi 3 p π Idc sin ωt + 1 11 sin 11ωt + 1 13 sin 13ωt + 1 23 sin 23ωt + 1 25 sin 25ωt + ⋯ 2 6 4 3 7 5 (15.47) Different current waveforms are shown in Fig. 15.17. It is evi- dent from Eq. (15.47) that the two dominant harmonics, 5th and 7th, are absent along with 17th and 19th, which improves the THD of this type of converter configuration drastically. 15.3.3.2 Pulse Parallel-Type Controlled Rectifier In this case, the outputs of the two six-pulse rectifiers are con- nected in parallel. Fig. 15.18 shows circuit configuration of a 12-pulse parallel-type controlled rectifier. The circuit in the fig- ure simply uses an isolation transformer with a Δ-connected primary, a Y-connected secondary, and a second Δ-connected secondary to obtain 30 degrees (electrical degrees) phase shift. Since the instantaneous outputs of the two rectifiers are not 472 A. Iqbal et al.
- 17. equal, an interphase reactor is necessary to support the differ- ence in instantaneous rectifier output voltages and permit each rectifier to operate independently [29]. The line current in pri- mary winding of the transformer is the sum of reflected cur- rents from the two secondary windings, and it becomes stepped due to 30 degrees phase shift in two secondary currents as discussed in Section 15.3.3.1. Therefore, the harmonics and requirement of filter circuit parameters are reduced. Theoreti- cally, input current harmonics for rectifier circuit is a function of pulse number and can be expressed as H ¼ Np 1 (15.48) where N¼1, 2, 3… and p is pulse number. For example, in a three-phase six-pulse rectifier, the input current will have harmonic components at 5, 7, 11, 13, 17, 19, 23, 25, 29, 31, etc. multiples of the fundamental frequency. For the 12-pulse system shown in Fig. 15.16, the input current will have theoretical harmonic components at 11, 13, 23, 25, 35, 37, etc. multiples of the fundamental frequency as derived and discussed in Section 15.3.3.1. Since the magnitude of each har- monic is proportional to the reciprocal of the harmonic order, the 12-pulse system naturally has a lower harmonic distortion in input current. The problem with the parallel connection of the rectifiers is that thetworectifiersmustshare exactlyequalcurrenttoachieve the desired reduction in harmonics. This would be achieved if output voltages of both secondary windings matches exactly. Because of the differences in the transformer secondary imped- ances and open-circuit output voltages, this can be practically accomplished for a given fixed load (typically rated load), but not for loads varying over a range. This is the main problem of the parallel 12-pulse configuration connection. Whereas in the case of series connection of two rectifiers, the problems asso- ciated with current sharing are avoided, and an interphase reac- tor is not required. Parallel connections are normally preferred for applications where high current ratings rather than har- monics are the issue [32]. Generally, series connection of recti- fiers is much simpler to implement than the parallel connection. L o a d N1 a2 b2 c2 a1 b1 c1 N2 N3 FIG. 15.18 Twelve-pulse parallel-type controlled rectifier connection circuit. p/2 p 3p/2 2p wt wt wt wt wt wt i′c2a2 i′a1 ia 3 2IDC 2 IDC 3 2 IDC 2 IDC 3 2 IDC 3 2 IDC 3 IDC 3 IDC 3 1 2 1 IDC 7p/6 5p/6 11p/6 2p p 5p/3 2p/3 p/2 p/3 p/6 4p/3 3p/2 ia1 0 ia2 ic2a2 IDC IDC (A) (B) (C) (D) (E) (F) FIG. 15.17 Current waveforms of the 12-pulse series-connected con- trolled rectifier (Ls¼Llk¼0). (A) Output line/phase current in star- connected secondary winding. (B) Output line current in delta-connected secondary winding. (C) Output phase current in delta-connected second- ary winding. (D) Delta-connected secondary winding phase current reflected to primary side. (E) Star-connected secondary winding phase current reflected to primary side. (F) Total current in the primary side. 473 15 Multiphase Converters
- 18. 15.3.4 Single-Way Multiphase Systems Topologies The structure of single-way, m-phase rectifier is shown in Fig. 15.19. In single-way structures, only one diode conducts for single stage, and the remaining diodes are blocked. Due to this, single-way structures are more convenient while increasing the number of phases. In an m-phase, the diodes used in the rectifier circuits are divided into a number of groups in star connection. Each group will have three diodes, that is, for a six-diode rectifier, there will be two groups, and for a 12-diode rectifier, there will be four groups [31]. In a normal connection, the star points will be connected together. But in this circuit, each group will have its all secondary windings, and instead of a direct connection, the star points will be con- nected through an interphase transformer. The common neu- tral point serves as the negative terminal of the DC output circuit. For single-way topologies, the number of output pulses is equal to the number of phases, that is, p¼m, and the number of diodes are equal to m. Each diode is conducting for 2π/m electric radians. Fig. 15.19 shows few pulses of output-voltage waveform for m-phase half-wave uncontrolled rectifier. In gen- eral, for an m-phase system, the average and rms value of the output voltage is expressed by Eqs. (15.49) and (15.50), respectively: VDC ¼ Vm 2π=m ð π m π m cos ωt d ωt ð Þ¼ Vm sin π m π=m (15.49) rms voltage Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 2π=m ð π m π m Vm cos ωt dωt ð Þ2 v u u u u t Vrms ¼ Vm ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffi 1 2 1 + sin 2π m 2π m 2 6 6 4 3 7 7 5 v u u u u u t (15.50) The form factor and ripple factors are expressed by Eqs. (15.51) and (15.52), respectively. From these equations, it is evident that if m ! ∞ ) FF ! 1 and RF ! 0, FF ¼ Vrms VDC ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffi 1 2 1 + sin 2π m 2π m 2 6 6 4 3 7 7 5 v u u u u u t sin π m π m (15.51) RF ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 FF ð Þ2 q (15.52) which implies that by increasing the number of phases in a multiphase, single-way rectifier, the output voltage is improved, that is, it becomes smoother. By connecting to a con- ventional three-phase mains distribution, it is possible to increase the number of “phases” by using transformers with m separated secondary coils. The secondary coils can be con- nected in a large number of ways. Also, by increasing the num- ber of phases (as stated before, in single-way topologies, m¼p), the ripple frequency increases, and its amplitude decreases. This fact simplifies the filter design to reduce the ripple in the load [31,32]. The output waveform for m-phase half-wave diode rectifier is shown in Fig. 15.20. For highly inductive load, the output DC current may be considered as constant (IDC). The diode average current, rms current, and form factor can be obtained by Eqs. (15.53)–(15.55): ID avg: ð Þ ¼ IDC m (15.53) ID rms ð Þ ¼ IDC ffiffiffiffi m p (15.54) Kf ¼ ID rms ð Þ ID avg ð Þ ¼ ffiffiffiffi m p (15.55) L o a d vs1 vs2 vs3 vsm D3 D1 D2 Dm VDC IDC FIG. 15.19 m-Phase, single-way rectifier. 2p/m Vm vs3 vs2 vs1 iL FIG. 15.20 Output waveform for m-phase half-wave diode rectifier. 474 A. Iqbal et al.
- 19. The values for VDC and some of the parameters have been cal- culated for m¼6, m¼12, and m¼24 and are reported in Fig. 15.21. It is clear from the figure (A)–(C) that the frequency of the ripple on the output is p times the mains frequency. As can be seen, passing from 6 to 12 pulses, one gets a 3.5% improvement in the rectified voltage, while passing from 12 to 24 pulses this improvement is less than 1%. In practice, for single-way connections, the maximum num- ber of pulses is normally limited to 12 because of the growing complexity of the connections of the transformer’s secondary windings. Higher number of pulses can be obtained by using the combination of bridge structures. The best transformer uti- lization factor (TUF) that can be achieved with a single-way connection is 0.79, while with a bridge configuration it is pos- sible to reach higher values, up to 0.955. 15.3.5 Six-Phase AC to DC Converters Six-phase half-wave rectifiers generally have two configura- tions, namely, six phase with a neutral line circuit and double antistar with a balance-choke circuit. 15.3.5.1 Six-Phase Half Wave With a Neutral Line Circuit The power supply of a six-phase balanced voltage source is given by Eq. (15.56), and the waveform is shown in Fig. 15.22; in this case, each phase is shifted by 60 degrees: van ¼ Vm sin ωt vbn ¼ Vm sin ωt π=3 ð Þ vcn ¼ Vm sin ωt 2π=3 ð Þ vdn ¼ Vm sin ωt π ð Þ ven ¼ Vm sin ωt 4π=3 ð Þ vbn ¼ Vm sin ωt 5π=3 ð Þ (15.56) The six-phase half-wave rectifiers are shown in Fig. 15.23. The first circuit is called a Y-Y circuit, and the second circuit is called a Δ/Y circuit. Each diode conducts for 60 degrees in a cycle. VDC ¼ 1 π=3 ð 2π 3 π 3 Vm sin ωtdωt ¼ 3Vm π (15.57) Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 π=3 ð 2π 3 π 3 Vm sin ωt ð Þ2 dωt 2 6 4 3 7 5 v u u u u t ¼ Vm ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 2 + 3 ffiffiffi 3 p 4π s (15.58) FF ¼ Vrms Vdc ¼ 1:0008 (15.59) RF ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1:00082 12 p ¼ 0:04 (15.60) PF ¼ 0:55 (15.61) 6 10 14 18 22 0.96 0.97 0.98 0.99 1 Number of phases (m) (A) (B) Efficiency 8 12 16 20 6 10 14 18 22 24 Number of phases (m) 8 12 16 20 (C) 6 10 14 18 22 24 Number of phases (m) 8 12 16 20 1 1.0002 1.0004 1.0006 1.0008 1.001 Form factor 0.005 0.015 0.025 0.035 0.045 Ripple factor FIG. 15.21 Characteristics of the number of phases versus (A) efficiency, (B) form factor, and (C) ripple factor. –Vm 0 Vm p/6 p/3 p/2 2p/3 5p/6 p 7p/6 4p/3 3p/2 4p/511p/6 2p wt van vbn vcn vdn ven vfn FIG. 15.22 Six-phase supply waveforms. 475 15 Multiphase Converters
- 20. 15.3.5.2 Six-Phase Double-Bridge Full-Wave Uncontrolled Rectifiers Two circuits of the six-phase bridge full-wave diode rectifiers are shown in Fig. 15.24 and are called as a six-phase bridge cir- cuit and hexagon bridge circuit [31]. In this case, each diode conducts for 60 degrees in a cycle. The average output voltage is given by Eq. (15.62): VDC ¼ 2 π=3 ð 2π 3 π 3 Vm sin ωtdωt ¼ 6Vm π (15.62) 15.3.5.3 Six-Phase Half-Wave Controlled Rectifiers The six-phase half-wave controlled rectifiers are shown in Fig. 15.25 [31]. Each thyristor conducts for π/3 radians in a cycle. The firing angle α¼ωtπ/3 in the range of 0–2π/3. The average output voltage is VDC ¼ 1 π=3 ð 2π 3 + α π 3 + α Vm sin ωtdωt ¼ 3Vm π cos α (15.63) Load Vm Idc VDC Vm Load Vm IDC VDC 3Vm (A) (B) FIG. 15.23 Six-phase half-wave diode rectifiers: (A) Y/Y circuit and (B) Δ/Y circuit. Load Va 3Vm VDC IDC Neutral line may or may not be connected Load VDC IDC 3Vm 3Vm Vm (B) (A) FIG. 15.24 Six-phase full-wave uncontrolled rectifiers: (A) six-phase bridge circuit and (B) six-phase hexagon bridge circuit. 476 A. Iqbal et al.
- 21. Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1 π=3 ð 2π 3 + α π 3 + α Vm sin ωt ð Þ2 dωt 2 6 6 4 3 7 7 5 v u u u u u t ¼ Vm ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffi 1 2 + 3 ffiffiffi 3 p 4π cos α s (15.64) FF ¼ Vrms Vdc ¼ 1:0008 (15.65) RF ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 1:00082 12 p ¼ 0:042 (15.66) PF ¼ 0:956 (15.67) From Eq. (15.63), it is clear that the output voltage can have positive (απ/2) and negative (απ/2) values. When απ/ 2, the output current is (IDC ¼VDC/R), and when the firing angle α is π/2, the output voltage can have negative values, but the output current can only have positive values. 15.4 Multiphase DC-AC Converters 15.4.1 Modeling and Control of a Five-Phase Voltage Source Inverter This section is devoted to the development of a comprehensive model of a five-phase voltage-source inverter based on space- vector theory [32,33]. Proper modeling of voltage-source inverters is important in devising appropriate control algo- rithm. The complete model is broadly classified into two groups, namely, square-wave and PWM modes based on the operation of the inverter. The leg voltages and line voltages along with phase voltages are illustrated. The Fourier analysis of output phase-to-neutral voltages and nonadjacent voltages is performed for square-wave mode. The output phase-to-neutral voltage is shown to be essentially identical to those obtainable with a three-phase voltage-source inverter. At each step, simu- lation results are provided to support the analytic approach results. The relationship between the phase and line voltages for a five-phase system is also established. For high-power application, stepped operation of inverter is preferred over PWM mode to avoid switching losses. Square- wave mode of operation is elaborated for 180 degrees conduction mode, and the performance is evaluated in terms of harmonic content of phase-to-neutral voltages. 15.4.1.1 Modeling of a Five-Phase VSI Power circuit topology of a five-phase VSI is shown in Fig. 15.26. Each switch in the circuit consists of two power semi- conductor devices, connected in antiparallel. One of these is a fully controllable semiconductor, such as a bipolar transistor, MOSFET, or IGBT, while the second one is a diode. The input of the inverter is a DC voltage, which is regarded further on as being constant. The inverter outputs are denoted in Fig. 15.26 with lowercase symbols (a, b, c, d, and e), while the points of connection of the outputs to inverter legs have symbols in cap- ital letters (A,B,C,D,E). The basic operating principles of the five-phase VSI are developed in what follows assuming the ideal commutation and zero forward voltage drops. 15.4.1.2 Square Wave Mode of Operation Discrete switching of power switches in an inverter leads to stepped wave output termed as square-wave operation of the inverter. Conventionally, 180 degrees conduction mode is con- sidered leading to 10-step output phase voltages from the inverter. Each switch conducts for half of the fundamental cycle, Vm IDC VDC Vm Load Load Vm IDC VDC 3Vm (A) (B) FIG. 15.25 Six-phase half-wave controlled rectifiers: (A) Y/Y circuit and (B) Δ/Y circuit. 477 15 Multiphase Converters
- 22. that is, 180 degrees. The operation of upper and lower switches is complimentary in operation, that is, when upper switch is on, the lower switch is off and vice versa. In real-time application, a dead time isprovided between the turning onoflower switch and turn- ing offofupperswitch andviceversa.The incoming powerswitch cannot be turned on unless the outgoing switch is completely turned off. There is a finite time for complete turnoff of a power switching device, and hence, a dead time is to be provided. This is done in order to avoid short circuit of the source side. 180 degrees conduction mode Each switch is assumed to conduct for 180 degrees(half of the fundamental cycle), and the phase delay between firing of two switches in any subsequent two phases is equal to 360/5 degrees¼72 degrees. The driving control gate/base signals for the 10 switches of the inverter in Fig. 15.26 are illustrated in Fig. 15.27. One complete cycle of operation of the inverter can be divided into 10 distinct modes indicated in Fig. 15.27 and summarized in Table 15.2. It follows from these that at any instant in time there are five switches that are “ON” and five switches that are “OFF.” In the 10-step mode of operation, there are two conducting switches from the upper five and three from the lower five or vice versa. Space vector of phase voltages in stationary reference frame is defined, using power variant transformation [33]: v ¼ 2 5 va + avb + a2 vc + a2 vd + a ve (15.68) where a¼exp(j2π/5), a2 ¼exp(j4π/5), a*¼exp(j2π/5), a*2 ¼exp(j4π/5), and * stands for a complex conjugate. Leg voltages (i.e., voltages between points A,B,C,D, and E and the negative rail of the DC bus N in Fig. 15.26) are considered first. The leg voltages from Fig. 15.27 are substituted in expres- sion (15.68) to obtain their corresponding space vectors given as in Eq. (15.69): v1leg ! v2leg ! v3leg ! v4leg ! v5leg ! v6leg ! v7leg ! v8leg ! v9leg ! v10leg ! 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 ¼ 2 5 VDC 2 cos π 5 ej0 ejπ=5 ej2π=5 ej3π=5 ej4π=5 ejπ ej6π=5 ej7π=5 ej8π=5 ej9π=5 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 (15.69) TABLE 15.2 Modes of operation of the five-phase voltage-source inverter (10-step operation) Mode Switches ON Terminal polarity 1 9,10,1,2,3 A+ B+ C D E+ 2 10,1,2,3,4 A+ B+ C D E 3 1,2,3,4,5 A+ B+ C+ D E 4 2,3,4,5,6 A B+ C+ D E 5 3,4,5,6,7 A B+ C+ D+ E 6 4,5,6,7,8 A B C+ D+ E 7 5,6,7,8,9 A B C+ D+ E+ 8 6,7,8,9,10 A B C D+ E+ 9 1,7,8,9,10 A+ B C D+ E+ 10 8,9,10,1,2 A+ B C D E+ 5 5 5 5 2p 6p 7p 8p 9p 4p 3p 2p 0 p p S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 1 2 3 4 5 6 Modes 5 5 5 5 8 7 10 9 FIG. 15.27 Gating signals of a five-phase voltage-source inverter in square-wave mode. P N 1 6 8 10 2 4 3 5 7 9 A B C D E a b c d e n Load FIG. 15.26 Five-phase voltage-source inverter power circuit. 478 A. Iqbal et al.
- 23. It is seen that the leg voltages have magnitude of 2 5VDC2 cos π=5 ð Þ and are 36 degrees apart forming a decagon. There are in total 25 ¼32 switching states (base is taken as 2 because the switching states can only assume two values either 0 (indi- cate off state) or 1 (indicate on state)). The first 10 states are described above, and the remaining 22 switching states are dis- cussed in the next section. Phase-to-neutral voltages are discussed next. Phase-to- neutral voltages of the star-connected load are most easily found by defining a voltage difference between the star point n of the load and the negative rail of the DC bus N. The follow- ing correlation then holds true: vA ¼ va + vnN vB ¼ vb + vnN vC ¼ vc + vnN vD ¼ vd + vnN vE ¼ ve + vnN (15.70) Since the phase voltages in a star-connected load sum to zero (sum of five-phase sine wave at one instant of time is zero), the summation of Eq. (15.70) produces vnN ¼ 1=5 ð Þ vA + vB + vC + vD + vE ð Þ (15.71) Substitution of (15.71) into (15.70) produces phase-to-neutral voltages of the load in the following form: va ¼ 4=5 ð ÞvA 1=5 ð Þ vB + vC + vD + vE ð Þ vb ¼ 4=5 ð ÞvB 1=5 ð Þ vA + vC + vD + vE ð Þ vc ¼ 4=5 ð ÞvC 1=5 ð Þ vA + vB + vD + vE ð Þ vd ¼ 4=5 ð ÞvD 1=5 ð Þ vA + vB + vC + vE ð Þ ve ¼ 4=5 ð ÞvE 1=5 ð Þ vA + vB + vC + vD ð Þ (15.72) The phase voltages in different modes are obtained by substitut- ing leg voltages into Eq. (15.72), and their space vectors are determined using Eq. (15.68). The space vectors of phase-to- neutral voltage are identical to the leg voltage space vectors. The phase-to-neutral voltages for various modes are given in Fig. 15.28. Fourier analysis of the voltage waveforms, which relates DC link voltage of the inverter with the output, is elaborated. Using the definition of the Fourier series for a periodic waveform, v t ð Þ ¼ Vo + X ∞ n¼1 An cos nωt + Bn sin nωt ð Þ (15.73) where the coefficients of the Fourier series are given with Vo ¼ 1 T ð T 0 v t ð Þdt ¼ 1 2π ð 2π 0 v θ ð Þdθ An ¼ 2 T ð T 0 v t ð Þ cos nωtdt ¼ 1 π ð 2π 0 v θ ð Þ cos nθdθ Bn ¼ 2 T ð T 0 v t ð Þ sin nωtdt ¼ 1 π ð 2π 0 v θ ð Þ sin nθdθ (15.74) Observing that the waveforms possess quarter-wave symmetry and can be conveniently taken as odd functions, one can rep- resent phase-to-neutral voltages with the following expressions: v t ð Þ ¼ X ∞ n¼1 B2n1 sin 2n1 ð Þωt where B2n1 ¼ 4 π ð π 2 0 v θ ð Þ sin 2n1 ð Þθdθ and n ¼ 1,2,3,… (15.75) In the case of the phase-to-neutral voltage vb, shown in Fig. 15.28, one further has for the coefficients of the Fourier series: B2n1 ¼ 8VDC 5π 2n1 ð Þ 1 + cos 2n1 ð Þ 3π 5 cos 2n1 ð Þ 4π 5 where k ¼ 1,2,3,… (15.76) 5 p p 5 6p 5 4p 5 2p 2p 0 Va 5 3p 5 7p 5 8p 5 9p Vb Vc Vd Ve VDC VDC 5 3 5 2 FIG. 15.28 Phase-to-neutral voltages of the five-phase VSI in the square- wave mode of operation. 479 15 Multiphase Converters
- 24. The expression in brackets of Eq. (15.76) equals zero for all the harmonics whose order is divisible by five. For all the other har- monics, it equals 2.5. Hence, one can write the Fourier series of the phase-to-neutral voltage as v t ð Þ ¼ 2 π VDC sin ωt + 1 3 sin 3ωt + 1 7 sin 7ωt + 1 9 sin 9ωt + 1 11 sin 11ωt + 1 13 sin 13ωt + … 2 6 4 3 7 5 (15.77) From (15.77), it follows that the fundamental component of the output phase-to-neutral voltage has an rms value equal to V1 ¼ ffiffiffi 2 p π VDC ¼ 0:45VDC (15.78) From Fig. 15.28, mean square value is determined as Mean square value ¼ 1 π 2 5 VDC 2 3π 5 + 3 5 VDC 2 2π 5 # ¼ 6 25 V2 DC (15.79) Vrms ¼ ffiffiffi 6 p 5 VDC (15.80) Total harmonic rms voltage (per unit) is given by VHrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Vrms ð Þ2 V1 ð Þ2 q ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffiffiffi 6 p 5 2 ffiffiffi 2 p π 2 s ¼ 0:193281227 (15.81) Hence, total harmonic distortion is THD ¼ r:m:s: total harmonic voltage r:m:s: total voltage ¼ 0:193281227 ffiffiffi 6 p =5 ¼ 0:3945336525 or 39:45% (15.82) This is the same voltage as obtainable with a three-phase VSI operating in six-step mode. It is important to note at this stage that the space vectors described by (15.68) provides mapping of inverter voltages into a two-dimensional space. However, since five-phase inverter essentially requires description in a five-dimensional space, not all the harmonics contained in (15.77) will be encompassed by the space vector of (15.68). In particular, space vectors calculated using (15.68) will only rep- resent harmonics of the order 10k1, k ¼ 0,1,2,3…, that is, the first, the ninth, the eleventh, and so on. Harmonics of the order 5k, k ¼ 1,2,3… cannot appear due to the isolated neutral point. However, harmonics of the order 5k2, k ¼ 1,3,5… are pre- sent in (15.77) but are not encompassed by the space-vector def- inition of (15.68). These harmonics in essence appear in the second two-dimensional space, which requires introduction of the second space vector for the five-phase system. Simulation is performed to obtain the harmonic spectrum of inverter phase voltage in 10-step mode of operation, shown in Fig. 15.29. The DC voltage is kept at 1 p.u. The harmonic spec- trum is in compliance with the expression (15.77) and (15.78). The fundamental component is equal to 0.4504 pu, which is the same as what is obtainable with a three-phase VSI. The subharmonic components are third and seventh in Fig. 15.29, and their magnitudes are 33.33% and 14.3%, respectively. These 0.02 0.03 0.04 0.05 0.06 0.07 0.08 –1 –0.5 0 0.5 1 Inverter phase 'a' voltage (p.u.) Time (s) 0 100 200 300 400 500 600 700 800 900 1000 0 0.2 0.4 Inverter phase 'a' voltage spectrum RMS (p.u.) Frequency (Hz) FIG. 15.29 Inverter phase “a” voltage time-domain waveform and its harmonic spectrum in frequency domain (fundamental frequency is 50 Hz, fun- damental voltage 0.4504 (pu)). 480 A. Iqbal et al.
- 25. subharmonics will appear in the x-y plane and will cause distor- tion in the stator currents and consequently increase the losses in the machine. The lowest harmonic appearing on d-q plane are 9th and 11th with their magnitude as 11.1% and 9.1%, respectively. These harmonic will further add to the losses in addition to 10th-harmonic pulsating torque under steady-state conditions. The line-to-line voltages are expanded next. There are two systems of line-to-line voltage, adjacent and nonadjacent, in contrast to a three-phase system where only one line-to-line voltage is defined. The adjacent line-to-line voltages at the output of the five-phase inverter are defined in Fig. 15.30, for a fictitious load. Since each line-to-line voltage is a differ- ence of corresponding two leg voltages, the values of nonad- jacent line-to-line voltages will produce higher magnitude compared with the adjacent line voltages; hence, only former case is taken up in the thesis and later is omitted from further consideration. There are two sets of nonadjacent line-to-line voltages. Due to symmetry, these two sets lead to the same values of the line- to-line voltage space vectors, with a different phase order. Only the set vac,vbd,vce,vda,veb is analyzed for this reason. Table 15.3 lists the states and the values for these line-to-line voltages. Space vectors of nonadjacent line-to-line voltages are deter- mined once more using the defining expression (15.68) and are summarized as v1ll v2ll v3ll v4ll v5ll v6ll v7ll v8ll v9ll v10ll 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 ¼ 8 5 VDC cos π 5 cos π 10 ejπ=10 ej3π=10 ejπ=2 ej7π=10 ej9π=10 e11π=10 ej13π=10 ej15π=10 ej17π=10 ej19π=10 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 (15.83) Time-domain waveforms of nonadjacent line-to-line voltages are illustrated in Fig. 15.31. The Fourier analysis is further carried out for nonadjacent line-to-line voltage following the same procedure outlined in conjunction with Fourier analysis of phase voltages. The non- adjacent line voltages waveform possess quarter-wave odd symmetry; hence, the Fourier coefficient can be evaluated as B2n1 ¼ 4VDC 2n1 ð Þπ cos 2n1 ð Þ π 10 where n ¼ 1,2,3,… vea a vab b vbc c vcd d vde e va vc vd ve n vb FIG. 15.30 Adjacent line-to-line voltages of a five-phase star- connected load. vac vbd vce vda veb 0 p/5 p 2p/5 2p wt 3p/5 4p/5 6p/5 7p/5 8p/5 9p/5 VDC FIG. 15.31 Nonadjacent line-to-line voltages for 10-step operation of a five-phase VSI. TABLE 15.3 Nonadjacent line-to-line voltages for 180 degrees conduction mode Switching state Switches ON Space vector vac vbd vce vda veb 1 9,10,1,2,3 v1ll VDC VDC VDC VDC 0 2 10,1,2,3,4 v2ll VDC VDC 0 VDC VDC 3 1,2,3,4,5 v3ll 0 VDC VDC VDC VDC 4 2,3,4,5,6 v4ll VDC VDC VDC 0 VDC 5 3,4,5,6,7 v5ll VDC 0 VDC VDC VDC 6 4,5,6,7,8 v6ll VDC VDC VDC VDC 0 7 5,6,7,8,9 v7ll VDC VDC 0 VDC VDC 8 6,7,8,9,10 v8ll 0 VDC VDC VDC VDC 9 7,8,9,10,1 v9ll VDC VDC VDC 0 VDC 10 8,9,10,1,2 v10ll VDC 0 VDC VDC VDC 481 15 Multiphase Converters
- 26. And the Fourier series of nonadjacent line-to-line voltage can be written as vll t ð Þ ¼ 4 π VDC cos π 10 sin ωt ð Þ + 1 3 cos 3π 10 sin 3ωt ð Þ + 1 7 cos 7π 10 sin 7ωt ð Þ + … 2 6 6 4 3 7 7 5 (15.84) Thus, the peak of the fundamental is Vll ¼ 4 π VDC cos π 10 ¼ 1:211VDC (15.85) From Fig. 15.31, mean square value is determined as Mean square value ¼ 1 π VDC ð Þ2 4π 5 ¼ 4 5 V2 DC (15.86) Vrms ¼ 2 ffiffiffi 5 p VDC ¼ 0:894427191VDC (15.87) Total harmonic rms voltage (pu) is given by VHrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Vrms ð Þ2 V1 ð Þ2 q ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 2 ffiffiffi 5 p 2 2 ffiffiffi 2 p π cos π 10 2 s ¼ 0:2585208456 (15.88) Hence, total harmonic distortion is THD ¼ r:m:s: totalharmonic voltage r:m:s: total voltage ¼ 0:2585208456 2= ffiffiffi 5 p ¼ 0:2890350922 or 28:9% Or 28:9035% (15.89) 15.4.1.3 Pulse Width Modulation Mode of Operation If a five-phase voltage-source inverter is operated in PWM mode, apart from the already described 10 states, there are addi- tional 22 switching states. These remaining 22 switching states encompass three possible situations: all the states when four switches from upper (or lower) half and one from the lower (or upper) half of the inverter are on (states 11–20), two states when either all the five upper (or lower) switches are “on” (states 31 and 32), and the remaining states with three switches from the upper (lower) half and two switches from the lower (upper) half in conduction mode (states 21–30). The corresponding space vectors for 11–30 are obtained using Eq. (15.68), and it is seen that the total of 32 space vectors, available in the PWM operation, fall into four distinct categories regarding the magnitude of the available output phase voltages. The phase voltage space vectors are summarized in Table 15.4 for all 32 switching states and are shown in Fig. 15.32. Since adjacent line voltage yields lower output value, only nonadjacent line voltages are elaborated as well: v11ll ! v12ll ! v13ll ! v14ll ! v15ll ! v16ll ! v17ll ! v18ll ! v19ll ! v20ll ! 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 ¼ 2 5 VDC2 cos π 10 ejπ=10 ej3π=10 ej5π=10 ej7π=10 ej9π=10 ej11π=10 ej13π=10 ej15π=10 ej17π=10 ej19π=10 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 (15.90) v21ll ! v22ll ! v23ll ! v24ll ! v25ll ! v26ll ! v27ll ! v28ll ! v29ll ! v30ll ! 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 ¼ 2 5 VDC2 cos 3π 10 ejπ=10 ej3π=10 ej5π=10 ej7π=10 ej9π=10 ej11π=10 ej13π=10 ej15π=10 ej17π=10 ej19π=10 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 (15.91) TABLE 15.4 Phase-to-neutral voltage space vectors for states 1–32 Space vectors Value of the space vectors v1phase to v10phase 2=5VDC2 cos π=5 ð Þexp jkπ=5 ð Þ for k ¼ 0,1,2…9 v11phase to v20phase 2=5VDC exp jkπ=5 ð Þ for k ¼ 0,1,2…9 v21phase to v30phase 2=5VDC2 cos 2π=5 ð Þexp jkπ=5 ð Þ for k ¼ 0,1,2…9 v31phase to v32phase 0 d q v1 v2 v3 v4 v5 v6 v7 v8 v9 v10 v11 v20 v19 v18 v17 v16 v15 v14 v13 v12 v21 v24 v25 v26 v27 v28 v29 v30 v22 v23 5 p FIG. 15.32 Phase-to-neutral voltage space vectors for states 1–32 (states 31–32 are at origin) in d-q plane. 482 A. Iqbal et al.
- 27. 15.4.1.4 Model Transformation Using Decoupling Matrix Since the system under discussion is a five-phase one, the com- plete model can be only be elaborated in five-dimensional space. The first two-dimensional spaces are d-q, the second one is named as x-y, and the last is zero-sequence components that are absent due to the assumption of isolated neutral. On the basis of the general decoupling transformation matrix for an n-phase system, inverter voltage space vectors in the second two-dimensional subspace (x-y) are determined with Eq. (15.92): vINV xy ¼ 2 5 va + a2 vb + a4 vc + avd + a3 ve (15.92) Thus, 32 space vectors of phase-to-neutral voltage in the x-y plane are obtained using Eq. (15.92) and are demonstrated in Fig. 15.33. It can be seen from Figs. 15.32 and 15.33 that the outer deca- gon space vectors of the d q plane map into the innermost decagon of the x-y plane, the innermost decagon of d-q plane forms the outer decagon of x-y plane while the middle decagon space vector map into the same region. Further, it is observed from the above mapping that the phase sequence a,b,c,d,e of d q plane corresponds to a,c,e,b,d in x-y that are basically the third harmonic voltages. 15.4.1.5 Hardware Implementation of a Five-Phase VSI in 180 Conduction Mode Hardware can be developed to implement the square-wave operation of a five-phase voltage-source inverter. The hardware can be developed using available power switch modules from different manufacturers such as Semikron, Mitsubishi, and Fairchild. The power switches are available in discrete form to implement inverter system. The gate driver circuit is also available from different manufacturers. The control can be implemented using microcontroller, digital signal processors (DSP), dSpace, and field-programmable gate arrays (FPGA). The control codes can be written in C/C++. Some of the DSPs and FPGAs are compatible with Matlab/Simulink, and hence, control codes can be implemented directly. In FPGA, system generator is used for writing the control code. System generator is a library in Matlab/Simulink software. The coding is done in the form of drag and drop in system generator. 15.4.1.6 Hardware Set-up The control of inverter can be implemented using sophisticated controllers such as microcontroller, digital signal processors (DSP), dSpace, and field-programmable gate arrays (FPGA). The output voltages from these controllers are generally 3.3 V that is not enough for turning on the IGBTs/MOS- FETs/BJT. Further to turn off the power switching devices, the gate capacitors are to be fully and rapidly discharged. Gate drive circuit is thus required to match the voltage level require- ment of turning on the power switches (about 15 V), and a dis- charge path for the gate capacitor is needed. Hence, a gate drive circuit is needed to successfully turn on and turn off the power devices. The following section describes the implementation of the control, gate drive, and power circuit using analog devices. The complete block diagram is shown in Fig. 15.34. Power supply is obtained from a single-phase grid and is converted to 9-0-9 V using a transformer. The converted volt- age of (9-0-9 V) is fed to the phase-shifting circuit shown in Fig. 15.35, to provide appropriate phase shift for operation at various conduction angle (the conduction angle refers to the conduction modes of inverter, e.g., 180, 144, and 108 degrees). The phase-shifted signal is then fed to the inverting/noninvert- ing Schmitt trigger circuit and wave-shaping circuit (Figs. 15.36 and 15.37). The processed signal is then fed to the isolation and driver circuit shown in Fig. 15.38. This is then finally given to the gate of IGBTs. There are two separate circuits for upper and lower legs of the inverter. The power circuit is made up of IGBT SGW20N60 having a rating of 20 A and 600 V DC, with snubber circuit consisting of the series combination of a resistance and a capacitor with a diode in parallel with the resistance. 15.4.1.7 Hardware Results Experiment can be conducted for stepped operation of inverter with 180 degrees conduction modes for star-connected five- phase resistive load. A single-phase supply can be given to the control circuit through the phase-shifting network. The output of the phase-shifting circuit provides the required five-phase output voltage by appropriately tuning it. These five-phase signals are then further processed to generate the gate drive circuit. v7 5 p x y v1 v2 v3 v4 v5 v6 v7 v8 v9 v10 v11 v20 v19 v18 v17 v16 v15 v14 v13 v12 v21 v22 v23 v24 v25 v26 v27 v28 v29 v30 FIG. 15.33 Phase-to-neutral voltage space vectors for states 1–32 (states 31–32 are at origin) in x-y plane. 483 15 Multiphase Converters
- 28. 15.4.1.8 Results of 180 Degrees Conduction Mode The output from the Schmitt trigger circuit is presented in Fig. 15.39. The driving control gate/base signals for the 10-step mode for legs A–B of the inverter are illustrated in Fig. 15.40. The corresponding phase voltage thus obtained is shown in Fig. 15.41, keeping the DC-link voltage at 60 V. The output phase voltage is called 10 step in one funda- mental cycle (1/5Vdc, 2/5Vdc, 1/5Vdc, 2/5Vdc, 1/5Vdc, 1/5Vdc, 2/5Vdc, 1/5Vdc, 2/5Vdc, and 1/5Vdc). Nonadjacent line voltage obtained is shown in Fig. 15.42. All currents are measured using AC/DC current probe giving the output of 100 mV/A. The AC side input current is also measured and is depicted in Fig. 15.43. The analysis is presented in the last subsection. 15.4.1.9 DSP Implementation of Step Mode of Operation The results obtained in Section 15.4.1.9 are verified using implementation through TMS320F2812 DSP under the same operating conditions. Control code is written in C++ and run in PC. It is transferred to the DSP using serial communi- cation cable RS232. The DSP generate 10 gating signals that are fed to the power module of the inverter. The detail exper- imental setup is provided in Section 15.4.1.10. All the three conduction angles are implemented. The developed algorithm 230V 50Hz a b n n–1 To Schmitt trigger circuit C1 C2 Cn–1 Cn R1 R2 Rn–1 Rn 9-0-9V FIG. 15.35 Phase-shifting circuit (PSC). Phase shifting circuit 230V 50Hz 9-0-9V Leg-voltages Non inv. Sh. tr. and wave shaping ckt-1 To gates of P-bank IGBTs Isolation and driver circuit P-nth Non inv. Sh. tr. and wave shaping ckt-n Inverting Sh. tr. and wave shaping ckt-1 Isolation and driver circuit P-1st Inverting Sh. tr. and wave shaping ckt-n Isolation and driver circuit N-1st Isolation and driver circuit P-nth To gates of N-bank IGBTs FIG. 15.34 Block diagram of the control circuit. + 7 6 4 3 2 +Vcc –Vcc +Vcc a-input from P .S.C. +Vcc 741 OA79 BC547 Noninverting Schmitt trigger and wave shaping circuit To ‘P’ isolation and driver circuit For Adj. of dead time 1k 10k 1k 1k 1k FIG. 15.36 Noninverting Schmitt trigger and wave-shaping circuit. 484 A. Iqbal et al.
- 29. + 7 6 4 3 2 +Vcc –Vcc –Vcc a-input from P .S.C. +Vcc 741 OA79 Inverting Schmitt trigger and wave shaping circuit To ‘N’ isolation and driver circuit For adj. of dead time BC547 1k 1k 1k 1k 10k FIG. 15.37 Inverting Schmitt trigger and wave-shaping circuit. Q1 To gate of ‘P’ bank of Mosfet 1 2 4 5 1 2 4 5 To source of ‘P’ bank of Mosfet To gate of ‘N’ bank of Mosfet To source of ‘N’ Mosfet From ‘P’ waveshaping circuit From ‘N’ waveshaping circuit 1 2 2 1 5 5 4 4 Q4 Q3 Q2 +Vcc-B +Vcc-A OC1 OC3 OC2 OC4 R3 R4 R2 R2 R1 R1 R3 R4 FIG. 15.38 Gate driver circuit. FIG. 15.39 Output of wave-shaping circuit for 180 degrees conduction mode for leg A–B. FIG. 15.40 Gate drive signals for legs A–B for 180 degrees conduction mode. 485 15 Multiphase Converters
- 30. is verified using a star-connected resistive load and a five-phase induction machine. 15.4.1.10 180 Degrees Conduction Mode The inverter is operated in 180 degrees conduction mode, and a five-phase star-connected resistive load is connected across the output terminal. The resulting phase voltage, nonadjacent line voltages are illustrated in Figs. 15.44 and 15.45, respectively. It is observed that the phase voltage generated using cheap analog-circuit-based inverter shown in Fig. 15.41 is identical to the one obtained using DSP as shown in Fig. 15.44. Similarly, the nonadjacent line voltage of Fig. 15.42 is identical to the one shown in Fig. 15.45. This verifies the correct design of the analog-based inverter and also verifies the DSP code. The same study is carried out using a five-phase induction motor as a load. The resulting voltage and stator current waveforms are presented in Fig. 15.46. The waveform is typical for such load. 15.4.2 Carrier-Based PWM 15.4.2.1 With Zero Sequence Signal Carrier-based sinusoidal PWM is the most popular and widely used PWM technique because of their simple implementation in both analog and digital realization [32,34]. The principle of carrier-based PWM true for a three-phase VSI is also applicable to a multiphase VSI. The PWM signal is generated by comparing a sinusoidal modulating signal with a triangular (double edge) or a saw-tooth (single edge) carrier signal. The frequency of the carrier is normally kept much higher compared to the FIG. 15.41 Output phase “a–d” voltages for 180 degrees conduction mode. FIG. 15.42 Nonadjacent line voltage for 180 degrees conduction mode with DC-link voltage equal to 180 V. FIG. 15.43 AC side input current for 180 degrees conduction mode. FIG. 15.44 Output phase voltage for 180 degrees conduction mode. 486 A. Iqbal et al.
- 31. modulating signal. The principle of operation of a carrier-based PWM modulator is shown in Fig. 15.47, and generation of PWM waveform is illustrated in Fig. 15.48. Modulation signals are obtained using five fundamental sinusoidal signals (displaced in time by α ¼ 2π=5), which are summed with an appropriate zero-sequence signal. These modulation signals are compared with high-frequency carrier signal (saw-tooth or triangular shape), and all five switching functions for inverter legs are obtained directly. In general, modulation signal can be expressed as vi t ð Þ ¼ v∗ i t ð Þ + vnN t ð Þ (15.93) where i ¼ a,b,c,d,e and vnN represents zero-sequence signal and vi* is fundamental sinusoidal signals. Zero-sequence signal represents a degree of freedom that exits in the structure of a carrier-based modulator, and it is used to modify modulation signal waveforms and thus to obtain different modulation schemes. Continuous PWM schemes are characterized by the presence of switching activity in each of the inverter legs over the carrier signal period, as long as peak value of the modula- tion signal does not exceed the carrier magnitude. The following relationship holds true in Fig. 15.48: t + n t n ¼ vnts (15.94) where t + n ¼ 1 2 + vn ts (15.95) 0 –0.5Vdc t = nts t = (n + 1)ts PWM wave Modulating signal Carrier ts vn 0.5V DC 0.5V DC 0.5t– n 0.5t– n t+ n FIG. 15.48 PWM waveform generation in carrier-based sinusoidal method. FIG. 15.46 Nonadjacent line voltage and stator current. Carrier signal m* a m* b m* c m* d m* e Calculation of Zero sequence signal ma mb mc md me S1 S6 S3 S8 S5 S10 S7 S2 S9 S4 FIG. 15.47 Principle of carrier-based PWM technique. FIG. 15.45 Nonadjacent line voltage for 180 degrees conduction mode. 487 15 Multiphase Converters
- 32. t n ¼ 1 2 vn ts (15.96) where t + n and t n are the positive and negative pulse widths in the nth sampling interval, respectively, and vn is the normalized amplitude of modulation signal. The normalization is done with respect to Vdc. Eqs. (15.95) and (15.96) are referred as the equal volt-second principle as applied to a three-phase inverter [32,35,36]. The normalized peak value of the triangular carrier wave is 0:5 in linear region of operation. Modulator gain has the unity value while operating in the linear region, and peak value of inverter output fundamental voltage is equal to the peak value of the fundamental sinusoidal signal. Thus, the maximum output phase voltages from a five-phase VSI are limited to 0.5 p.u. This is also evident in [32,37]. Thus, the output phase voltage from a three-phase and a five-phase VSI are the same when utilizing carrier-based PWM. 15.4.2.2 Sinusoidal Pulse Width Modulation (SPWM) The simplest continuous carrier-based PWM is obtained with the selection of the zero-sequence signal as vvN t ð Þ ¼ 0. Modu- lation signals for all five inverter legs are equal to five sinusoidal fundamental signals. Thus, while operating in the linear region, maximum value of the modulation index of the SPWM has the unity value, MSPWM ¼ 1. Modulation index is defined as the ratio of the fundamental component amplitude of the line- to-neutral inverter output voltage to one-half of the available DC bus voltage. Thus, M ¼ V1 0:5Vdc (15.97) where V1 is the fundamental output phase voltage. 15.4.2.3 Fifth Harmonic Injection PWM The effect of the addition of harmonic with reverse polarity in any signal is to reduce the peak of the reference signal. Aim here is to bring the amplitude of the reference as low as possible, so that the reference can then be pushed to make it equal to the car- rier, resulting in the higher output voltage and better DC bus uti- lization. Using this principle, third harmonic injection PWM scheme is used in a three-phase VSI that results in increase in the fundamental output voltage to 0.575Vdc [32,35]. Third har- monic voltages do not appear in the output phase voltages and are restricted to the leg voltages only. Following the same prin- ciple, fifth harmonic injection PWM scheme can be developed to increase the modulation index of a five-phase VSI. The reference leg voltages are given as V∗ ao ¼ 0:5M1Vdc cos ωt ð Þ + 0:5M5Vdc cos 5ωt ð Þ V∗ bo ¼ 0:5M1Vdc cos ωt 2π=5 ð Þ + 0:5M5Vdc cos 5ωt ð Þ V∗ co ¼ 0:5M1Vdc cos ωt 4π=5 ð Þ + 0:5M5Vdc cos 5ωt ð Þ V∗ do ¼ 0:5M1Vdc cos ωt + 4π=5 ð Þ + 0:5M5Vdc cos 5ωt ð Þ V∗ eo ¼ 0:5M1Vdc cos ωt + 2π=5 ð Þ + 0:5M5Vdc cos 5ωt ð Þ (15.98) It is to be noted that fifth harmonic has no effect on the value of the reference waveform when ωt ¼ 2k + 1 ð Þπ=10, since cos 5 2k + 1 ð Þπ=10 ð Þ ¼ 0 for all odd k. Thus, M5 is chosen to make the peak magnitude of the reference of (15.98) that occurs where the fifth harmonic is zero. This ensures the maximum possible value of the fundamental component. The reference voltage reaches a maximum when dV∗ ao dt ¼ 0:5M1Vdc sin ωt 0:5 5M5Vdc sin 5ωt ¼ 0 (15.99) This yield M5 ¼ M1 sin π=10 ð Þ 5 for ωt ¼ π=10 (15.100) Thus, the maximum modulation index can be determined from V∗ ao ¼ 0:5M1Vdc cos ωt ð Þ0:5 sin π=10 ð Þ 5 M1Vdc cos 3ωt ð Þ ¼ 0:5Vdc (15.101) The above equation gives M1 ¼ 1 cos π=10 ð Þ for ωt ¼ π=10 (15.102) Thus, the output fundamental voltage is increased by 5.15% higher than the value obtainable using simple carrier-based PWM by injecting 6.18% fifth harmonic in fundamental. The fifth harmonic is in opposite phase to that of the fundamental. 15.4.2.4 Offset or Triangular Zero-Sequence Injection PWM Another way of increasing the modulation index is to add an offset voltage to the references. This will effectively do the same function as above. The offset voltage is given as Voffest ¼ Vmax + Vmin 2 (15.103) where vmax ¼ max va, vb, vc, vd, ve ð Þ and vmin ¼ min va, vb, vc; ð vd, veÞ. Note that this is the same as for a three-phase inverter. In case of three-phase VSI, the offset voltage is simply third harmonic triangular wave of 25% magnitude of fundamental. The peak of the fundamental is 0.575 p.u., (0.406 p.u. rms), the peak of the resultant modulating signal is 0.5 p.u. (0.353 p.u. rms), and the peak of the offset is 0.147 p.u. (0.104 p.u. rms). Hence, offset peak is 25% of the fundamental peak. In a five-phase VSI, the offset is found as the fifth-harmonic triangular wave of 9.55% of the fundamental input reference. This value has been established by simulations. Offset addition requires only addition operation and hence is suitable for prac- tical implementation. 488 A. Iqbal et al.
- 33. A generalized formula of offset voltage is obtained, which is to be injected along with the fundamental in case of five-phase VSI. The expression is Vno ¼ 0:5528 Vmax Vmin ð Þ + 3=5 12μ ð ÞVDC=23=5 12μ ð Þ Vmax Vmin ð Þ where Vmax is the maximum of the five-phase references, Vmin is the minimum of the five-phase references, and μ is the factor that decides the placement of the two zero-vector states. If it is 0.5, then the two zero states are placed equally, and this corre- sponds to symmetrical zero-vector placement. It is important to note that not only the fifth harmonic but also all the additional 5k (k¼1,3,5…) harmonics are included in the modulation signal in this technique. Maximum modula- tion index has the same value as in the previous case, MTIPWM ¼ 1:0515. To illustrate the effects of fifth-harmonic and triangular signal injection, the overall modulating signals are shown in Fig. 15.49. In general, an extension of the linear region is obtained through the repositioning of the peak value of the modulating signal. While sinusoidal fundamental signals have peak values at lπ 2 , zero sequence modifies this, and now, peak values of the modulating signals occur at lπ 2 π 2n, l ¼ 1,3,5,… Hence, for five-phase carrier-based continuous PWM methods with zero- sequence signal addition, new peak values of modulating signals appear at angles lπ 2 π 10. This allows the peak value of the funda- mental signal to exceed unity, up to the value when peak of the modulating signal reaches saturation level (0:5Vdc, in accor- dance with (15.97)). It is obvious from Fig. 15.49 that fifth- harmonic injection and offset injection have the same maximum value of the modulation index in the limit of the linear region. 15.4.2.5 Space Vector Pulse Width Modulation Space-vector pulse-width modulation has become one of the most popular PWM techniques because of its easier digital implementation and higher DC bus utilization, when compared with the sinusoidal PWM method. The principle of SVPWM lies in the switching of inverter in a special way to apply a set of space vector for specific time. There is a lot of flexibility avail- able in choosing the proper space-vector combination for an effective control of multiphase VSIs because of the large num- bers of space vectors available in multiphase power converters. Advantages of space vector PWM: i. SVPWM increases fundamental output without dis- torting line-to-line waveform. ii. The fundamental output of SVPWM is 94.02% that is 15.47% greater than sinusoidal PWM of 78.55% fundamental. iii. SVPWM compares a single modulating wave with a carrier instead of using three waves. iv. When the neutral of the load is connected to a DC sup- ply voltage, SVPWM considers interaction among phases, whereas other PWM method does not. v. Designing of heat sinks is an important factor for power dissipation. Power dissipation includes conduction and switching loss. Switching losses in sine PWM is difficult to compute that depend on modulation index, while computation is easier in space-vector PWM. vi. SVPWM implementation is completely digital. vii. Vector control implementation is completely digital, and thus, it is easy to implement SVPWM-based vector control scheme. viii. Over modulation can easily be implemented. ix. For high modulation index, the harmonics of current and torque of space-vector PWM will be much less than sine PWM. Inthe caseofafive-phaseVSI,thereareatotalof25 ¼32space vectors available, of which 30 are active state vectors and two are zero state vectors forming three concentric decagons. For the implementation of space-vector PWM in linear range, two different approaches can be adopted. One approach is the (B) (A) Inverter phase 'a' signals (p.u.) Zero-sequence signal Modulating signal Fundamental 0 0.004 0.008 0.012 0.016 0.02 –0.8 –0.4 0 0.4 0.8 Time (s) 0 0.004 0.008 0.012 0.016 0.02 –0.8 –0.4 0 0.4 0.8 Time (s) Inverter phase 'a' signals (p.u.) Zero-sequence signal Fundamental Modulating signal FIG. 15.49 Characteristics signals of carrier-based PWM (A) with fifth- harmonic injection and (B) with triangular harmonic injection. 489 15 Multiphase Converters
- 34. simple extension of method used in a three-phase inverter (use oftwoadjacentlargelengthvectors)andsecond approachwhere four adjacent vectors are used (two large and two medium lengths). The first approach gives higher output voltage; how- ever, the output voltages contain lower-order harmonics, more specifically, the third and seventh. The second approach offers sinusoidal output voltage; however, the magnitude is lower. The first approach used only 10 outer large length vectors to implement the symmetrical SVPWM. Two neighboring active space vectors and two zero space vectors are utilized in one switching period to synthesize the input reference voltage. In total, 20 switchings take place in one switching period, so that the state of each switch is changed twice. The switching is done in such a way that, in the first switching half period, the first zero vector is applied, followed by two active state vectors and then by the second zero state vector. The second switching half period is the mirror image of the first one. The symmetrical SVPWM is achieved in this way. This method is the simplest extension of space-vector modulation of three-phase VSIs. An ideal SVPWM of a five-phase inverter should satisfy a number of requirements. Firstly, in order to keep the switching frequency constant, each switch can change state only twice in the switching period (once “on” to “off” and once “off” to “on” or vice versa). Secondly, the rms value of the fundamental phase voltage of the output must be equal to the rms of the reference space vector. Thirdly, the scheme must provide full utilization of the available DC bus voltage. Finally, since the inverter is aimed at supplying the load with sinusoidal voltages, the low-order harmonic content needs to be minimized (this especially applies to the third and seventh harmonic). These criteria are used in assessing the merits and demerits of various SVPWM. 15.4.2.6 Space Vector PWM for Sinusoidal Output The purpose here is to generate sinusoidal output phase voltages using space-vector PWM. Application of two neighboring medium active space vectors together with two large active space vectors in each switching period makes it possible to maintain zero average value in the second plane and consequently provid- ing sinusoidal output. Use of four active space vectors per switching period requires the calculation of four application times, labeled here tal,tbl,tam,tbm. The expressions used for the calculation of dwell times of various space vector are [32,38] tal ¼ v∗ s Vm sin π=5 ð Þ τ 1 + τ2 ts sin π 5 kα tbl ¼ v∗ s Vm sin π=5 ð Þ τ 1 + τ2 ts sin α k1 ð Þ π 5 tam ¼ v∗ s Vm sin π=5 ð Þ 1 1 + τ2 ts sin π 5 kα tbm ¼ v∗ s Vm sin π=5 ð Þ 1 1 + τ2 ts sin α k1 ð Þ π 5 t0 ¼ ts tal tbl tam tbm (15.104) where ta ¼ tal + tam; tb ¼ tbl + tbm. This is in essence allocates 61.8% more dwell times to large space vectors compared with medium space vector, thus satisfying the constraints of produc- ing zero average voltage in the x-y plane. This can be more clearly seen from Fig. 15.50. It is seen from Fig. 15.50 that the vectors in x-y plane are in such a position to cancel each other by using the dwell time Eq. (15.104). The applications of active and zero space vectors are arranged in such a way as to obtain a symmetrical SVPWM. The space-vector disposition in sector I is illustrated in Fig. 15.51. Modulation signals of SVPWM are identical to those obtained with offset addition. Switching pattern is a symmetrical PWMwith twocommutationsperinverterleg. Thespacevectors are applied in odd sectors using sequence v31, val, vbm, vam; ½ vbl, v32, vbl, vam, vbm, val, v31, while the sequence is v31, vbl; ½ vam, vbm, val, v32, val, vbm, vam, vbl, v31 in even sectors. It can be easily observed from Eq. (15.104) that the zero-vector application time remains positive for 0 v∗ s 0:5257Vdc. Thus, the output phase voltage from a VSI using this Space Vector PWM scheme is 0.5257Vdc, which is 5.15% higher com- pared with the output obtainable with carrier-based sinusoidal PWM without harmonic injection and equal to the output obtainable with zero-sequence (fifth-harmonic) signal injection. p/5 v* s ta va ts tb vb ts d q v2 v 2 v1 v11 v12 v12 (A) (B) 2p/5 v11 v1 y x FIG. 15.50 Principle of the calculation of vector application times, (A) d-q plane and (B) x-y plane. 490 A. Iqbal et al.
- 35. Simulation is carried out using Matlab/Simulink to imple- ment the SVPWM with application of four active and a zero vector. The resulting waveform and harmonic spectrum are shown in Fig. 15.52. The average leg voltage is depicted in Fig. 15.51, and it is observed that the leg voltage is now quite similar to one obtained in three-phase VSI. The phase voltage is completely sinusoidal without any low-order harmonics. The spectrum of phase voltage shows the maximum achievable output equals to 0.5257 p.u. (keeping DC-link voltage equals to unity). 15.4.2.7 Experimental Implementation Experimental setup is prepared in the laboratory to implement the carrier-based and space-vector PWM techniques discussed in the previous section. A five-phase voltage-source inverter is developed using intelligent power module. Texas Instrument DSP TMS320F2812 is used as the processor to implement the control algorithm. Since this DSP can be coded in C or C ++, it is more user-friendly, and they have dedicated 16 hard- ware PINS to generate the desired PWM signals. The PWM cir- cuits associated with compare units make it possible to generate up to eight PWM output channels (per Event Manger) with programmable dead band and polarity. This DSP is specifically meant for use in motor drive purposes, and it can control up to eight-phase two-level inverter. The control code is written in C ++ language in Code composer studio 3.1 that runs in a PC. The control signal generated by PC is transferred to the DSP board through RS 232 cable connected in parallel printer port of the PC. The DSP board is connected to the power module through dedicated control cable. The DSP interfacing circuit along with required A/D and D/A converter is built on the DSP board itself procured from VI Microsystems. Five-phase carrier-based PWM is implemented keeping the switching frequency equal to 10 kHz. The resulting waveform of leg voltage and corresponding phase voltage along with phase ‘a’, ‘b’, and ‘c’ are shown in Figs. 15.53 and 15.54, respectively. Fifth-harmonic injection scheme is also implemented using DSP coding with fifth-harmonic signal equal to 0.0618 p.u. The resulting waveform of leg and corresponding phase voltage (unfiltered) are shown in Figs. 15.55 and 15.56, respectively. Triangular zero sequence injection PWM (TIPWM) is also implemented. The resulting waveform of phase voltage along with phase ‘a’, ‘b’, and ‘c’ currents and triangular zero-sequence injection are shown in Figs. 15.57 and 15.58, respectively. 15.4.3 Modeling and Control of a Seven-Phase VSI-Square Wave Mode This section details the modeling and control of a seven-phase VSI. The modeling of seven-phase VSI is done for 14-step oper- ation using space-vector approach [39]. The PWM operation V11 V1 V32 V1 V11 V31 V31 V2 V12 V12 V2 2 tam 4 to 2 tbl 2 tal 2 tbm 2 to 2 tbm 2 tal 2 tbl 2 tam 4 to Sector I FIG. 15.51 Switching pattern in sector I using large and medium space vectors. 0 0.01 0.02 0.03 0.04 0.05 0.06 –1 –0.5 0 0.5 1 Phase 'a' voltage (p.u.) Time (s) 0 50 100 150 200 250 300 350 400 450 500 0 0.2 0.4 Phase 'a' voltage spectrum (p.u.) Frequency (Hz) FIG. 15.52 Spectrum of phase “a” voltage for sinusoidal output of SVPWM. 491 15 Multiphase Converters
- 36. mode is elaborated in Section 15.4.4 [40,41]. Conventional 180 degrees conduction mode is considered. The procedure adopted here follows from Section 15.4.1. The analytic expres- sions for harmonic components and THD are derived for phase voltages and second nonadjacent line voltages. The same is then verified using simulation and experimental results. Section 15.4.3.2 deals with the modeling and control of a seven-phase voltage-source inverter in pulse-width modulation mode. There are a total of 128 switching state where the first 14 states lead to 14-step mode of operation and the rest of 114 switching states fall in PWM mode. Out of total 128 space vectors, two space vectors corresponding to the switching states FIG. 15.54 Unfiltered phase “a” voltage along with phase ‘a’, ‘b’, and ‘c’ currents using carrier-based PWM. FIG. 15.53 Unfiltered leg “A” voltage along with phase ‘a’, ‘b’, and ‘c’ currents using carrier-based PWM. 492 A. Iqbal et al.
- 37. 0000000 and 1111111 yield null vectors, and the rest 126 that produce finite length vectors are called active vectors. The model obtained is transformed into three different planes, namely, d-q, x1-y1, and x2-y2. Out of these three planes, only d-q produces torque in the machines supplied by the inverter, while the space vectors of other planes produce distortion in the stator currents. The complete model using space-vector approach is elaborated. The simulation results are included to validate the modeling procedure. 15.4.3.1 Fourteen-Step Operation of a Seven-Phase Voltage Source Inverter Power circuit topology of a seven-phase VSI is shown in Fig. 15.59. Each switch in the circuit consists of two power FIG. 15.55 (A) Unfiltered leg “A” voltage along with phase ‘a’, ‘b’, and ‘c’ currents using carrier-based PWM with fifth-harmonic injection. (B) Fifth harmonic signal injected in the carrier. 493 15 Multiphase Converters
- 38. semiconductor devices, connected in antiparallel. One of these is a fully controllable semiconductor, such as a bipolar transis- tor or IGBT, while the second one is a diode. The input of the inverter is a DC voltage, which is regarded further on as being constant. The inverter outputs are denoted in Fig. 15.59 with lowercase symbols (a,b,c,d,e,f,g), while the points of connection of the outputs to inverter legs have symbols in capital letters (A,B,C,D,E,F,G). The basic operating principles of the seven- FIG. 15.56 Unfiltered phase “a” voltage along with phase ‘a’, ‘b’, and ‘c’ currents using fifth-harmonic signal injected in the carrier. FIG. 15.57 Phase voltage along with phase ‘a’, ‘b’, and ‘c’ currents using triangular zero sequence injection PWM (TIPWM). 494 A. Iqbal et al.
- 39. phase VSI are developed in what follows assuming the ideal commutation and zero forward voltage drops. Each switch is assumed to conduct for 180 degrees, leading to the operation in the 14-step mode. Phase delay between firing of two switches in any subsequent two phases is equal to 360/7 degrees¼51.43 degrees (approx.). The driving control gate/base signals for the 14 switches of the inverter in Fig. 15.59 are illustrated in Fig. 15.60. One com- plete cycle of operation of the inverter can be divided into 14 distinct modes indicated in Fig. 15.60 and summarized in Table 15.5. It follows from Fig. 15.60 and Table 15.5 that at any instant of time there are seven switches that are “on” and seven switches that are “off.” In the 14-step mode of operation, there are three conducting switches from the upper 7 and 4 from the lower 7 or vice versa. Leg voltages (i.e., voltages between points A,B,C,D,E,F,G and the negative rail of the DC bus N in Fig. 15.59) are considered first. The leg voltages obtained from the gate drive signal of Fig. 15.60. Space-vector model of the inverter is developed in the fol- lowing subsection. Space vector of phase voltages in stationary reference frame is defined, using power invariant transforma- tion, as FIG. 15.58 Triangular fifth harmonic zero sequence injected signal. A B C D E F G b c d e f g a S1 S2 S3 S5 S7 S9 S11 S13 S6 S4 S14 S12 S10 S8 VDC N P FIG. 15.59 Seven-phase voltage-source inverter power circuit. 12 13 14 4 3 1 2 5 6 7 8 9 10 11 S13 S14 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 States 7 7 2p p p 7 3p 7 4p 7 5p 7 6p 7 8p 7 9p 7 10p 7 11p 7 12p 7 13p 2p 0 FIG. 15.60 Driving switch signals for the 14-step mode. 495 15 Multiphase Converters
- 40. v ¼ 2 7 va + avb + a2 vc + a3 vd + a3 ve + a2 vf + a vg (15.105) where a¼exp(j2π/7), a2 ¼exp(j4π/7), a3 ¼ exp j6π=7 ð Þ, a*¼exp(j2π/5), a2 ¼ exp j4π=5 ð Þ, a3 ¼ exp j6π=7 ð Þ, and * stands for a complex conjugate. Space vectors of leg voltages are obtained using Fig. 15.60 and Eq. (15.105) and are given as in Eq. (15.106). v ! 1 v ! 2 v ! 14 2 6 6 6 6 6 4 3 7 7 7 7 7 5 ¼ 2 7 VDC 2 cos 3π=7 ð Þ ej0 ejπ=7 ej13π=7 2 6 6 6 6 6 4 3 7 7 7 7 7 5 (15.106) It is seen that the leg voltages have magnitude of (2/7)VDC(2 cos (π/7)) and are 25.7142857 degrees spatially apart. Phase-to-neutral voltages of the star-connected load are most easily found by defining a voltage difference between the star point n of the load and the negative rail of the DC bus N. The following correlation then holds true: vA ¼ va + vnN vB ¼ vb + vnN vC ¼ vc + vnN vD ¼ vd + vnN vE ¼ ve + vnN vF ¼ vf + vnN vG ¼ vg + vnN (15.107) Since the phase voltages in a star-connected load sum to zero, the summation of Eq. (15.107) yields vnN ¼ 6=7 ð Þ vA + vB + vC + vD + vE + vF + vG ð Þ (15.108) Substitution of (15.107) into (15.108) yields phase-to-neutral voltages of the load in the following form: Va ¼ 6=7 ð ÞVA 1=7 ð Þ VB + VC + VD + VE + VF + VG ð Þ Vb ¼ 6=7 ð ÞVB 1=7 ð Þ VA + VC + VD + VE + VF + VG ð Þ Vc ¼ 6=7 ð ÞVC 1=7 ð Þ VA + VB + VD + VE + VF + VG ð Þ Vd ¼ 6=7 ð ÞVD 1=7 ð Þ VA + VB + VC + VE + VF + VG ð Þ Ve ¼ 6=7 ð ÞVE 1=7 ð Þ VA + VB + VC + VD + VF + VG ð Þ Vf ¼ 6=7 ð ÞVF 1=7 ð Þ VA + VB + VC + VD + VE + VG ð Þ Vg ¼ 6=7 ð ÞVG 1=7 ð Þ VA + VB + VC + VD + VE + VF ð Þ (15.109) The phase voltages in different modes are obtained by substituting leg voltages into Eq. (15.109), and their space vec- tors are determined using Eq. (15.105). The waveform of phase voltages for seven phases is shown in Fig. 15.61. The space vec- tors for the first 14 states are obtained as v ! 1phase v ! 14phase 2 6 6 6 6 6 4 3 7 7 7 7 7 5 ¼ 2 7 VDC 2 cos 3π=7 ð Þ ej0 ej13π=7 2 6 6 6 6 6 4 3 7 7 7 7 7 5 (15.110) The Fourier analysis can be carried out, recognizing the quarter-wave symmetry; the waveform may be considered as odd function. The Fourier coefficients are obtained as TABLE 15.5 Fourteen-step operation of a seven-phase VSI States Switches ON Terminal polarity 12 1,9,10,11,12,13,14 A+ B C D E+ F+ G+ 13 10,11,12,13,14,12 A+ B C D E F+ G+ 14 11,12,13,14,1,2,3 A+ B+ C D E F+ G+ 1 12,13,14,1,2,3,4 A+ B+ C D E F G+ 2 13,14,1,2,3,4,5 A+ B+ C+ D E F G+ 3 14,1,2,3,4,5,6 A+ B+ C+ D E F G 4 1,2,3,4,5,6,7 A+ B+ C+ D+ E F G 5 2,3,4,5,6,7,8 A B+ C+ D+ E F G 6 3,4,5,6,7,8,9 A B+ C+ D+ E+ F G 7 4,5,6,7,8,9,10 A B C+ D+ E+ F G 8 5,6,7,8,9,10,11 A B C+ D+ E+ F+ G 9 6,7,8,9,10,11,12 A B C D+ E+ F+ G 10 7,8,9,10,11,12,13 A B C D+ E+ F+ G+ 11 8,9,10,11,12,13,14 A B C D E+ F+ G+ Va Vb Vc Vd Ve Vf Vg –4VDC/7 –3VDC/7 3VDC/7 4VDC/7 7 7 2p p p 7 3p 7 4p 7 5p 7 6p 7 8p 7 9p 7 10p 7 11p 7 12p 7 13p 2p 0 FIG. 15.61 Phase-to-neutral voltages of the seven-phase VSI in the 14-step mode of operation. 496 A. Iqbal et al.
- 41. B2n1 ¼ X ∞ n¼1 4 7π VDC 2n1 3 + cos 2n1 ð Þ π 7 + cos 2n1 ð Þ 3π 7 cos 2n1 ð Þ 2π 7 (15.111) The expression in third bracket of Eq. (15.111) equals to zero for all the harmonics whose order is divisible by seven. Hence, one can write the phase-to-neutral voltages as V t ð Þ ¼ 2VDC π sin ωt + 1 3 sin 3ωt ð Þ + 1 5 sin 5ωt ð Þ + 1 9 sin 9ωt ð Þ + 1 11 sin 11ωt ð Þ + 1 13 sin 13ωt ð Þ + … 0 B @ 1 C A (15.112) From (15.112), it follows that the fundamental component of the output phase-to-neutral voltages has an rms value equal to Va ¼ ffiffiffi 2 p π VDC ¼ 0:45VDC (15.113) From Fig. 15.61, the mean square value is determined as Mean square value ¼ 1 π V2 DC 3 7 2 + 4 7 2 + 3 7 2 + 4 7 2 + 3 7 2 + 4 7 2 + 3 7 2 # π 7 ¼ 12 49 V2 DC (15.114) Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Mean square value p ¼ 2 ffiffiffi 3 p 7 VDC (15.115) Total harmonic rms voltage (p.u.) is given by VHrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Vrms ð Þ2 V1 ð Þ2 q ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 2 ffiffiffi 3 p 7 2 ffiffiffi 2 p π 2 s ¼ 0:2055616499 (15.116) Hence, total harmonic distortion is THD ¼ r:m:s: total harmonic voltage r:m:s: total voltage ¼ 0:2055616499 2 ffiffiffi 3 p =7 ¼ 0:4153837586 or 41:54% (15.117) There are three systems of line-to-line voltage: adjacent, first nonadjacent and second nonadjacent, in contrast to a three- phase system where only one line-to-line voltage is defined and five-phase system where two systems of line voltages exist. The second nonadjacent line voltages yield highest magnitude, and hence, it is taken up for discussion, and the other two types are omitted. The values of line voltages are obtained as the difference between the leg voltages and are plot- ted in Fig. 15.62. The second nonadjacent line-line voltage space vectors are calculated by substituting the values from Table 15.6 into the defining expression (15.105) and are v ! 1lll v ! 14lll 2 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 5 ¼ 2 7 8VDC cos 2π 7 :cos π 7 :cos π 14 ejπ=14 ej3π=14 ej27π=14 2 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 5 (15.118) Fourier analysis can be done, and the resulting coefficients of the Fourier series for second nonadjacent line-to-line voltages, by considering odd quarter-wave symmetry, are B2n1 ¼ 4VDc π 2n1 ð Þ cos 2n1 ð Þ π 14 h i (15.119) Vad Vbe Vcf Vdg Vea Vfb Vgc VDC –VDC 7 7 2p p p 7 3p 7 4p 7 5p 7 6p 7 8p 7 9p 7 10p 7 11p 7 12p 7 13p 2p 0 FIG. 15.62 The second nonadjacent line-to-line voltages of seven-phase VSI for various modes. 497 15 Multiphase Converters
- 42. The series will be V t ð Þ ¼ X ∞ n¼1 4VDc π 2n1 ð Þ cos 2n1 ð Þ π 14 h i sin 2n1 ð Þωt (15.120) From (15.120), it follows that the fundamental component of the output phase-to-neutral voltages has an rms value equal to Va ¼ 0:8777435064VDC (15.121) From Fig. 15.62, the mean square value is determined as Mean square value ¼ 1 π V2 DC 6π 7 ¼ 6 7 V2 DC (15.122) Vrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Mean square value p ¼ ffiffiffiffiffi 42 p 7 VDC (15.123) Total harmonic rms voltage (p.u.) is given by VHrms ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Vrms ð Þ2 V1 ð Þ2 q ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffiffiffiffiffi 42 p 7 2 0:8777435064 ð Þ2 s ¼ 0:2944642493 (15.124) Hence, total harmonic distortion is THD ¼ r:m:s: total harmonic voltage r:m:s: total voltage ¼ 0:2944642493 ffiffiffiffiffi 42 p =7 ¼ 0:3180577408 or 31:81% (15.125) The distortion in the line voltages is quite high. It is important to note at this stage that the space vectors described by (15.105) provide mapping of inverter voltages into a two-dimensional space. However, since seven-phase inverter essentially requires description in a seven-dimensional space, not all the harmonics contained in (15.111) and (15.112) will be encompassed by the space vector of (15.105). In particular, space vectors calculated using (15.105) will only represent har- monics of the order 14k1, k¼0, 1,2,3….., that is, the 1st, the 13th, the 15th, and so on. Harmonics of the order 7k, k¼1,2,3,…, cannot appear due to the isolated neutral point. However, harmonics of the order 7k2 and 7k4, k¼1,3,5,… are present in (15.111) and (15.112) but are not encompassed by the space-vector definition of (15.105). These harmonics in essence appear in the second and third two- dimensional space, which requires introduction of the second and third space vectors for the seven-phase system. This issue is addressed in Section 15.4.3.3. 15.4.3.2 PWM Mode of Operation If a seven-phase VSI is operated in PWM mode, apart from the already described 14 states, there will be additional 114 switching states. The number of possible switching states is in general equal to 2n , where n is the number of inverter legs (i.e., output phases). This correlation is valid for any two-level VSI. Table 15.7 sum- marizes the additional switching states that are associated with PWM mode of operation and are absent in the 14-step mode of operation. Switches that are “on” and the corresponding ter- minal polarity are included in Table 15.7 As can be seen from Table 15.7, the remaining 114 switching states encompass four possible situations: all the states when four switches from upper (or lower) half and three from the lower (or upper) half of the inverter are “on” (states 1–14, 29–42, 43–56, 85–99, and 98–112); two states when either all the seven upper (or lower) switches are “on” (states 127 and 128); all the states when five TABLE 15.6 Second nonadjacent line-to-line voltages of seven-phase VSI States Switches ON Space vectors Vad Vbe Vcf Vdg Vea Vfb Vgc 1 12,13,14,1,2,3,4 v ! 1lll VDC VDC 0 VDC VDC VDC VDC 2 13,14,1,2,3,4,5 v ! 2lll VDC VDC VDC VDC VDC VDC 0 3 14,1,2,3,4,5,6 v ! 3lll VDC VDC VDC 0 VDC VDC VDC 4 1,2,3,4,5,6,7 v ! 4lll 0 VDC VDC VDC VDC VDC VDC 5 2,3,4,5,6,7,8 v ! 5lll VDC VDC VDC VDC 0 VDC VDC 6 3,4,5,6,7,8,9 v ! 6lll VDC 0 VDC VDC VDC VDC VDC 7 4,5,6,7,8,9,10 v ! 7lll VDC VDC VDC VDC VDC 0 VDC 8 5,6,7,8,9,10,11 v ! 8lll VDC VDC 0 VDC VDC VDC VDC 9 6,7,8,9,10,11,12 v ! 9lll VDC VDC VDC VDC VDC VDC 0 10 7,8,9,10,11,12,13 v ! 10lll VDC VDC VDC 0 VDC VDC VDC 11 8,9,10,11,12,13,14 v ! 11lll 0 VDC VDC VDC VDC VDC VDC 12 1,9,10,11,12,13,14 v ! 12lll VDC VDC VDC VDC 0 VDC VDC 13 10,11,12,13,14,12 v ! 13lll VDC 0 VDC VDC VDC VDC VDC 14 11,12,13,14,1,2,3 v ! 14lll VDC VDC VDC VDC VDC 0 VDC 498 A. Iqbal et al.
- 43. TABLE 15.7 Modes of operation of seven-phase voltage-source inverter States Switches ON Polarity of terminal 15 1,2,3,5,11,13,14 A+B+C+DEF+G+ 16 1,2,3,4,6,12,14 A+B+CDEFG 17 1,2,3,4,5,7,13 A+B+C+D+EFG+ 18 2,3,4,5,6,8,14 AB+C+DEFG 19 1,3,4,5,6,7,9 A+B+C+D+E+FG 20 2,4,5,6,7,8,10 ABC+D+EFG 21 3,5,6,7,8,9,11 AB+C+D+E+F+G 22 4,6,7,8,9,10,12 ABCD+E+FG 23 5,7,8,9,10,11,13 ABC+D+E+F+G+ 24 6,8,9,10,11,12,14 ABCDE+F+G 25 7,9,10,11,12,13 A+BCD+E+F+G+ 26 2,8,10,11,12,13,14 ABCDEF+G+ 27 1,3,9,11,12,13,14 A+B+CDE+F+G+ 28 1,2,4,10,12,13,14 A+BCDEFG+ 29 1,2,4,5,10,13,14 A+BC+DEF+G+ 30 1,2,3,5,6,11,14 A+B+C+DEF+G 31 1,2,3,4,6,7,12 A+B+CD+EFG 32 2,3,4,5,7,8,13 AB+C+D+EFG+ 33 3,4,5,6,8,9,14 AB+C+DE+FG 34 1,4,5,6,7,9,10 A+BC+D+E+FG 35 2,5,6,7,8,10,11 ABC+D+EF+G 36 3,6,7,8,9,11,12 AB+CD+E+F+G 37 4,7,8,9,10,12,13 ABCD+E+FG+ 38 5,8,9,10,11,13,14 ABC+DE+F+G+ 39 1,6,9,10,11,12,14 A+BCDE+F+G 40 1,2,7,10,11,12,13 A+BCD+EF+G+ 41 2,3,8,11,12,13,14 AB+CDEF+G+ 42 1,3,4,9,12,13,14 A+B+CDE+FG+ 43 1,2,3,4,7,12,13 A+B+CD+EFG+ 44 2,3,4,5,8,13,14 AB+C+DEFG+ 45 1,3,4,5,6,9,14 A+B+C+DE+FG 46 1,2,4,5,6,7,10 A+BC+D+EFG 47 2,3,5,6,7,8,11 AB+C+D+EF+G 48 3,4,6,7,8,9,12 AB+CD+E+FG 49 4,5,7,8,9,10,13 ABC+D+E+FG+ 50 5,6,8,9,10,11,14 ABC+DE+F+G 51 1,6,7,9,10,11,12 A+BCD+E+F+G 52 2,7,8,10,11,12,13 ABCD+EF+G+ 53 3,8,9,11,12,13,14 AB+CDE+F+G+ 54 1,4,9,10,12,13,14 A+BCDE+FG+ 55 1,2,5,10,1,13,14 A+BC+DEF+G+ 56 1,2,3,6,11,12,14 A+B+CDEF+G 57 2,3,4,8,12,13,14 AB+CDEFG+ 58 1,3,4,5,9,13,14 A+B+C+DE+FG+ 59 1,2,4,5,6,10,14 A+BC+DEFG 60 1,2,3,5,6,7,11 A+B+C+D+EF+G 61 2,3,4,6,7,8,12 AB+CD+EFG 62 3,4,5,7,8,9,13 AB+C+D+E+FG+ 63 4,5,6,8,9,10,14 ABC+DE+FG 64 1,5,6,7,9,10,11 ABC+D+E+F+G 65 2,6,7,8,10,11,12 ABCD+EF+G+ 66 3,7,8,9,11,12,13 AB+CD+E+F+G+ 67 4,8,9,10,12,13,14 ABCDE+FG+ 68 1,5,9,10,11,13,14 A+BC+DE+F+G+ 69 1,2,6,10,11,12,14 A+BCDEF+G 70 1,2,3,7,11,12,13 A+B+CD+EF+G+ 71 1,2,4,6,10,12,14 A+BCDEFG States Switches ON Polarity of terminal 72 1,2,3,5,7,11,13 A+B+C+D+EF+G+ 73 2,3,4,6,8,12,14 AB+CDEFG 74 1,3,4,5,7,9,13 A+B+C+D+E+FG+ 75 2,4,5,6,8,10,14 ABC+DEFG 76 1,3,5,6,7,9,11 A+B+C+D+E+F+G 77 2,4,6,7,8,10,12 ABCD+EFG 78 3,5,7,8,9,11,13 AB+C+D+E+F+G+ 79 4,6,8,9,10,12,14 ABCDE+FG 80 1,5,7,9,10,11,13 A+BC+D+E+F+G+ 81 2,6,8,10,11,12,14 ABCDEF+G 82 1,3,7,9,11,12,13 A+B+CD+E+F+G+ 83 2,4,8,10,12,13,14 ABCDEFG+ 84 1,3,5,9,11,13,14 A+B+C+DE+F+G+ 85 2,35,8,11,13,14 AB+C+DEF+G+ 86 1,3,4,6,9,12,14 A+B+CDE+FG 87 1,2,4,5,7,10,13 A+BC+D+EFG+ 88 2,3,5,6,8,11,14 AB+C+DEF+G 89 1,3,4,6,7,9,12 A+B+CD+E+FG 90 2,4,5,7,8,10,13 ABC+D+EFG+ 91 3,5,6,8,9,11,14 AB+C+DE+F+G 92 1,4,6,7,9,10,12 A+BCD+E+FG 93 2,5,7,8,10,11,13 ABC+D+EF+G+ 94 3,6,8,9,11,12,14 AB+CDE+F+G 95 1,4,7,9,10,12,13 A+BCD+E+FG+ 96 2,5,8,10,11,13,14 ABC+DEF+G+ 97 1,3,6,9,11,12,14 A+B+CDE+F+G 98 1,2,4,7,10,12,13 A+BCD+EFG+ 99 1,2,5,6,10,11,14 A+BC+DEF+G 100 1,2,3,6,7,11,12 A+B+CD+EF+G 101 2,3,4,7,8,12,13 AB+CD+EFG+ 102 3,4,5,8,9,13,14 AB+C+DE+FG+ 103 1,4,5,6,9,10,14 A+BC+DE+FG 104 1,2,5,6,7,10,11 A+BC+D+EF+G 105 2,3,6,7,8,11,12 AB+CD+EF+G 106 3,4,7,8,9,12,13 AB+CD+E+FG+ 107 4,5,8,9,10,13,14 ABC+DE+FG+ 108 1,5,6,9,10,11,14 A+BC+DE+F+G 109 1,2,6,7,10,11,12 A+BCD+EF+G 110 2,3,7,8,11,12,13 AB+CD+EF+G+ 111 3,4,8,9,12,13,14 AB+CDE+FG+ 112 1,4,5,9,10,13,14 A+BC+DE+FG+ 113 1,3,4,7,9,12,13 A+B+CD+E+FG+ 114 2,4,5,8,10,13,14 ABC+DEFG+ 115 1,3,5,6,9,11,14 A+B+C+DE+F+G 116 1,2,4,6,7,10,12 A+BCD+EFG 117 2,3,5,7,8,11,13 AB+C+D+EF+G+ 118 3,4,6,8,9,12,14 AB+CDE+FG 119 1,4,5,7,9,10,13 A+BC+D+E+FG+ 120 2,5,6,8,10,11,14 ABC+DEF+G 121 1,3,6,7,9,11,12 A+B+CD+E+F+G 122 2,4,7,8,10,12,13 ABCD+EFG+ 123 3,5,8,9,11,13,14 AB+C+DE+F+G+ 124 1,4,6,9,10,12,14 A+BCDE+FG 125 1,2,5,7,10,11,13 A+BC+D+EF+G+ 126 2,3,6,8,11,12,14 AB+CDEF+G 127 2,4,6,8,10,12,14 ABCDEFG 128 1,3,5,7,9,11,13 A+B+C+D+E+F+G+ 499 15 Multiphase Converters
- 44. switches from upper (or lower) and two from upper (or lower) half of the inverter are “on” (states 15–28, 57–70, and 113–126); and remaining states with six switches from the upper (or lower) half and one switch from the lower (or upper) half in conduction mode (states 71–84). The phase-to-neutral voltages are described using the same approach as that of the previous sections. The phase voltage values are listed in Table 15.8, and the cor- responding space vectors for 15–126 can be obtained using Eq. (15.105) and are given by expressions (15.126)–(15.133). The complete space-vector model of phase voltage is shown in Fig. 15.63. v ! 15phase v ! 28phase 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 2=7 ð ÞVDC cos π 7 ej0 ej13π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.126) v ! 29phase v ! 42phase 2 6 6 6 6 4 3 7 7 7 7 5 ¼ ffiffiffi 2 p 2=7 ð ÞVDC ej0:3052π=7 ej13:3052π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.127) v ! 43phase v ! 56phase 2 6 6 6 6 4 3 7 7 7 7 5 ¼ ffiffiffi 2 p 2=7 ð ÞVDC ej0:6948π=7 ej13:6948π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.128) v ! 57phase v ! 70phase 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 2=7 ð ÞVDC cos 2π 7 ej0 ej13π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.129) v ! 71phase v ! 84phase 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2=7 ð ÞVDC ejo ej13π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.130) v ! 85phase v ! 98phase 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2=7 ð Þ VDC 2 cos 2π=7 ð Þ ej0 ej13π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.131) v ! 99phase v ! 112phase 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2=7 ð Þ VDC 2 cos π=7 ð Þ ej0 ej13π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.132) v ! 113phase v ! 126phase 2 6 6 6 6 6 6 4 3 7 7 7 7 7 7 5 ¼ 2 2=7 ð ÞVDC cos 3π 7 ej0 ej13π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.133) It can be seen that the total of 128 space vectors, available in the PWM operation, fall into 10 distinct categories regarding the magnitude of the available output phase voltages. The phase voltage space vectors are summarized in Table 15.9 for all 128 switching states including 14-step operation. 15.4.3.3 Model Transformation using Decoupling Matrix Since the system under discussion is a seven-phase one, the complete model can only be elaborated in seven-dimensional space. The first two-dimensional spaces are d-q, the second one is x1-y1, the third one is x2-y2, and the last is zero-sequence component that is absent due to the assumption of isolated neutral. On the basis of the general decoupling transformation matrix for an n-phase system, inverter voltage space vectors in the second two-dimensional subspace (x1-y1) and third two- dimensional subspace (x2-y2) are determined as vINV x1y1 ¼ 2 7 va + a2 vb + a4 vc + a6 vd + ave + a3 vf + a5 vg vINV x2y2 ¼ 2 7 va + a3 vb + a6 vc + a2 vd + a5 ve + avf + a4 vg (15.134) Thus, 128 space vectors of phase-to-neutral voltage in the x1-y1 and x2-y2 planes are obtained using Eq. (15.134) and are illus- trated in Figs. 15.64 and 15.65. It can be seen from Figs. 15.63–15.65 that the outermost, that is, first (black), second (pink), third (orange), fourth (green), fifth (turquoise), sixth (blue), seventh (gray 80%), eighth (violet), and ninth (red) tetra- decagon space vectors of the d-q plane map into the eighth (vio- let), fifth (turquoise), fourth (green), third (orange), ninth (red), sixth(blue),first(black),seventh(gray80%),andsecond(pink)of the tetradecagon (violet) of the x1-y1 plane, respectively, and sev- enth (gray 80%), ninth (red), fourth (green), third (orange), sec- ond (pink), sixth (blue), eighth (violet), first (black), and fifth (turquoise) of the tetradecagon (violet) of the x2-y2 plane, respec- tively. Further, it is observed from the above mapping that the phase sequence a,b,c,d,e,f,g of d-q plane corresponds to a,c,e,g, b,d,f of x1-y1 plane and a,d,g,c,f,b,e of x2-y2 plane, respectively. In the black and white version of Figs. 15.63–15.65, they can be distinguished by the vector numbers of d-q plane mapped into x1-y1 and x2-y2 planes. It is important to note at this stage that the harmonics of the order 14k1, k¼0, 1,2,3…, (1, 13, 15…) map into the d-q plane (Fig. 15.63), harmonics of the order 7k2, k¼1,3,5…, (5, 9, 19…) map into the x1-y1 plane (Fig. 15.64), and 500 A. Iqbal et al.
- 45. TABLE 15.8 Phase voltages (p.u.) values for PWM mode Switching states Switches ON Space vectors Va Vb Vc Vd Ve Vf Vg 15 1,2,3,5,11,13,14 v ! 15phase 2/7 2/7 2/7 5/7 5/7 2/7 2/7 16 1,2,3,4,6,12,14 v ! 16phase 5/7 5/7 2/7 2/7 2/7 2/7 2/7 17 1,2,3,4,5,7,13 v ! 17phase 2/7 2/7 2/7 2/7 5/7 5/7 2/7 18 2,3,4,5,6,8,14 v ! 18phase 2/7 5/7 5/7 2/7 2/7 2/7 2/7 19 1,3,4,5,6,7,9 v ! 19phase 2/7 2/7 2/7 2/7 2/7 5/7 5/7 20 2,4,5,6,7,8,10 v ! 20phase 2/7 2/7 5/7 5/7 2/7 2/7 2/7 21 3,5,6,7,8,9,11 v ! 21phase 5/7 2/7 2/7 2/7 2/7 2/7 5/7 22 4,6,7,8,9,10,12 v ! 22phase 2/7 2/7 2/7 5/7 5/7 2/7 2/7 23 5,7,8,9,10,11,13 v ! 23phase 5/7 5/7 2/7 2/7 2/7 2/7 2/7 24 6,8,9,10,11,12,14 v ! 24phase 2/7 2/7 2/7 2/7 5/7 5/7 2/7 25 7,9,10,11,12,13 v ! 25phase 2/7 5/7 5/7 2/7 2/7 2/7 2/7 26 2,8,10,11,12,13,14 v ! 26phase 2/7 2/7 2/7 2/7 2/7 5/7 5/7 27 1,3,9,11,12,13,14 v ! 27phase 2/7 2/7 5/7 5/7 2/7 2/7 2/7 28 1,2,4,10,12,13,14 v ! 28phase 5/7 2/7 2/7 2/7 2/7 2/7 5/7 29 1,2,4,5,10,13,14 v ! 29phase 4/7 3/7 4/7 3/7 3/7 3/7 4/7 30 1,2,3,5,6,11,14 v ! 30phase 3/7 3/7 3/7 4/7 4/7 3/7 4/7 31 1,2,3,4,6,7,12 v ! 31phase 4/7 4/7 3/7 4/7 3/7 3/7 3/7 32 2,3,4,5,7,8,13 v ! 32phase 4/7 3/7 3/7 3/7 4/7 4/7 3/7 33 3,4,5,6,8,9,14 v ! 33phase 3/7 4/7 4/7 3/7 4/7 3/7 3/7 34 1,4,5,6,7,9,10 v ! 34phase 3/7 4/7 3/7 3/7 3/7 4/7 4/7 35 2,5,6,7,8,10,11 v ! 35phase 3/7 3/7 4/7 4/7 3/7 4/7 3/7 36 3,6,7,8,9,11,12 v ! 36phase 4/7 3/7 4/7 3/7 3/7 3/7 4/7 37 4,7,8,9,10,12,13 v ! 37phase 3/7 3/7 3/7 4/7 4/7 3/7 4/7 38 5,8,9,10,11,13,14 v ! 38phase 4/7 4/7 3/7 4/7 3/7 3/7 3/7 39 1,6,9,10,11,12,14 v ! 39phase 4/7 3/7 3/7 3/7 4/7 4/7 3/7 40 1,2,7,10,11,12,13 v ! 40phase 3/7 4/7 4/7 3/7 4/7 3/7 3/7 41 2,3,8,11,12,13,14 v ! 41phase 3/7 4/7 3/7 3/7 3/7 4/7 4/7 42 1,3,4,9,12,13,14 v ! 42phase 3/7 3/7 4/7 4/7 3/7 4/7 3/7 43 1,2,3,4,7,12,13 v ! 43phase 3/7 3/7 4/7 3/7 4/7 4/7 3/7 44 2,3,4,5,8,13,14 v ! 44phase 3/7 4/7 4/7 3/7 3/7 3/7 4/7 45 1,3,4,5,6,9,14 v ! 45phase 3/7 3/7 3/7 4/7 3/7 4/7 4/7 46 1,2,4,5,6,7,10 v ! 46phase 4/7 3/7 4/7 4/7 3/7 3/7 3/7 47 2,3,5,6,7,8,11 v ! 47phase 4/7 3/7 3/7 3/7 4/7 3/7 4/7 48 3,4,6,7,8,9,12 v ! 48phase 3/7 4/7 3/7 4/7 4/7 3/7 3/7 49 4,5,7,8,9,10,13 v ! 49phase 4/7 4/7 3/7 3/7 3/7 4/7 3/7 50 5,6,8,9,10,11,14 v ! 50phase 3/7 3/7 4/7 3/7 4/7 4/7 3/7 51 1,6,7,9,10,11,12 v ! 51phase 3/7 4/7 4/7 3/7 3/7 3/7 4/7 52 2,7,8,10,11,12,13 v ! 52phase 3/7 3/7 3/7 4/7 3/7 4/7 4/7 53 3,8,9,11,12,13,14 v ! 53phase 4/7 3/7 4/7 4/7 3/7 3/7 3/7 54 1,4,9,10,12,13,14 v ! 54phase 4/7 3/7 3/7 3/7 4/7 3/7 4/7 55 1,2,5,10,1,13,14 v ! 55phase 3/7 4/7 3/7 4/7 4/7 3/7 3/7 56 1,2,3,6,11,12,14 v ! 56phase 4/7 4/7 3/7 3/7 3/7 4/7 3/7 57 2,3,4,8,12,13,14 v ! 57phase 2/7 5/7 2/7 2/7 2/7 2/7 5/7 58 1,3,4,5,9,13,14 v ! 58phase 2/7 2/7 2/7 5/7 2/7 5/7 2/7 59 1,2,4,5,6,10,14 v ! 59phase 5/7 2/7 5/7 2/7 2/7 2/7 2/7 60 1,2,3,5,6,7,11 v ! 60phase 2/7 2/7 2/7 2/7 5/7 2/7 5/7 61 2,3,4,6,7,8,12 v ! 61phase 2/7 5/7 2/7 5/7 2/7 2/7 2/7 62 3,4,5,7,8,9,13 v ! 62phase 5/7 2/7 2/7 2/7 2/7 5/7 2/7 63 4,5,6,8,9,10,14 v ! 63phase 2/7 2/7 5/7 2/7 5/7 2/7 2/7 Continued 501 15 Multiphase Converters
- 46. TABLE 15.8 Phase voltages (p.u.) values for PWM mode—cont’d Switching states Switches ON Space vectors Va Vb Vc Vd Ve Vf Vg 64 1,5,6,7,9,10,11 v ! 64phase 2/7 5/7 2/7 2/7 2/7 2/7 5/7 65 2,6,7,8,10,11,12 v ! 65phase 2/7 2/7 2/7 5/7 2/7 5/7 2/7 66 3,7,8,9,11,12,13 v ! 66phase 5/7 2/7 5/7 2/7 2/7 2/7 2/7 67 4,8,9,10,12,13,14 v ! 67phase 2/7 2/7 2/7 2/7 5/7 2/7 5/7 68 1,5,9,10,11,13,14 v ! 68phase 2/7 5/7 2/7 5/7 2/7 2/7 2/7 69 1,2,6,10,11,12,14 v ! 69phase 5/7 2/7 2/7 2/7 2/7 5/7 2/7 70 1,2,3,7,11,12,13 v ! 70phase 2/7 2/7 5/7 2/7 5/7 2/7 2/7 71 1,2,4,6,10,12,14 v ! 71phase 6/7 1/7 1/7 1/7 1/7 1/7 1/7 72 1,2,3,5,7,11,13 v ! 72phase 1/7 1/7 1/7 1/7 6/7 1/7 1/7 73 2,3,4,6,8,12,14 v ! 73phase 1/7 6/7 1/7 1/7 1/7 1/7 1/7 74 1,3,4,5,7,9,13 v ! 74phase 1/7 1/7 1/7 1/7 1/7 6/7 1/7 75 2,4,5,6,8,10,14 v ! 75phase 1/7 1/7 6/7 1/7 1/7 1/7 1/7 76 1,3,5,6,7,9,11 v ! 76phase 1/7 1/7 1/7 1/7 1/7 1/7 6/7 77 2,4,6,7,8,10,12 v ! 77phase 1/7 1/7 1/7 6/7 1/7 1/7 1/7 78 3,5,7,8,9,11,13 v ! 78phase 6/7 1/7 1/7 1/7 1/7 1/7 1/7 79 4,6,8,9,10,12,14 v ! 79phase 1/7 1/7 1/7 1/7 6/7 1/7 1/7 80 1,5,7,9,10,11,13 v ! 80phase 1/7 6/7 1/7 1/7 1/7 1/7 1/7 81 2,6,8,10,11,12,14 v ! 81phase 1/7 1/7 1/7 1/7 1/7 6/7 1/7 82 1,3,7,9,11,12,13 v ! 82phase 1/7 1/7 6/7 1/7 1/7 1/7 1/7 83 2,4,8,10,12,13,14 v ! 83phase 1/7 1/7 1/7 1/7 1/7 1/7 6/7 84 1,3,5,9,11,13,14 v ! 84phase 1/7 1/7 1/7 6/7 1/7 1/7 1/7 85 2,35,8,11,13,14 v ! 85phase 4/7 3/7 3/7 4/7 4/7 3/7 3/7 86 1,3,4,6,9,12,14 v ! 86phase 4/7 4/7 3/7 3/7 4/7 3/7 3/7 87 1,2,4,5,7,10,13 v ! 87phase 3/7 4/7 3/7 3/7 4/7 4/7 3/7 88 2,3,5,6,8,11,14 v ! 88phase 3/7 4/7 4/7 3/7 3/7 4/7 3/7 89 1,3,4,6,7,9,12 v ! 89phase 3/7 3/7 4/7 3/7 3/7 4/7 4/7 90 2,4,5,7,8,10,13 v ! 90phase 3/7 3/7 4/7 4/7 3/7 3/7 4/7 91 3,5,6,8,9,11,14 v ! 91phase 4/7 3/7 3/7 4/7 3/7 3/7 4/7 92 1,4,6,7,9,10,12 v ! 92phase 4/7 3/7 3/7 4/7 4/7 3/7 3/7 93 2,5,7,8,10,11,13 v ! 93phase 4/7 4/7 3/7 3/7 4/7 3/7 3/7 94 3,6,8,9,11,12,14 v ! 94phase 3/7 4/7 3/7 3/7 4/7 4/7 3/7 95 1,4,7,9,10,12,13 v ! 95phase 3/7 4/7 4/7 3/7 3/7 4/7 3/7 96 2,5,8,10,11,13,14 v ! 96phase 3/7 3/7 4/7 3/7 3/7 4/7 4/7 97 1,3,6,9,11,12,14 v ! 97phase 3/7 3/7 4/7 4/7 3/7 3/7 4/7 98 1,2,4,7,10,12,13 v ! 98phase 4/7 3/7 3/7 4/7 3/7 3/7 4/7 99 1,2,5,6,10,11,14 v ! 99phase 4/7 3/7 4/7 3/7 3/7 4/7 3/7 100 1,2,3,6,7,11,12 v ! 100phase 3/7 3/7 4/7 3/7 4/7 3/7 4/7 101 2,3,4,7,8,12,13 v ! 101phase 3/7 4/7 3/7 4/7 3/7 3/7 4/7 102 3,4,5,8,9,13,14 v ! 102phase 4/7 3/7 3/7 4/7 3/7 4/7 3/7 103 1,4,5,6,9,10,14 v ! 103phase 4/7 3/7 4/7 3/7 4/7 3/7 3/7 104 1,2,5,6,7,10,11 v ! 104phase 3/7 4/7 3/7 3/7 4/7 3/7 4/7 105 2,3,6,7,8,11,12 v ! 105phase 3/7 4/7 3/7 4/7 3/7 4/7 3/7 106 3,4,7,8,9,12,13 v ! 106phase 4/7 3/7 4/7 3/7 3/7 4/7 3/7 107 4,5,8,9,10,13,14 v ! 107phase 3/7 3/7 4/7 3/7 4/7 3/7 4/7 108 1,5,6,9,10,11,14 v ! 108phase 3/7 4/7 3/7 4/7 3/7 3/7 4/7 109 1,2,6,7,10,11,12 v ! 109phase 4/7 3/7 3/7 4/7 3/7 4/7 3/7 110 2,3,7,8,11,12,13 v ! 110phase 4/7 3/7 4/7 3/7 4/7 3/7 3/7 111 3,4,8,9,12,13,14 v ! 111phase 3/7 4/7 3/7 3/7 4/7 3/7 4/7 112 1,4,5,9,10,13,14 v ! 112phase 3/7 4/7 3/7 4/7 3/7 4/7 3/7 502 A. Iqbal et al.
- 47. harmonics of the order 7k4, k¼1,3,5…, (3, 11, 17…) are encompassed by x2-y2 plane (Fig. 15.65) space vectors. The second nonadjacent line voltages are elaborated next. The same procedure as that of 14-step mode is adopted to determine the line voltage space vectors for states 15–126 and are given by the expressions (15.135)–(15.142): v ! 15lll v ! 28lll 2 6 6 6 6 6 4 3 7 7 7 7 7 5 ¼ 2 7 4VDC cos π 7 : cos π 14 ejπ=14 ej5π=14 ej27π=14 2 6 6 6 6 6 4 3 7 7 7 7 7 5 (15.135) v ! 29lll v ! 42lll 2 6 6 6 6 6 4 3 7 7 7 7 7 5 ¼ 2 7 2:7575VDC ej0:8052π=7 ej13:8052π=7 2 6 6 6 6 6 4 3 7 7 7 7 7 5 (15.136) v ! 43lll v ! 56lll 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 7 2:7575VDC ej1:1948π=7 ej13:1948π=7 ej0:1948π=7 2 6 6 6 6 4 3 7 7 7 7 5 (15.137) v ! 57lll v ! 70lll 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 7 4VDC cos 2π 7 : cos π 14 ejπ=14 ej5π=14 ej27π=14 2 6 6 6 6 4 3 7 7 7 7 5 (15.138) v ! 71lll v ! 84lll 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 7 2VDC cos π 14 ejπ=14 ej5π=14 ej27π=14 2 6 6 6 6 4 3 7 7 7 7 5 (15.139) TABLE 15.8 Phase voltages (p.u.) values for PWM mode—cont’d Switching states Switches ON Space vectors Va Vb Vc Vd Ve Vf Vg 113 1,3,4,7,9,12,13 v ! 113phase 2/7 2/7 5/7 2/7 2/7 5/7 2/7 114 2,4,5,8,10,13,14 v ! 114phase 2/7 2/7 5/7 2/7 2/7 2/7 5/7 115 1,3,5,6,9,11,14 v ! 115phase 2/7 2/7 2/7 5/7 2/7 2/7 5/7 116 1,2,4,6,7,10,12 v ! 116phase 5/7 2/7 2/7 5/7 2/7 2/7 2/7 117 2,3,5,7,8,11,13 v ! 117phase 5/7 2/7 2/7 2/7 5/7 2/7 2/7 118 3,4,6,8,9,12,14 v ! 118phase 2/7 5/7 2/7 2/7 5/7 2/7 2/7 119 1,4,5,7,9,10,13 v ! 119phase 2/7 5/7 2/7 2/7 2/7 5/7 2/7 120 2,5,6,8,10,11,14 v ! 120phase 2/7 2/7 5/7 2/7 2/7 5/7 2/7 121 1,3,6,7,9,11,12 v ! 121phase 2/7 2/7 5/7 2/7 2/7 2/7 5/7 122 2,4,7,8,10,12,13 v ! 122phase 2/7 2/7 2/7 5/7 2/7 2/7 5/7 123 3,5,8,9,11,13,14 v ! 123phase 5/7 2/7 2/7 5/7 2/7 2/7 2/7 124 1,4,6,9,10,12,14 v ! 124phase 5/7 2/7 2/7 2/7 5/7 2/7 2/7 125 1,2,5,7,10,11,13 v ! 125phase 2/7 5/7 2/7 2/7 5/7 2/7 2/7 126 2,3,6,8,11,12,14 v ! 126phase 2/7 5/7 2/7 2/7 2/7 5/7 2/7 TABLE 15.9 Phase-to-neutral voltage space vectors for states 1–128 Space vectors Set number in planes Value of the space vectors in d-q plane d-q x1-y1 x2-y2 v1phase to v14phase 1 8 7 2=7 ð ÞVDC= 2 cos 3π=7 ð Þ ð Þexp jkπ=7 ð Þ for k ¼ 0,1,2,…,13 v15phase to v28phase 2 5 9 2 2=7 ð ÞVDC cos π=7 ð Þexp jkπ=7 ð Þ for k ¼ 0,1,2,…,13 v29phase to v42phase 3 3 4 ffiffiffi 2 p 2=7 ð ÞVDC exp j0:3052kπ=7 ð Þ for k ¼ 0,1,2,…,13 v43phase to v56phase 4 4 3 ffiffiffi 2 p 2=7 ð ÞVDC exp j0:6948kπ=7 ð Þ for k ¼ 0,1,2,…,13 v57phase to v70phase 5 9 2 2 2=7 ð ÞVDC cos 2π=7 ð Þexp jkπ=7 ð Þ for k ¼ 0,1,2,…,13 v71phase to v84phase 6 6 6 2=7 ð ÞVDC exp jkπ=7 ð Þ for k ¼ 0,1,2,…,13 v85phase to v98phase 7 1 8 2=7VDC ð Þ= 2 cos 2π=7 ð Þ ð Þexp jkπ=7 ð Þ for k ¼ 0,1,2,…,13 v99phase to v112phase 8 7 1 2=7VDC ð Þ= 2 cos π=7 ð Þ ð Þexp jkπ=7 ð Þ for k ¼ 0,1,2,…,13 v113phase to v126phase 9 2 5 2 2=7 ð ÞVDC cos 3π=7 ð Þexp jkπ=7 ð Þ for k ¼ 0,1,2,…,13 v127phase to v128phase – – – 0 503 15 Multiphase Converters
- 48. v ! 85lll v ! 98lll 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 7 2VDC cos 3π 14 ejπ=14 ej5π=14 ej27π=14 2 6 6 6 6 4 3 7 7 7 7 5 (15.140) v ! 99lll v ! 112lll 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 7 4VDC cos 2π 7 : cos 5π 14 ejπ=14 ej5π=14 ej27π=14 2 6 6 6 6 4 3 7 7 7 7 5 (15.141) v ! 113lll v ! 126lll 2 6 6 6 6 4 3 7 7 7 7 5 ¼ 2 7 2VDC cos 5π 14 ejπ=14 ej5π=14 ej27π=14 2 6 6 6 6 4 3 7 7 7 7 5 (15.142) 15.4.4 Space Vector PWM Techniques for a Seven-Phase Voltage Source Inverter This section is devoted to the development of space-vector PWM for a seven-phase voltage-source inverter. The aim of this section is to describe a set of continuous SVPWM in linear modulation range. Four different schemes are defined with the aim to reduce or eliminate the low-order harmonics in the out- put phase voltages. The outer large length space vectors are used to implement the SVPWM method at first followed by using four and then six active space vectors. Two methods are devised with four active vectors, eliminating certain set of low-order harmonics in each method. The six active vector applications yield sinusoidal output voltages, and the other two methods produce low-order harmonics. The analysis is done in terms of quality of output voltages and the range of applicability of each space-vector PWM methods. X1 Y1 57 1 99 71 15 29 43 113 85 86 87 88 89 90 91 92 93 96 94 97 95 98 Vector numbers FIG. 15.64 Phase-to-neutral voltage space vectors for states 1–128 (states 127–128 are at origin) in x1-y1 plane. 85 1 71 113 29 43 57 99 X2 Y2 100 101 102 103 104 105 109 110 106 111 107 112 108 Vector numbers 15 FIG. 15.65 Phase-to-neutral voltage space vectors for states 1–128 (states 127–128 are at origin) in x2-y2 plane. d-axis q-axis v1 v113 v2 v3 v4 v6 v7 v8 v5 v9 v10 v12 v13 v14 v11 v15 v16 v17 v18 v19 v20 v21 v22 v23 v24 v25 v26 v27 v28 v29 v43 v57 v71 v84 v99 FIG. 15.63 Phase-to-neutral voltage space vectors for states 1–128 (states 127–128 are at origin) in d-q plane. 504 A. Iqbal et al.
- 49. Simulation results are provided to support the analytic and theoretical findings. It is demonstrated in Section 15.4.3 that there are a total of 14 distinct sectors with 25.714286 degrees (π/7 radians) spacing. The innermost space vectors in d-q plane are redundant and are therefore omitted from further discussion. This is in full compliance with observation where it is stated that only subset with maximum length vec- tors has to be used for any given combination of the switches that are “on” and “off” (3–4 and 4–3 in this case). The middle region space vectors correspond to two switches being “on” from upper (lower) set and five switches being “off” from lower (upper) set or vice versa and one switch being “on” from upper (lower) set and six switches being “off” from lower (upper) set or vice versa. It follows that, there are nine, 14sided regular polygons are formed by the vectors. The “set number” of vectors forming these polygons is already defined in Table 15.9. 15.4.4.1 Space Vector Pulse Width Modulation (SVPWM) With Sinusoidal Output This section develops SVPWM schemes for a seven-phase VSI. At first, the conventional method of using only set-1 vectors is taken up followed by set-1 plus set-2 and set-1 plus set-2 plus set-6 vectors (SVPWM with sinusoidal output) schemes. The methods discussed in the preceding sections generate low-order harmonic since they utilize either two or four active vectors in one switching period. As emphasized in [40], the number of applied active space vectors for multiphase VSI with an odd phase number should be equal to n1 ð Þ, n is the num- ber of phases of inverter, for sinusoidal output. This means that one needs to apply six active vectors in each switching period, rather than two or four for obtaining sinusoidal output. More- over, the dwell time of each vector should be chosen in such a way as to eliminate vectors of both x1-y1 and x2-y2 planes. Thus, six active vectors (in sector 1, active vectors no. 1, 2, 15, 16, 71, and 72 are used) and one zero vector are chosen to implement the SVPWM. The chosen vectors belong to the first, second, and sixth sets. The switching pattern and the sequence of the space vec- tors for this scheme are illustrated in Fig. 15.66. It is observed from the switching pattern of Fig. 15.66 that the switching in all the phases is staggered, that is, all switches change state at different instants of time. The total number of switching in each switching period is still 28, thus preserving the require- ment that each switch changes state only twice in a switching period. The selection of space vectors for other sectors is listed in Table 15.10. The vector disposition of sector I is shown in Fig. 15.67 in all the three planes. 4 t0 2 ta2 2 ta1 4 t0 2 tb1 2 tb1 2 t0 VA VB VC VD VE VF VG Sector I 2 tb2 2 tb2 2 ta1 2 ta2 2 ta3 2 ta3 2 tb3 2 tb3 127 127 128 71 71 16 16 1 1 2 2 15 15 72 72 Vectors FIG. 15.66 Switching pattern and space-vector disposition for one cycle of operation. TABLE 15.10 Sector-wise switching sequence when the first, second, and sixth set of vectors are applied Sector number Sequence of vectors in operation I 127 71 16 1 2 15 72 128 72 15 2 1 16 71 127 II 127 73 16 3 2 17 72 128 72 17 2 3 16 73 127 III 127 73 18 3 4 17 74 128 74 17 4 3 18 73 127 IV 127 75 18 5 4 19 74 128 74 19 4 5 18 75 127 V 127 75 20 5 6 19 76 128 76 19 6 5 20 75 127 VI 127 77 20 7 6 21 76 128 76 21 6 7 20 77 127 VII 127 77 22 7 8 21 78 128 78 21 8 7 22 77 127 VIII 127 79 22 9 8 23 78 128 78 23 8 9 22 79 127 IX 127 79 24 9 10 23 80 128 80 23 10 9 24 79 127 X 127 81 24 11 10 25 80 128 80 25 10 11 24 81 127 XI 127 81 26 11 12 25 82 128 82 25 12 11 26 81 127 XII 127 83 26 13 12 27 82 128 82 27 12 13 26 83 127 XIII 127 83 28 13 14 27 84 128 84 27 14 13 28 83 127 XIV 127 71 28 1 14 15 84 128 84 15 14 1 28 71 127 505 15 Multiphase Converters
- 50. Using equal volt-second criterion, for sector I, the following is obtained: vdq ¼ 0:642δ1 + 0:5148δ15 + 0:2857δ71 vx1y1 ¼ 0:1586δ1 0:3563δ15 + 0:2857δ71 vx2y2 ¼ 0:2291δ1 + 0:1272δ15 + 0:2857δ71 (15.143) Or the above equations can be represented as vd vx1 vx2 2 4 3 5 ¼ K ½ δ1 δ15 δ71 2 4 3 5 vq vy1 vy2 2 6 4 3 7 5 ¼ K ½ δ2 δ16 δ72 2 4 3 5 where K ½ ¼ 0:642 0:5148 0:2857 0:15686 0:3563 0:2857 0:2291 0:1272 0:2857 2 4 3 5 and δ1, δ15, δ71, δ2, δ16, and δ72 are duty cycles of vector num- bers 1, 15, 71, 2, 16, and 72, respectively; their coefficiants are the respective magnitudes of the vectors and negative sign showing the opposite to normal direction. Since [K] is nonsingular matrix, its inverse is existing (det [K]¼0.1634). Therefore, expressions for duty cycles can be written as δ1 δ15 δ71 2 6 4 3 7 5 ¼ K ½ 1 vd vx1 vx2 2 6 4 3 7 5 δ2 δ16 δ72 2 6 4 3 7 5 ¼ K ½ 1 vq vy1 vy2 2 6 4 3 7 5 (15.144) where K ½ 1 ¼ 0:8455 0:6792 1:5248 0:6792 1:5248 0:8455 0:3754 1:2209 1:9002 2 4 3 5 Solving for δ1, δ15, δ71, δ2, δ16, and δ72 by assuming vx1 ¼ vx2 ¼ vy1 ¼ vy2 ¼ 0 , from (15.144), one gets δ1 δ15 δ71 2 6 4 3 7 5 ¼ vd 0:8455 0:6792 0:3754 2 6 4 3 7 5 δ2 δ16 δ72 2 6 4 3 7 5 ¼ vq 0:8455 0:6792 0:3754 2 6 4 3 7 5 (15.145) Expression for duty cycle of zero is given as δ0 ¼ 1 δ1 + δ15 + δ71 + δ2 + δ16 + δ72 ð Þ (15.146) Since δ0 0, therefore, δ1 + δ15 + δ71 + δ2 + δ16 + δ72 ð Þ 1 (15.147) Subtituting the values of duty cycles from (15.145) in (15.147), one gets vd + vq ¼ 0:526288 Hence, v∗ s max ¼ vd + vq cos π 14 ¼ 0:513 (15.148) where δ1, δ15, and δ71 are duty cycles and suffixes denote the vector numbers; their coefficiants are their respective 1 2 15 16 71 72 d-axis q-axis v1, v2 = 0.642 VDC v15, v16 v71, v72 = 0.3563 VDC = 0.2857 VDC v1, v2 = 0.1586 VDC v15, v16 v71, v72 = 0.3563 VDC = 0.2857 VDC v1, v2 = 0.2291 VDC v15, v16 v71, v72 = 0.1272 VDC = 0.2857 VDC 7 (A) (B) (C) 1 2 15 16 71 72 y1-axis x1-axis x2-axis y2-axis 7 2p 7 3p 1 2 15 16 71 72 p FIG. 15.67 Space-vector disposition in sector I: (A) d-q plane, (B) x1-y1 plane, and (C) x2-y2 plane. 506 A. Iqbal et al.
- 51. magnitudes and negative sign showing their directions that are opposite to normal direction. Solving Eq. (15.143) for δ1, δ15, and δ71 by assuming vdq ¼ 0:513p:u: (maxium achievable output voltage) and vx1y1 and vx2y2 equal to zero, one gets δ1 ¼ 0:43338, δ15 ¼ 0:3484, and δ71 ¼ 0:1926. Same duty- cycles can be applied for vector numbers 2, 16, and 72, respectively. The time of application of zero space vectors is now given as t0 ¼ ts ta1 ta2 ta3 tb1 tb2 tb3 where ta1, ta2, and ta3 are timings of vector number 1, 15, and 71, respectively, and tb1, tb2, and tb3 are timings of vector number 2, 16, and 72, respectively. Once again, the same procedure as that of previous section can be adopted to determine the range of applicibility of proposed method. It is seen that the maximum available output voltage with this SVPWM method is 0.513Vdc . The sim- ulation is done to obtain the maximum acheivable output value (0.513 p.u. peak), with the commanded input equal to 0.6259 p.u., thus ensuring the equality of the fundamental out- put magnitude and the reference magnitude. The other simu- lation conditions are identical to those in application of large medium vectors. The filtered phase voltages are shown in Fig. 15.68 along with the harmonic spectrum for maximum achievable fundamental voltage shown in Fig. 15.69. It is seen from Fig. 15.69 that the spectrum contains funda- mental (0.363551 p.u. rms or 0.514 p.u. peak, 50 Hz) compo- nent and harmonic only at multiple of switching frequency and low-order harmonics are completely eliminated. The oup- tut is sinusoidal because of the fact that the proportion of time of application of the chosen space vectors is such that it cancels all the undesirable x1-y1 and x2-y2 components (as can be seen from Fig. 15.67). It is to be noted here that for lower values of the input reference phase voltage, the output phase voltages preserve the shape, while there will be a correponding reduc- tion in amplitude. 0.02 0.025 0.03 0.035 0.04 0.045 0.05 0.055 0.06 –1 –0.5 0 0.5 1 Voltage (p.u.) Time (s) Phase voltage “Va” 0 200 400 600 800 1000 1200 1400 0 0.1 0.2 0.3 0.4 Voltage spectrum RMS (p.u.) Frequency (Hz) FIG. 15.69 Time-domain and frequency-domain phase “a” voltage waveform for maximum output 0.513 p.u. 0.01 0.015 0.02 0.025 0.03 0.035 0.04 –0.5 0 0.5 Phase-to-neutral voltage (7-phase VSI) Time (S) Amplitude (p.u.) Vg Va Vb Vc Vd Ve Vf Vg FIG. 15.68 Output filtered phase voltage of VSI for the maximum achievable output fundamental voltage (82.14% of the one obtainable with set-1 vectors only). 507 15 Multiphase Converters
- 52. 15.4.4.2 Summary Section 15.4.1 develops a space-vector model of a five-phase volt- age-source inverter, and it is shown that two sets of space vectors exist, namely, d-q and x-y. The second set of space vectors termed here as x-y space is essentially third harmonic of the space vector in d-q plane. Altogether, there exist 32 space vectors out of which 30 are active and 2 are zero vectors. Complete mapping of the space vectors are provided in Section 15.4.1. Step operation of the inverter is elaborated in terms of different conduction mode, that is, 180 degrees is taken up as conduction angle. Fourier anal- ysis is presented in terms of analytic expressions, and simulation results are provided to support the analytic expressions. Carrier-based PWM and space-vector PWM schemes for a five-phase VSI are analyzed and compared using analytic, sim- ulation and experimental approach. Relationship between modulation signal (fundamental and zero-sequence signal) and space vector is established, which indicates a transforma- tion between arbitrary carrier-based PWM and space-vector modulation. A direct relationship is formulated between line- to-line voltage and space vector. It is found that the line-to-line voltage is determined by only active vectors and is independent of zero vectors. Relationship between modulation signals and space-vector sectors is identified. Analytic expressions of distri- bution of zero-vector application times for sinusoidal, fifth- harmonic injection, and triangular zero-sequence injection are determined. Equivalence between switching pattern of space-vector PWM and carrier type is highlighted. Perfor- mance of modulator in terms of THD of output phase voltages is determined for triangular and saw-tooth carrier signals, and the poor performance of saw-tooth carrier is indicated. Four different space-vector PWM schemes for a seven-phase voltage-source inverter are described. At first, the conventional technique of using the largest set of space vectors is extended to a seven-phase inverter. This technique provides maximum DCbusutilization(0.6259),buttheoutputphasevoltagesaredis- tortedwithsignificantamountoflow-orderharmonicsespecially third and fifth. These harmonics are due to free flow of x1-y1 and x2-y2 plane vectors. The second proposed method cancels the x1- y1 plane space vectors, and thus, the low-order harmonic more than three is eliminated in the output phase voltage waveform. Third method is investigated that eliminates vectors of x2-y2 plane. Themodulation index is thesamefor thesecond and third methods with the elimination of different set of harmonics. The DCbusutilizationisintermediate.Thelastmethodcancelsallthe space vectors x1-y1 and x2-y2 planes, thus providing a sinusoidal output voltage with least DC bus utilization. The experimental setup and the results are also provided. 15.5 Multiphase AC-AC Converter 15.5.1 Introduction AC-AC converter refers to a topology of converters in which the amplitude, frequency, and phase of the AC supply can be altered according to the requirement of the load without employing reactive DC link in between. As discussed in Chapter 14, polyphase AC-AC converters can be classified as naturally commutated cycloconverters (NCC) and forced com- mutated cycloconverters (FCC). FCCs when implemented for low- and medium-power drives by employing high switching semiconductor bidirectional switches result in what is com- monly known as matrix converter (MC). This section deals with the multiphase matrix converters (with phase numbers more than three) and the theory that pertains to it. It is observed that as number of phases increase, the number of vectors to be dealt with in space-vector modulation-based techniques is quite large. For an mn MC, the useful number of states is mn [4]. Thus, for a 37 MC, 2187 vectors are to be handled. Other way is to resort to classical methods in which output target volt- ages are defined and friendly harmonics are added to the target phase voltages such that the sinusoidal nature of line voltages are not altered. These target voltages are then fabricated from the input side voltages such that the average in one time sample follows the target voltage sample. Multiphase matrix converters (MPMC) (Fig. 15.70) can be broadly classified into direct multiphase matrix converters (DMMC) and indirect multiphase matrix converters (IMMC). Although the maximum output voltage achievable is the same for both, the advantage with the indirect multiphase matrix con- verters is that the established modulation strategies employed for controlled rectifiers and inverters are readily applicable. In this section, the target is to present the theory on DMMC. The bidirectional switches that are employed for the multiphase matrix converters are the same as employed for conventional 33 matrix converter. Although the work on MPMCs is still in research domain and a statement of encouragement can be given to young researchers, possible applications of MPMCs can be wind energy systems (WES) employing multiphase gen- erator sets, or multiphase motors can be interfaced with the existing three-phase grid using MPMCs. in1 in2 o1 Input lines Output lines S11 S12 S1m S21 S22 S2m Sn1 Sn2 Snm o2 on inm FIG. 15.70 DMMC with m input lines and n input lines. 508 A. Iqbal et al.
- 53. 15.5.2 Brief Review A time line of research in the field of MPMC is shown in Fig. 15.71. The first theory addressing MPMC for odd number of input and output phases was given way back in 1989 [42]. The theory was recently extended to all configurations in [12]. This paper also extends the Venturini method to 3n case, where n can be even or odd. Further, it also presents a sim- plified modulation strategy for MPMC for any number of phases. The first work on the modulation strategy of MPMC was reported in [18]. In this work, the authors use a continuous carrier and the predetermined duty ratio signals to directly gen- erate the gating signals. This explains the origin of the name, that is, the “direct-duty-ratio-based PWM.” A duty ratio is cal- culated for each switch, and since this applies to each output phase independently, it can be used to supply multiphase loads. The input number of phases is restricted to three since the modulation requires identification of the values of the input voltages as the maximum, medium, and minimum. Another approach applied on 39 MC is shown by the same authors in [16], named as carrier-based PWM scheme. Venturini method is also explored for 35 MC in [11,43]. Space-vector approach is the most explored approach and is discussed for various configurations in [17,44–47]. Multiphase open-end loads can also be supplied through dual MPMCs and are prac- tically assessed in [48,49]. A 35 MC is discussed in [50], in which a least number of commutations are employed in one time sample. This leads to the reduction in common-mode voltage. IMMC has recently received commendable attention in [51,52]. The former paper gives carrier-based approach for a 35 MC that can also be realized employing space-vector approach. The later one discussed space-vector-based approach for a 35 MC in the overmodulation range and achieves a VTR of 0.923, which otherwise is 0.7886. 15.5.3 Defining the Voltage Transfer Ratio All modulation strategies whether scalar or space-vector-based require the understanding of maximum achievable output volt- age, that is, the maximum voltage transfer ratio (VTRmax) and its implementation. In scalar methods, the output reference voltages are maneuvered by the addition of friendly harmonics in order to achieve VTRmax. For this, a detailed understanding of how to manipulate the sinusoids is required. Thus, in this section, the theory of VTRmax that is achievable in an MPMC is discussed, and expressions for all the possible cases are derived. The approach will be general for any number of input and output phases until and unless specified. Illustrations are mainly done for 35 MC. 15.5.3.1 The Unutilized Region Consider initially, an m1 converter. The m-phase input volt- age set is defined as vin t ð Þ ¼ vin1 t ð Þ,vin2 t ð Þ,…,vinm t ð Þ ½ ¼ Vin cos ωint + i1 ð Þ 2π m m i¼1 (15.149) Let the duty cycles for which the output is connected to the inputs through switches S1, S2,…,Sm be M t ð Þ ½ ¼ M1 t ð Þ,M2 t ð Þ,…,Mm t ð Þ ½ (15.150) The actual output voltage (w.r.t. input neutral) is obtained as vo t ð Þ ¼ M t ð Þ ½ vT in t ð Þ (15.151) The duty cycle of each switch is such calculated that in one time sample, the average of the actual output voltages follows the reference voltage. Thus, for all arbitrary output frequencies, the VTR for a three-input system can have a maximum reach up to 0.5. Generalizing this for multiple input phases, the VTRmax is given as Vo cos π m (15.152) This leaves a region of 1cos (π/m) unutilized. This region decreases with the increase in the number of input lines. The utilized and unutilized regions are shown for three-phase input case in Fig. 15.72. For five-phase input set, according to (15.151), approxi- mately 19.1% of the input voltage space still remains unutilized. 1989 Alesina, Venturini generalized theory for VTRs for odd phase input/ output MC [2] 1. Moin, Iqbal duty ratio based, 3 X n [4], 2. __, Carrier 9 [5] based, 3X9 [5] Moin, Iqbal space vector, 3X5 [8] 1. Moin, Salam reduced vector-count Space- vector, 3X7 [11] 2. Moin, Abu-Rub space vector, dual MC 3X5 [14], 1. Ali, Iqbal Generalized theory for VTRs of mXn MC, simplified algorithm for IDF on DMMC, [3] Iqbal 2. Sayed, Scalar strategy based on least commtation number, 3 X 5 [15] 1. Nguyen, Lee carrier based 3X5 IMC [16] 2. Chai, Xiao Space vector (overmodulation), 3X5 IMC [17] IMMC DMMC 2011 2012 2015 2016 FIG. 15.71 Year-wise development of MPMC. 509 15 Multiphase Converters
- 54. Now, consider an MPMC whose n output reference voltage set with respect to input neutral is expressed as vo t ð Þ ¼ vo1 t ð Þ,vo2 t ð Þ,…,vom t ð Þ ½ ¼ Vo cos ωot + j1 ð Þ 2π n n j¼1 (15.153) where Vo is limited by (15.152). A periodic function is such added to (15.152) that the amplitude of the output reference phase voltages and thus the line voltages increases, line voltages retain their sinusoidal nature, and the phase difference between voltages do not change. Let this function be fh (t). As this func- tion is common to all the reference output voltages given in (15.5.5), the new output-voltage vector is expressed as vo t ð Þ ¼ vo1 t ð Þ,vo2 t ð Þ,…,von t ð Þ ½ ¼ Vo cos ωot + j1 ð Þ 2π n + fh t ð Þ n j¼1 (15.154) Maximum utilizable region After acknowledging the fact that there is space in which the output phase voltages can expand, it is desirable to know max- imum output-voltage level attainable. Before addressing the issue, terms pertaining to the discussion ahead are described. These terms are exhibited in Fig. 15.73 as upper and lower bounds of input voltage set and upper and lower bounds of output-voltage set (viu, vil, vou, and vol, respectively). It is seen in Fig. 15.73 that at every instant of time vil t ð Þ vol t ð Þ vou t ð Þ viu t ð Þ (15.155) Thus, the input voltage set creates an envelope in which the out- put target voltage has to remain. Also, as fh (t) is a common term, the difference between vou(t) and vol(t) does not contain fh(t).The maximum output voltage is attained when the minima of input voltage range coincide with the maxima of output-voltage range. If the maxima of the output-voltage range are more than the minima of the input voltage range, the condition of over modu- lation occurs. This condition is mathematically expressed as min 0ωint2π viu t ð Þvil t ð Þ f g ¼ max 0ωot2π vou t ð Þvol t ð Þ f g (15.156) Next step is to find out how the waves are optimized. The con- ditions differ for odd and even number of phases. The analysis of both waves is shown one by one subsequently. The analysis given below is done on a set of phases, ignoring the input/output terminology. The region of 0 to 2π for x odd phases is divided into 2x sec- tors. Six sectors of three-phase set are shown in Fig. 15.74. The difference of the upper limit and lower limit generates the same wave in each sector exhibited by vu(t)vl(t) with the same min{ vu(t)vl(t)} and max{ vu(t)vl(t)} values. According to the sequence of phases in (15.153), the voltage that defines vu(t) is the first phase and vl(t) is defined by the x + 1 2 th phase: v1 vx + 1 2 ¼ V cos ωt cos ωt + x + 1 2 1 2π x ¼ V cos ωt cos ωt + x 1 ð Þπ x (15.157) Now, the minimum value occurs at ωt¼0; thus, min v1 vx + 1 2 n o ¼ V 1 cos x 1 ð Þπ x (15.158) And as x is odd, x1 is even, thus, cos x1 ð Þπ x ¼ cos π x, and so, min v1 vx + 1 2 n o ¼ V 1 + cos π x n o ¼ min 0ωt2π vu t ð Þvl t ð Þ f g (15.159) 0 p –1 0 1 viu vil vol vou Angle (rad) Input and output voltages (p.u. w.r.t. V in ) Bounds FIG. 15.73 Bounds of input and output voltages (fo ¼3fin). 0 2p p –1 0 1 Input voltage (pu) Angle (rad) Unutilized region Utilized region FIG. 15.72 Region (shaded) in three-phase input MC where output- voltage references are defined. Maximum of {vu–vl} vu–vl Minimum of {vu–vl} vu vl I II III IV V VI 0 2p p Angle (rad) FIG. 15.74 Sectors for odd number of phases (three-phase set). 510 A. Iqbal et al.
- 55. Now, the max{vu(t)vl(t)} occurs at π/2x. Thus, max v1 vx + 1 2 n o ¼ 2V cos π 2x ¼ max 0ωt2π vu t ð Þvl t ð Þ f g (15.160) Now, particularization of (15.158) and (15.159) in terms of m inputs and n outputs and substitution in (15.155) results in VTRmax as Vo Vin ¼ 1 + cos ðπ=mÞ 2cos ðπ=2nÞ (15.161) Now, if the analysis is done for even-phase set in similar fashion as above, x-phase set is furcated into x sectors, and this is exhibited for six-phase set in Fig. 15.75. In the first sector, vu(t) is defined by the first phase, and vl(t) is defined by vx + 2 2 . This leads to v1 vx + 2 2 ¼ 2V cos ωt ð Þ (15.162) The max{vu(t)vl(t)} in this case in the first sector occurs at ωt¼2π/x and the min{vu(t)vl(t)} is at ωt¼π/x. Thus, max v1 vx + 2 2 n o ¼ 2V ¼ max 0ωt2π vu t ð Þvl t ð Þ f g (15.163) and min v1 vx + 2 2 n o ¼ 2V cos π=x ¼ min 0ωt2π vu t ð Þvl t ð Þ f g (15.164) Thus, if the analysis is extended to MC having both even input and output sets, then substituting (15.162) and (15.163) in (15.155) will result in Vo Vin ¼ cos π m (15.165) MC having odd input phase set and even output phase set, substituting (15.158) and (15.162) in (15.155) results in Vo Vin ¼ 1 2 1 + cos π m (15.166) For a 36 converter, Vo ¼0.75Vin. Lastly, if MC has even input phase set and odd output phase set, then employing (15.159) and (15.163) in (15.155), VTRmax is expressed as Vo Vin ¼ cos π=m ð Þ cos π=2n ð Þ (15.167) For a 63 converter Vo ¼Vin. Hence, unity VTR is achievable in a six-phase input and three-phase output MC. The VTRmax for various configurations of MCs are shown in Table 15.11. 15.5.3.2 Target Output Voltages After analyzing the maximum output voltage achievable, it is necessary for one to derive the derivation of the expression for fh (t) described in (15.153). This function depends on input and output frequencies. Analyzing Fig. 15.75, it is easy to realize that odd phase can only be manipulated. This is because the occurrence of the min{vul} and the max{vul} is at different time instances. This aspect is beneficial in defining a periodic func- tion such that the min{vul} is pulled up and the max{vul} is pulled down, as exhibited for three-phase set in Fig. 15.76. On the contrary, the even-phase set is unalterable as the occur- rence of the above stated condition occurs at the same time instant and, thus, cannot be pulled up or down employing a periodic function and hence extra region cannot be generated. Considering these facts, first of all, synthesis is done for fh (t) for the case when both input and output phase set is odd and for illustration 35 MC is considered. As both the voltage sets are to be optimized, the harmonic voltage, fh(t), contains a term that depends on input frequency and the other that depends –1 0 1 Six phases Bounds Maximum of {vu–vl} vu–vl Minimum of {vu–vl} vu vl I II III IV V VI I 0 2p p Angle (rad) FIG. 15.75 Sectors for even number of phases (six-phase set). TABLE 15.11 Maximum voltage transfer ratios for various configura- tions of MPMC Outputs! 3 4 5 6 7 8 9 Inputs# 3 0.866 0.750 0.788 0.750 0.769 0.750 0.762 4 0.816 0.707 0.743 0.707 0.750 0.707 0.718 5 1.044 0.904 0.951 0.905 0.928 0.904 0.918 6 1.000 0.866 0.911 0.866 0.888 0.866 0.879 7 1.098 0.950 0.999 0.950 0.975 0.950 0.965 8 1.067 0.924 0.971 0.924 0.948 0.924 0.938 9 1.120 0.970 1.020 0.970 0.995 0.970 0.985 vl 0 p 2p Angle (rad) min viu max vil FIG. 15.76 Illustration of min{viu} and max{viu}for odd number of phases (three-phase set). 511 15 Multiphase Converters
- 56. on output frequency. Hence, fh(t) is written as fh t ð Þ ¼ fhin t ð Þ + fho t ð Þ, where fhin t ð Þ and fho t ð Þ are optimizing functions for input and output voltages, respectively. 15.5.3.3 Input Voltage Optimization As stated, min{viu} and max{vil} are at different time instances, as shown for the three-phase set in Fig. 15.76. Therefore, the difference between upper and lower limit is not symmetrical, and thus, optimization is needed so that symmetrical output waveforms are developed. Clamping up of max{vil} and clamp- ing down of max{vil} are done and are exhibited in Fig. 15.77. This is done by superimposing a periodic function whose fre- quency is m times the input frequency. Now, the amplitude of this harmonic is equal to the offset by which the points (encircled in Fig. 15.76) are displaced. Offset for three-phase set is 0.25 p.u., as it is the maximum to which the input voltage points must displace. For m input phases, the offset is offset ¼ 0:5 1 cos π m (15.168) This leads to the following expression for fhin t ð Þ: fhin t ð Þ ¼ 0:5 1 cos π m cos m ωint ð Þ (15.169) For three-phase input, fhin t ð Þ ¼ 0:25 cos 3ωint ð Þ. When this function is added to the input voltages, changes occur as illus- trated in Fig. 15.77. It is seen that after subtracting fhin t ð Þ from the input voltages, the output voltage with 0.75Vin is accommodated instead of 0.5Vin. For m-phase input set, the condition of the peak is derived as Vo ¼ 1offset ð ÞVin (15.170) As the input-voltage set is unalterable, the modification is done to output-voltage set by the addition of fhin t ð Þ to the reference output-voltage equations of (15.152). So, new odd output ref- erence voltage set, with the consideration of odd input phase set is given as vo t ð Þ ¼ Vo cos ωot + j1 ð Þ 2π n + 0:5 1 cos π m Vin cos m ωint ð Þ n j¼1 (15.171) where, Vo is given by (15.169). For 37 MC, (15.170) is written as vo t ð Þ ¼ Vo cos ωot + j1 ð Þ 2π 7 + 0:25 Vin cos 3 ωint ð Þ 7 j¼1 and Vo ¼0.75 Vin. Phase-1 voltage (vo1) of the above equation is illustrated in Fig. 15.78A. It is found that vo1 is going beyond input voltage envelope. Thus, further optimization is needed in this case that is achieved by defining fho t ð Þ. Output voltage optimization A periodic function issuchdefined that min{vou} islifted upward and max {vol} is dragged downward. Obviously, the frequency of this function is n times the output frequency, where fo is the fre- quency of the reference output-voltage set. For five-phase output set, this must be 5fo. Let this function be defined as fho t ð Þ ¼ a cos nωot (15.172) In order to calculate the amplitude of the function, consider the output voltage (vo1) with the addition of (15.171) that is written as u ωot ð Þ ¼ Vo cos ωot + a cos nωot ¼ 0 (15.173) The value of the offset a is chosen such that a minimum value of max{u(ωot)} is achieved. Also, the coefficient a is negative to clamp down max{vou}. To find the magnitude of a, a condition that max{u(ωot)} is located where cos(nωot)¼0 is imposed. This is done as follows: d dωot u ωot ð Þ ¼ Vo sin ωot ð Þa sin nωot ð Þ ¼ 0 (15.174) Now, taking cos (nωot)¼0, ωot¼π/2n, it is found that a ¼ 1 n sin π 2n Vo (15.175) For five-phase output, a¼0.0618Vo. Substituting this value in (15.171), fho ¼ 1 n sin π 2n Vo cos nωot (15.176) Now, max{u(ωot)} occurs when ωot¼π/2n; therefore, max u ωot ð Þ f g ¼ Vo cos π 2n (15.177) This value is 0.951Vo for five-phase output. Fig. 15.78B exhibits the optimization of five-phase output waves. It is seen, as derived in (15.173), the maximum of the new wave occurs at ωot¼π/10. As the optimization of input and output phase sets is done one by one, that is, while considering the 0 p 2p –1 –0.5 0 0.5 1 unopt vin vhin opt vin 0.5 0.75 Input voltages (p.u. w.r.t. V in ) Angle (rad) FIG. 15.77 Optimization of three-phase input voltage set. 512 A. Iqbal et al.
- 57. output waves, it is considered that the input waves are unop- timized. That is why the output waves shown in Fig. 15.78B are shown with respect to Vo. Therefore, by considering input-voltage set as unoptimized and output-voltage set opti- mized, the condition for peak values by applying (15.176) on (15.155) is stated as Vo cos π 2n ¼ 0:5Vin (15.178) For five-phase output Vo ¼0.526Vin. Now, considering input-voltage set and output-voltage set optimization, the peak value, by combining (15.155), (15.168), and (15.176), is expressed as Vo cos π 2n 0:5 1 + cos π m n o Vin (15.179) ) Vomax ¼ 0:5 1 + cos π m cos π 2n Vin (15.180) The VTRmax achievable for 35 MC from (15.179) is 0.78859, which is in accordance with values shown in Table 15.11. The optimized output-voltage set is finally given by combin- ing (15.153), (15.167), (15.168), and (15.175) as vo t ð Þ ¼ Vo cos ωot + j1 ð Þ 2π n +0:5 1 cos π m Vin cos m ωint ð Þ… … 1 n sin π 2n Vo cos nωot 8 : 9 = ; n j¼1 (15.181) where Vo is given by (15.79). Fig. 15.78C exhibits the imple- mentation of (15.180) for 35 converter for output phase 1 with respect to input neutral (vo opt ). All the phases of five-phase voltage set are shown in Fig. 15.79. 15.5.3.4 Other Cases This section deals with the remaining cases of MPMCs. As dis- cussed in previous sections, the even-phase set cannot be opti- mized as its min{viu} and max{vil} occur at the same time, and hence, a periodic function that pushes both the points at the same instant is not feasible to obtain. Considering the config- urations one by one, we have the following: Odd-phase input and even-phase output MC For this type of configuration of MC, only input-voltage set can be optimized, and thus, the even-phase output reference volt- ages are expressed as vo t ð Þ ¼ Vo cos ωot + j1 ð Þ 2π n + 0:5 1 cos π m Vin cos m ωint ð Þ n j¼1 (15.182) where Vo ¼(VTRmax)Vin is according to (15.169). Taking 36 converter for illustration, the reference output voltages of (15.181) for 36 MC is written as vo t ð Þ ¼ Vo cos ωot + j1 ð Þ 2π n + 0:25 Vin cos 3 ωint ð Þ 6 j¼1 –1 –0.5 0 0.5 1 Input and output voltages vin1, vin2, vin3 vo1= vo+ vhin vho vo opt = vo+ vhin – vho vhin vo –1 –0.5 0 0.5 1 vho (t) vo opt (t) vo unopt (t) Output voltage (p.u. of V o ) 0 2p p –1 –0.5 0 0.5 1 Angle (rad) 0 2p p Angle (rad) (A) (C) (B) 0 2p p Angle (rad) Input and output voltages (p.u. of V in ) vinput vhin vo vo1= vo+ vhin FIG. 15.78 (A) Optimization of input voltages extended to vo1 of five-phase set (fo ¼4fin), (B) optimization of output voltages (five-phase set) at 50 Hz, and (C) final optimized phase voltage (vo1) of a five-phase set, fo ¼4fin. 513 15 Multiphase Converters
- 58. where Vo ¼(VTRmax)Vin, and VTRmax ¼0.75. The optimized output voltages for this case are seen in Fig. 15.80. Even-phase input and odd-phase output MC When inputs are even and outputs are odd, only output-voltage optimization is done. So in accordance with (15.175), the ref- erence output voltages are written as vo t ð Þ ¼ Vo cos ωot + j1 ð Þ 2π n 1 n sin π 2n Vo cos nωot n j¼1 (15.183) where Vo ¼(VTRmax)Vin and VTRmax is defined by (15.166). For 63 MC, (15.182) is written as vo t ð Þ ¼ Vo cos ωot + j1 ð Þ 2π n 1 6 Vo cos 3ωot n j¼1 Vo ¼qVin and VTRmax ¼1. This is illustrated in Fig. 15.81. The appreciable fact is that VTRmax is unity, which is 0.7321 only, if optimization is not done. 15.5.4 Simplified Modulation Strategy This method is discussed in [12] lately. It is simple and is appli- cable to any MC configuration. Moreover, unity input displace- ment factor (IDF) is achieved. The results clearly exhibitthe IDF. Matrix operations are done to derive the modulation matrix [M]nm. Considering matrix mn converter shown in Fig. 15.70 and applying Kirchhoff’s voltage law, combining with constraint equation is derived as –1 –0.5 0 0.5 1 Input voltages Output voltages vhin Voltage (with respect to input voltages) 0 2p p Angle (rad) FIG. 15.81 Optimized output voltages for 63 matrix converter (q¼1, fo ¼3fin). –1 –0.5 0 0.5 1 Input voltages Output voltages vhin Voltage (with respect to input voltages) 0 2p p Angle (rad) FIG. 15.80 Optimized output voltages for 36 matrix converter (q¼0.75, fo ¼3fin). 0 2p p –1 –0.5 0 0.5 Angle (rad) 1 Input voltages Output voltages Voltage (with respect to input voltages) FIG. 15.79 Optimized output voltages for 35 matrix converter (q¼0.7886, fo ¼3fin). 514 A. Iqbal et al.
- 59. vo1 vo2 vo3 ⋮ von 1 1 1 ⋮ 1 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 |fflfflffl{zfflfflffl} Y 2n1 ¼ vin1 vin2 … vinm 0 0 … 0 0 0 … 0 ⋮ 0 0 … 0 1 1 … 1 0 0 … 0 ⋮ 0 0 … 0 0 0 … 0 zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{ 1 0 0 … 0 vin1 vin2 … vinm 0 0 … 0 ⋮ 0 0 … 0 0 0 … 0 1 1 … 1 0 0 … 0 ⋮ 0 0 … 0 zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{ 2 0 0 … 0 0 0 … 0 vin1 vin2 … vinm ⋮ 0 0 … 0 0 0 … 0 0 0 … 0 1 1 … 1 ⋮ 0 0 … 0 zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{ 3 … … … … … … 0 0 … 0 0 0 … 0 0 0 … 0 … ⋮ vin1 vin2 … vinm 0 0 … 0 0 0 … 0 0 0 … 0 ⋮ 1 1 … 1 zfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}|fflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{ n 9 = ; 2n 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 5 |fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl} A 2nnm ½M11 M12 M13 ⋯ M1mT ½M21 M22 M23 ⋯ M2mT ½M31 M32 M33 ⋯ M3mT ⋮ ⋮ ⋮ ⋯ ⋮ ½Mn1 Mn2 Mn3 ⋯ MnmT 2 6 6 6 6 6 4 3 7 7 7 7 7 5 |fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl} X nm1 (15.184) X denotes the modulation vector, and Y is the vector of desired output voltages. Now, X is derived as X ¼ AT AAT 1 Y (15.185) AAT when solved will have terms Xm i¼1 v2 ini and Xm i¼1 vini , so, let Xm i¼1 v2 ini ¼ L and Xm i¼1 vini ¼ M. Each term of X when Eq. (15.184) is solved is of similar pattern and can be shown as Mji ¼ 1 mLM2 ð Þ voj mvini M ð ÞMvini + L (15.186) where Mji is the time-based index corresponding to the switch Sji that connects jth output to the ith input. The time duration for which this switch is on is calculated by multiplying this index with sampling time. Further solving by considering m balanced input phases and finally neglecting the terms with denominators with high value, solution for mn matrix con- verter is written as Mji ¼ 1 m 1 + 2vini voj V2 in (15.187) This formula is general for all input and output cases and does not carry any discrimination of odd or even. voj is the target output voltage, which for optimum output voltages are referred to expressions derived in previous sections. Experimental pro- totype of 39 MC is shown in Fig. 15.82, and experimental results for 35 matrix converter obtained are shown in Fig. 15.83. 15.5.5 Other Control Techniques Other modulation strategies that are discussed for MPMCs are space-vector modulation [17], sinusoidal carrier-based modu- lation [16], and direct-duty-ratio-based method [18]. Novel methods like reduced commutation method [50] is also considered. Space-vector PWM technique is highly recommended for VSIs as it increases the DC bus utilization and is easily digitally realized. This method is extended to multiphase matrix converters and is realized for 35 MC in [17]. In this algo- rithm, the input currents and output line voltages are repre- sented on space-vector planes as shown in Fig. 15.84. The number of switching states for an mn MC is 2mn . However, after applying the constraints discussed in Chapter 14, these reduce to mn . For example, for a 35 MC, a total number of combinations can be 215 , that is, 32,768, and with con- straints, this figure reduces to 35 , that is, 243 combinations. However, in [17], only 93 active and three zero vectors are uti- lized and are further categorized into 4 groups, namely, large vectors (30 vectors), medium vectors (30 vectors), small vectors (30 vectors), and zero vectors (3 vectors). Fig. 15.84 exhibits input current and output line voltage space vectors in which only large (L) and medium (M) vectors are shown. The detailed calculations of the dwelling times can be seen in [17]: A new modulation technique is introduced in [50], where least commutation number is achieved. According to normal SVPWM, Venturini or the method discussed in Section 15.5.5, in one switching time cycle, the output voltage must ride on all input voltage, and the average of these samples must be equal to the reference output voltage. This leads to (m1)n Gating pulses Autotransformer 3 × 9 Matrix converter 9-f RL- load Computer 3-f Supply ABCN FPGA based controller Bidirectional module VHDL code FIG. 15.82 Experimental prototype of a 39 MC. 515 15 Multiphase Converters
- 60. commutations per switching cycle. For 35 MC, this will be 10 commutations and are shown in Fig. 15.85A. However, the method proposed in [50] employs only five commutations per cycle, as shown in Fig 15.85B. This provides low THD in output voltages and reduction in the stress on the switches. 15.5.6 Future Prospects In the above sections, the main focus was on DMMC; however, IMMC is now getting considerable attention [51,52]. Research on MPMCs is still under progress, and there is a lot of scope left in this area. The possible areas of research are summarized, which in conjunction with one another may create a new area of research: In Terms of Topology Z-source DMMC and IMMC Multiphase multilevel MC Multiphase multimodular matrix converters Sparse and ultrasparse multiphase MC In Terms of Control Overmodulation in DMMC Enhanced SVPWM techniques Reactive power control Predictive control Periodic control Low-switching-frequency PWM There are many more areas to be considered. Moreover, filter design, EMI considerations, and consideration of faults and unbalanced supplies for MPMCs are also the areas of research. 15.6 Multiphase DC-DC Converter A multiphase DC-DC converter consists of two or more DC-DC converters operating in parallel at the same frequency with a proper phase shift existing between each other. The par- allel operating converters has a common DC source (battery, PV panel, etc.) that feeds power to a common load. Consequently, this type of circuit configuration enables the load to be subjected to an effective frequency that is a multiple of the converter fre- quency (f ), thereby increasing the ripple frequency of the supply harmonic current. The filter requirement is reduced compared with a single-level implementation. The multiphase DC-DC step-down converter or buck converter offers a viable solution for the voltage regulator module (VRM), which is used to power the microprocessors in computers and other applications. At present, VRMs require output voltage less than 1 V and an out- put current of more than 100 A [53]. Various topologies have been reported in literature with varying control strategy [53,54]. The most common topologies are as follows: 1. Multiphase interleaved buck topology 2. Multiphase synchronous buck topology 3. Multiphase tapped-inductor buck topology 4. Multiphase interleaved boost topology 15.6.1 Multiphase Interleaved Buck Topology Fig. 15.86 shows an n phase multiphase interleaved buck con- verter. The individual phase ripple frequency is added to obtain an output current with high ripple frequency. The ripple cancellation of inductor current for a three phase converter (A) (B) FIG. 15.83 Experimental output (A) phase voltage and (B) currents (fo ¼50 Hz). 516 A. Iqbal et al.
- 61. is shown in Fig. 15.87A. The inductor current ripples add up to give three times the ripple frequency with respect to the con- verter operating individually. The magnitude of output current also increases. The ripple cancellation of the output inductor current reduces the requirement of the output capacitance and consequently lowers the cost and reduces the power dissi- pation. The increased input ripple current frequency causes the multiphase buck converter to have reduced input ripple current magnitude (Fig. 15.87B), thereby reducing the size requirement of input capacitor and cost reduction of the overall system. 15.6.1.1 Operation of Multiphase Buck Converter The operation of a two-phase interleaved buck converter (Fig. 15.88) has been discussed in detail. The operating princi- ple remains the same in all higher phases of the converter. Inductors ensure that continuous current flows through the load and the resultant current through output is the sum of the current through each inductor. The frequency of ripples in the current through load is twice that of frequency of ripple current through each inductor. The sum of duty ratios of the two switches is less than or equal to 1. 15.6.1.2 Modes of Operation Mode 1. S1 is on and S2 is off (T1) When S1 is on, current flows through the circuit as shown in Fig. 15.89. The diode D1 is reverse-biased because of the Ei Ii Ii¢ Ii≤ 6 p ai ao a a b Vi ±2L, ±5L, ±8L, ±11L ±14L ±2M, ±5M, ±8M, ±11M, ±15M ±1L, ±4L, ±7L, ±10L, ±13L ±1M, ±4M, ±7M, ±10M, ±13M ±3M, ±6M, ±9M, ±12M, ±15M ±3L, ±6L, ±9L, ±12L, ±14L Vo Vo¢ Vo≤ Vi ±13L, ±14L, ±15L ±10M, ±11M, ±12M ±10L, ±11L, ±12L ±7M, ±8M, ±9M ±7L, ±8L, ±9L ±4M, ±5M, ±6M ±4L, ±5L, ±6L ±1M, ±2M, ±3M ±1L, ±2L, ±3L ±13M, ±14M, ±15M I II III IV V VI VII VIII IX X (B) (A) FIG. 15.84 (A) Input current and (B) output-voltage space vectors cor- responding to large and medium vectors [17]. (B) (A) r s t r s t r s t r s t r s t a b c d e T r s r s r s t s t t a b e c d T FIG. 15.85 (A) Commutation in one time cycle with conventional schemes [43] and (B) commutation in one time cycle observed in [50]. VDC L2 DC load C L1 S2 S1 Ln L3 Sn S1 FIG. 15.86 n-Phase interleaved buck converter. 517 15 Multiphase Converters
- 62. polarity of inductor L1 and does not conduct, whereas the diode D2 is forward-biased and freewheels the current through L2. During the interval when S1 is turned on (T1), the current through L1 increases while the current through L2 decreases lin- early. iL1 and iL2 varies according to the following relations: ΔiL1 ¼ vDC vo ð Þ L1 T1 (15.188) ΔiL2 ¼ vo ð Þ L1 T1 (15.189) where VDC is the input side voltage and vO is the output side voltage. Mode 2. Both S1 and S2 are off (T2) The duty ratio for each phase of the converter operation is less than 0.5 which reduces for higher phase converter. During transition of switching from S1 to S2 both the switches will be off. In this mode, diodes D1 and D2 conduct. Inductors L1 and L2 release the energy stored in the previous modes to the (A) 0 0.2 0.4 0.6 Input current (A) 0 0.2 0.4 Four phase buck converter Single phase buck converter Input current (A) 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 –0.1 0 0.1 0.2 Current through inductors (A) 0.4 0.5 0.6 Time (S) (B) 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 Time (S) Output current (A) FIG. 15.87 (A) Inductor current cancelation in a four-phase converter (simulation result) and (B) comparison of single-phase and four-phase input current (simulation result). VDC L2 DC load C L1 S2 S1 FIG. 15.88 Two-phase buck converter topology. 518 A. Iqbal et al.
- 63. load through the freewheeling diodes D1 and D2. The current through inductors L1 and L2, i.e. iL1 and iL2 decrease linearly. iL1 and iL2 varies according to the following relations: ΔiL1 ¼ vo ð Þ L1 T2 (15.190) ΔiL2 ¼ vo ð Þ L2 T2 (15.191) Mode 3. S2 is on and S1 is off (T3) When S2 is on, current flows in the circuit as shown in Fig. 15.89C. The diode D2 is reverse-biased because of the polarity of inductor L2 and does not conduct, whereas the diode D1 is forward-biased and freewheels the current through L1. While S2 is on, the inductor L2 gets charged while inductor L1 discharges through load. iL1 and iL2 (currents flowing through L1 and L2, respectively) during T3 are given by the equations: ΔiL1 ¼ vo ð Þ L1 T3 (15.192) ΔiL2 ¼ vDC vo ð Þ L2 T3 (15.193) State space analysis The converter system can be expressed in state equation of the form _ X ¼ AX + BU (15.194) V ¼ CT X (15.195) where the state-space variables are defined as X ¼ diL1 dt diL2 dt dvC dt T X ¼ iL1 iL2 vC ½ T U ¼ vDC 0 0 ½ T V is the output-voltage vector. 15.6.1.3 Modes of Operation Mode 1 diL1 dt diL2 dt dvC dt 2 6 6 6 6 6 6 4 3 7 7 7 7 7 7 5 ¼ 0 0 1 L1 0 0 0 1 C 0 1 RC 2 6 6 6 4 3 7 7 7 5 iL1 iL2 vC 2 6 4 3 7 5 + 1 L1 0 0 0 0 0 0 0 0 2 6 6 4 3 7 7 5 vDC 0 0 2 6 4 3 7 5 (15.196) _ X ¼ A1X + B1U Mode 2 diL1 dt diL2 dt dvC dt 2 6 6 6 6 6 4 3 7 7 7 7 7 5 ¼ 0 0 1 L1 0 0 1 L2 1 C 1 C 1 RC 2 6 6 6 6 6 4 3 7 7 7 7 7 5 iL1 iL2 vC 2 4 3 5 + 0 0 0 0 0 0 0 0 0 2 4 3 5 vDC 0 0 2 4 3 5 (15.197) _ X ¼ A2X + B2U Mode 3 diL1 dt diL2 dt dvC dt 2 6 6 6 6 6 4 3 7 7 7 7 7 5 ¼ 0 0 0 0 0 1 L2 0 1 C 1 RC 2 6 6 6 4 3 7 7 7 5 iL1 iL2 vC 2 4 3 5 + 0 0 0 1 L2 0 0 0 0 0 2 6 4 3 7 5 vDC 0 0 2 4 3 5 (15.198) _ X ¼ A3X + B3U 15.6.1.4 State Space Averaging State-space averaging can be done to replace the above sets of state-space equations by a single equation that describe the sys- tem over one switching period: A ¼ A1D1 + 1D1 D3 ð ÞA2 + A3D3 (15.199) VDC VDC L2 DC load S2 S1 L1 C iL1 Flow of current through L1 iL2 Flow of current through L2 iL1 Flow of current through L1 iL2 Flow of current through L2 iL1 Flow of current through L1 iL2 Flow of current through L2 D1 D2 VDC L2 DC load S2 S1 L1 C D1 D2 L2 DC load S2 L1 S1 C D2 D1 (A) (B) (C) FIG. 15.89 Switching diagrams under various modes of operation for a two-phase buck converter: (A) Mode 1, (B) Mode 2, and (C) Mode 3. 519 15 Multiphase Converters
- 64. B ¼ B1D1 + 1D1 D3 ð ÞB2 + B3D3 (15.200) Assuming the duty ratio of mode 1 and 3 are same, then for mode 2, it is 1D Therefore, A ¼ A1 + A3 ð ÞD + 12D ð ÞA2 (15.201) B ¼ B1 + B3 ð ÞD + 12D ð ÞB2 (15.202) 15.6.1.5 Small Signal Analysis In small-signal analysis, it is assumed that all variables are per- turbed around steady-state operating point. Applying pertur- bations to above equation leads to _ X + _ x ¼ A1 + A3 ð Þ D + d ð Þ + 12 D + d ð ÞA2 f g X + x + B1 + B3 ð Þ D + d ð Þ + 12 D + d ð ÞB2 f g U + u (15.203) Where average term is represented by a superscript while small signal term is represented by small letters. Neglecting the prod- uct of terms containing small signal and taking the derivative of steady-state component as zero simplify the above equation to _ x ¼ A1 + A3 ð ÞD + 12D ð ÞA2 f gx + B1 + B3 ð ÞD ½ + 12D ð ÞB2u + A1 + A3 2A2 ð ÞX + B1 + B3 2B2 ð ÞU ½ d (15.204) Taking Laplace transform on both sides, s_ x ¼ A1 + A3 ð ÞD + 12D ð ÞA2 f gx s ð Þ + B1 + B3 ð ÞD ½ + 12D ð ÞB2u s ð Þ + A1 + A3 2A2 ð ÞX ½ + B1 + B2 2B3 ð ÞUd s ð Þ (15.205) _ x ¼ SI A ½ 1 B1 + B3 ð ÞD + 12D ð ÞB2 ½ u s ð Þ f + M’ X + NU d s ð Þg (15.206) where M’ ¼ A1 + A3 2A2 ð Þ and N ¼ B1 + B2 2B3 ð Þ: Vo S ð Þ ¼ CT x s ð Þ (15.207) Putting the value of Eq. (15.204) into Eq. (15.205), we have vo s ð Þ vDC s ð Þ ¼ s 1D ð Þ L1 + L2 ð Þ s3L1L2C + s L1L2 R + s 1D ð Þ2 L1 + L2 ð Þ (15.208) vo s ð Þ d s ð Þ ¼ s 1D ð Þ L1 + L2 ð Þs2 L1L2 iL1 + iL2 ð Þ s3L1L2C + s L1L2 R + s 1D ð Þ2 L1 + L2 ð Þ (15.209) In the above analysis, ESR, ESL, and other parasitic parameters have been neglected. The detailed analysis including the parasitic parameters has been carried out by [55,56]. The wave- form of current through the inductors and the output current for a two-phase buck converter are shown in Fig. 15.90. The frequency of ripple in output current is clearly seen to be twice compared with the single-phase counterpart. Small signal analysis can be extended for an n phase converter. The time-interleaved control will ensure higher- frequency ripple pulses, thereby lesser requirement of filtering. Moreover, the cost and space requirement will also come down. 15.6.1.6 Discontinuous Conduction Mode When the value of L1 and L2 is small, the current through load could be discontinuous. This is undesirable as the output volt- age then becomes function of inductance complicating the con- trol operation [55]. 15.6.1.7 Variation of Output Current Ripple With Duty Ratio and Design Consideration The main advantage of multiphase topology is the cancellation of ripple in the output current, which reduces the size of induc- tance and improves the transient response and the output capacitance requirement is minimized. The voltage tolerance criteria under varying load make multiphase buck converters working as VRMs use small inductance so that the power can be transferred quickly from the source side to the load side. However, small value of inductance causes large ripples in inductor current under steady state condition. So a compro- mise between the two has be taken into consideration while designing. The magnitude of inductor current ripples (consid- ering inductance to be same in each buck converter loop) and the inductance value are related to each other by the equation: ΔiL ¼ d vDC 1d ð Þ Lfs (15.210) Multiphase buck converters interleave (alternate flow of cur- rent through the inductor in each of the converter cycle) the inductor currents in each converter operating in parallel, and hence drastically reduces the total ripples in the current which flows through the output capacitor. With the reduction in cur- rent ripple, the output voltage ripple is also greatly reduced. Therefore with lesser filter requirement, the transient response of the system improves. Hence, a smaller value of capacitance at the output can be used for meeting the transient requirement. Moreover, there is more space for variations in output voltage magnitude during load transient. Consequently, multiphase operation enhances the performance under load transient condition [57,58]. In multiphase converters, the current ripple cancelation effect Ki can be defined as the ratio of the magnitudes of output current ripple (ΔiO) and inductor current ripple (ΔiL). For n phase buck converter, the current ripple cancellation factor Ki is defined as [57] 520 A. Iqbal et al.
- 65. Ki ¼ ΔiO ΔiL ¼ 1 m nd 1 + mnd ð Þ (15.211) where m ¼ floor nd ð Þ, the maximum integer that does not exceed nd. For a small duty ratio, the current ripple cancellation is poor. The output current ripples increases for small duty ratios fur- ther because of the increase in the individual inductor current ripples, which can be seen from the Eq. (15.210). Substituting the Eq. (15.210) into Eq. (15.209), the output current ripples magnitude for multiphase buck converters can be derived, as follows [57] ΔiO ¼ ΔiL Ki ¼ d vDC 1d ð Þ Lfs 1 m nd 1 + mnd ð Þ (15.212) Fig. 15.91 shows the effect of duty ratio on the ripple of the out- put current for multiphase buck converters. Multiphase inter- leaved buck converters are basically governed by the same design equations as that of the single phase buck converter. There are n interleaved paths in a multiphase buck converter where the number of phases of the converter is represented by n. Each channel behaves as an independent buck converter. Let the output voltage and output current in a multiphase buck converter are denoted by vo and io respectively. The relation of output frequency and output current of multiphase converter with one phase of multiphase buck converter is given by fO ¼ N fS (15.213) where fO represents is the output current ripple frequency and fS represents the frequency of single phase ripple current. Volt second balance relationship can be used to develop the design equation for the inductor at the output. VL ¼ L di dt (15.214) or L ¼ VL dt di (15.215) 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0 1 2 1 2 3 0 1 2 0 1 2 Time (S) Currents through inductors (A) Input current (A) Gate 1 Gate 2 FIG. 15.90 Output current and gate pulses (simulated). 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Duty ratio Normalized output ripple current N=1 N=5 N =7 N=6 N =4 N=3 N=2 FIG. 15.91 Variation of ripple with duty ratio and phases. 521 15 Multiphase Converters
- 66. where di ¼ ΔiL ¼ the ripple current through the output induc- tor of each channel. Forsmallchange iniL wecancomfortableconsiderdi¼ΔiL ¼ the ripple current flowingthrough inductor atthe outputofeach interleaved channel. During off cycle dt ¼ 1d ð ÞTS where TS represents the switching period and d represents the duty ratio of the individual switch, Eq. (15.214) becomes L ¼ vO 1d ð Þ ΔiL fs (15.216) or L ¼ d vDC 1d ð Þ ΔiL fs (15.217) The output voltage is kept almost constant with the selection of proper output capacitor. Equivalent series resistance (ESR) and an equivalent series inductance (ESL) are added to the output capacitor to represent a real model. At high frequency switch- ing, ESR is dominant over ESL. So, for the purpose of analysis ESL can be neglected. The minimum capacitance for a multi- phase converter can then be given by the following equation CO ¼ ΔiO 8fS ΔvO (15.218) 15.6.2 Synchronous Multiphase Buck Topology The disadvantage of a conventional multiphase buck converter is the significant power loss during the diode conduction period, which is the product of the forward voltage drop and its current. Synchronous buck topology has a better efficiency than standard multiphase interleaved buck converter. This is obtained by replacing the diodes of multiphase buck converter by MOSFETs. Theoretical study done by [57] shows that the losses in a multiphase buck converter is more due to the forward conduction loss of the diode. The on-resistance (RDS,ON) of MOSFET connected in place of diode is in the milliohm range during conduction hence the losses during con- duction is quite less compared to its conventional counterpart thus efficiency improves. As shown in Fig. 15.92A, a synchronous multiphase inter- leaved buck topology is obtained by replacing the diodes with MOSFET. Dead-times between (S1, S1’), (S2, S2’) and other switch pairs are introduced to prevent shoot-through. For a two phase synchronous converter, the current through the inductor continues to flow through internal body diode of MOSFET (S2) during the dead time. On application of gate signal on MOSFET (S2), the current through inductor flows through S2. As mentioned earlier, with technological advance- ment there is a requirement for larger current by the processors to meet the growing diverse application demand. The multi- phase synchronous buck topology has been adopted in industry to handle such high current processors. The majority of VRC for laptop processor and embedded system board are using synchronous topology today instead of conventional buck. The Intel roadmap suggests that the voltage will be reduced by 0.6 fraction with each passing generation of processor. Cur- rently, the input supply voltage to microprocessors embedded system board is in the range of 0.8–1.6 V [58–60]. But to gene- rate a very low output voltage from higher output voltage, the duty ratio for multiphase synchronous buck converters should be very small. This increases the losses across the switches and the overall converter efficiency reduces. So a synchronous tapped inductor multiphase buck converter topology has been proposed [57] to overcome this disadvantage. A synchronous tapped inductor multiphase buck converter is shown in Fig. 15.92B. To realize a tapped inductor buck converter, only a minor modification in the original buck converter circuit is required. VDC L2 DC load C L1 S2 S1 Ln L3 Sn S3 VDC L2 DC load C L 1 S2 S1 Ln L3 Sn S3 S1′ S2′ S3′ Sn′ S1′ S2′ S3′ Sn′ (A) (B) FIG. 15.92 (A) Synchronous multiphase buck converter and (B) synchronous tapped inductor multiphase buck converter. 522 A. Iqbal et al.
- 67. 15.6.3 Multiphase Boost Converter There is an increasing popularity for high power boost con- verters among power electronic designers in the industrial, automotive and telecom industries for high power application. For large power levels, efficiency becomes quite important in the power converter components. The multiphase boost con- verter is a viable option for such applications (Fig. 15.93). The ripple voltage and currents in both the input and output capac- itors of a multiphase boost converter is very less. Therefore smaller components are required for filtering purpose. Thus, the requirement of bulky heat sinks and forced-air cooling is not there is case of multiphase boost converter [61,62]. Hence, the efficiency of such converters are quite high. The direction of power flow is different in a multiphase buck and boost con- verter which otherwise have same circuit topology. The input of the buck converter and the output of the boost converter are pulsating type current. On the other hand, the output of the buck converter and the input to the boost converter are continuous currents. 15.6.3.1 Modes of Operation Mode 1 During mode 1, both the switches S1 and S2 are on, and the diodes D1 and D2 are in the off condition: diL1 dt ¼ VDC L1 (15.219) diL2 dt ¼ VDC L2 (15.220) dvO dt ¼ VO RC (15.221) The coefficient matrix for this mode can be written as A1 ¼ 0 0 0 0 0 0 0 0 1 RC 2 6 6 4 3 7 7 5B1 ¼ 1 L1 1 L2 0 2 6 6 6 6 4 3 7 7 7 7 5 (15.222) Mode 2 During mode 2, switch S1 is in on condition, switch S2 is in off condition, and the corresponding diodes are in the complementary switching states, that is, D1 is in off condition and D2 is in on condition, respectively: diL1 dt ¼ VDC L1 (15.223) diL2 dt ¼ VDC L2 VO L2 (15.224) dvO dt ¼ il2 C VO RC (15.225) A2 ¼ 0 0 0 0 0 1 L2 0 1 C 1 RC 2 6 6 6 4 3 7 7 7 5 B2 ¼ 1 L1 1 L2 0 2 6 6 6 6 4 3 7 7 7 7 5 (15.226) Mode 3 In mode 3, switch S1 is in off condition, switch S2 is in on con- dition, and the corresponding diodes D1 and D2 are in on and off conditions, respectively: diL1 dt ¼ VDC L1 VO L1 (15.227) diL2 dt ¼ VS L2 (15.228) dv0 dt ¼ iL1 C VO RC (15.229) A3 ¼ 0 0 1 L1 0 0 0 1 C 0 1 RC 2 6 6 6 6 4 3 7 7 7 7 5 B3 ¼ 1 L1 1 L2 0 2 6 6 6 6 6 4 3 7 7 7 7 7 5 (15.230) Mode 4 During mode 4, the semiconductor switches S1 and S2 are in off condition, and the diodes D1 and D2 are in on condition: diL1 dt ¼ VDC L1 VO L1 (15.231) diL2 dt ¼ VDC L2 VO L2 (15.232) dvO dt ¼ il1 c + il2 c VO RC (15.233) VDC L2 DC load C L1 S2 S1 D2 D1 FIG. 15.93 Multiphase boost topology. 523 15 Multiphase Converters
- 68. A4 ¼ 0 0 1 L1 0 0 1 L2 1 C 1 C 1 RC 2 6 6 6 6 6 6 6 4 3 7 7 7 7 7 7 7 5 B4 ¼ 1 L1 1 L2 0 2 6 6 6 6 4 3 7 7 7 7 5 (15.234) The coefficient matrix for the two-phase boost converter are defined as A ½ ¼ A1d1 + A2d2 + A3d3 + A4d4 (15.235) B ½ ¼ B1d1 + B2d2 + B3d3 + B4d4 (15.236) U ½ ¼ VS (15.237) d1 + d2 + d3 + d4 ¼ 1 (15.238) Expressions for A1, A2, A3, and A4 are defined above. Output equation can be written as y t ð Þ ¼ 0 0 1 ½ iL1 iL2 vO 2 4 3 5 Fig. 15.94 shows switching diagram for a multiphase boost converter while Fig. 15.95 shows current through inductors and output current. 15.6.4 Coupled Inductor for Multiphase Buck Ripple cancelation in the output or input current for buck and boost operation, respectively, is one of the major advantage of interleaving technique. But, there is reduction in total input current and output current ripple only while large ripples are still present in the individual inductor present in each inter- leaved converter [13]. Moreover, the large current ripples in the inductor causes large copper loss. These large conduction losses in inductors and switching losses in the switch cannot be resolved by interleaving technique. Therefore, in order to overcome this problem, multiphase interleaved buck and boost converters have coupled inductors. The equivalent inductances of the coupling inductor reduces in case of coupled inductor multiphase buck topology thereby reducing the ripple current in the coupled inductors. The transient response is not compro- mised. Fig. 15.96 shows a two level Coupled inductor multi- phase boost converter. In Fig. 15.97, current flowing through inductors in case of coupled and uncoupled configuration has been compared. 15.6.4.1 Modes of Operation Mode 1 During mode 1, the switches S2 is on, and the diode D1 is conducting: vL1 ¼ L1 diL1 dt + M diL2 dt ¼ VDC VO (15.239) VDC L2 DC load D2 C L1 S2 D1 S1 IL1 Flow of current through L1 iL2 Flow of current through L2 IL1 Flow of current through L1 iL2 Flow of current through L2 VDC L2 DC load D2 D1 L1 C S2 S1 VDC VDC C L1 S2 D1 S1 DC load DC load L2 D2 L2 D2 D1 L1 C S2 S1 IL1 Flow of current through L1 iL2 Flow of current through L2 IL1 Flow of current through L1 iL2 Flow of current through L2 FIG. 15.94 Switching diagram for multiphase boost converter: (A) Mode 1 and Mode 2, (B) Mode 3 and Mode 4. 524 A. Iqbal et al.
- 69. vL2 ¼ L2 diL2 dt + M diL1 dt ¼ VDC (15.240) In this case, inductances L1 and L2 are given by L1, equiv: ¼ L2 1 M2 L1 d d0 :M (15.241) L2, equiv ¼ L2 2 M2 L2 d d’ :M (15.242) When L1 ¼L2 ¼L, equivalent inductance is Lmode, 1 ¼ L2 M2 L d d0 :M (15.243) Mode 2 During mode 2, switch S1 and switch S2 are in off condition, and the corresponding diodes are in on condition. In this case, the equivalent inductance is given by L1,equiv: ¼ L1 M (15.244) L2,equiv: ¼ L2 M (15.245) 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 0.04 0.0405 0.041 0.0415 0.042 0.0425 0.043 8.6 8.8 Currents through inductors (A) 17.3 17.4 17.5 Input current (A) 0 0.5 1 Gate 1 0 0.5 1 Time (S) Gate 2 FIG. 15.95 Current through inductors and output with switching pulses. VDC L2 DC Load C L1 S2 S1 D2 D1 M FIG. 15.96 Coupled inductor multiphase boost converter. iL2 iL1 Coupled converter Uncoupled converter Input current FIG. 15.97 Input current waveforms for coupled inductor multiphase buck converter. 525 15 Multiphase Converters
- 70. When L1 ¼L2 ¼L, equivalent inductance is Lmode,2 ¼ LM (15.246) Mode 3 During mode 3, switch S1 is on, and the diode D2 is conducting. The equivalent inductance will be same as in mode 1. Mode 4 During mode 4, switch S1 and switch S2 are in off condition, and the corresponding diodes are in on condition. The equiv- alent inductance will be the same as in mode 2. The peak-to-peak current in the case of coupled and uncoupled converter topologies are given by ΔIripple ¼ VDCd Lmode,1fs (15.247) ΔIripple ¼ VDCd Lfs (15.248) where fs is the switching frequency and Lmode,1 and L are induc- tances of coupled and uncoupled converter. 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