This document summarizes an approach to optimize the manufacturing of field-effect transistors to increase their integration rate in a double-tail dynamic comparator. The approach involves doping specific areas of a heterostructure via diffusion or ion implantation. The dopants and radiation defects introduced must then be optimized through annealing. Mathematical models are developed to determine the spatial and temporal distributions of dopant and defect concentrations during annealing. Solving these models allows optimization of the annealing process to decrease the dimensions of the transistors and increase the integration density of the comparator.