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Highlights of
Open Power ISA, IBM-A2I, IBM-
A20, Power 10
POWER ISA Timeline:
 August 20,2019 – Open ISAAnnouncement at NA OpenPOWER Summit
 February 13, 2020 – Final Draft of the End User License Released by OPF:
https://openpowerfoundation.org/final-draft-of-the-power-isa-eula-released/
 April 2020 – POWER ISA 3.0 contribution to OPF
-Includes:
• Compliancy subsets
• Custom Extension Space (Sandbox)
• Incremental updates from prior publication
 May 2020 – POWER ISA 3.1 contribution to OPF
 May 2020 – POWER ISA workgroup chartered in OPF
Power Architecture Format – The Books
Power ISA Compliancy
A supporting/ compliant design must :
- Support Base architecture (never optional)
And support atleast one of the compliancy subsets:
- ACS: AIX compliancy subset
- LCS: Linux compliancy subset
- SFFS: Scalar fixed-point+ Floating-point compliancy subset
- SFS: Scalar Fixed-point compliancy subset
And may utilize the combination of hardware and firmware
Open Power ISA Compliancy subsets
Power ISA 3.1 Foundation for Expansion
 General: Byte reverse instructions, Vector integer multiply/Divide/Modulo instructions, 128 bit Binary integer
operations, VSX scalar minimum/maximum/compare- Quad precision
 SIMD: VSX 32 byte storage Access operations, SIMD permute- class operations, Bit-Manipulation operations
VSX load/store Rightmost element operations, VSX Mask manipulation operations, VSX PCV generate
operations for expand/compress
 Pause/ wait reserve
 Copy/ paste extensions
 Hypervisor interrupt location control
 Instruction Prefix support: 88 and modifying opcodes
Power ISA 3.1 Prefix architecture
A2I Power Processor Core
A2I Architectural Capabilities
A2I Microarchitecture
A2O Power Processor Core
A2O Microarchitecture
Power10 Microarchitecture
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Open POWER Cores and ISA
Resources :
ISA : https://wiki.raptorcs.com/w/images/f/f5/PowerISA_public.v3.1.pdf
ISA and Power10 : https://www.youtube.com/watch?v=imzUxijnv7M
Power10 : https://www.youtube.com/watch?v=27VRdI2BGWg
A2O : https://www.youtube.com/watch?v=Bz3tFvKTLxg
https://static.sched.com/hosted_files/openpowerna2020/39/Bill%20Flynn.pdf
https://www.youtube.com/watch?v=2IshMgIGCR4
A2I : https://www.youtube.com/watch?v=DshEFxTZd6I
https://github.com/openpower-cores/a2i - A2I (VHDL)
A2I user manual : https://wiki.alcf.anl.gov/parts/images/c/cf/A2.pdf

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Open POWER Cores and ISA

  • 1. Highlights of Open Power ISA, IBM-A2I, IBM- A20, Power 10
  • 2. POWER ISA Timeline:  August 20,2019 – Open ISAAnnouncement at NA OpenPOWER Summit  February 13, 2020 – Final Draft of the End User License Released by OPF: https://openpowerfoundation.org/final-draft-of-the-power-isa-eula-released/  April 2020 – POWER ISA 3.0 contribution to OPF -Includes: • Compliancy subsets • Custom Extension Space (Sandbox) • Incremental updates from prior publication  May 2020 – POWER ISA 3.1 contribution to OPF  May 2020 – POWER ISA workgroup chartered in OPF
  • 4. Power ISA Compliancy A supporting/ compliant design must : - Support Base architecture (never optional) And support atleast one of the compliancy subsets: - ACS: AIX compliancy subset - LCS: Linux compliancy subset - SFFS: Scalar fixed-point+ Floating-point compliancy subset - SFS: Scalar Fixed-point compliancy subset And may utilize the combination of hardware and firmware
  • 5. Open Power ISA Compliancy subsets
  • 6. Power ISA 3.1 Foundation for Expansion  General: Byte reverse instructions, Vector integer multiply/Divide/Modulo instructions, 128 bit Binary integer operations, VSX scalar minimum/maximum/compare- Quad precision  SIMD: VSX 32 byte storage Access operations, SIMD permute- class operations, Bit-Manipulation operations VSX load/store Rightmost element operations, VSX Mask manipulation operations, VSX PCV generate operations for expand/compress  Pause/ wait reserve  Copy/ paste extensions  Hypervisor interrupt location control  Instruction Prefix support: 88 and modifying opcodes
  • 7. Power ISA 3.1 Prefix architecture
  • 29. Resources : ISA : https://wiki.raptorcs.com/w/images/f/f5/PowerISA_public.v3.1.pdf ISA and Power10 : https://www.youtube.com/watch?v=imzUxijnv7M Power10 : https://www.youtube.com/watch?v=27VRdI2BGWg A2O : https://www.youtube.com/watch?v=Bz3tFvKTLxg https://static.sched.com/hosted_files/openpowerna2020/39/Bill%20Flynn.pdf https://www.youtube.com/watch?v=2IshMgIGCR4 A2I : https://www.youtube.com/watch?v=DshEFxTZd6I https://github.com/openpower-cores/a2i - A2I (VHDL) A2I user manual : https://wiki.alcf.anl.gov/parts/images/c/cf/A2.pdf