Pipelining is a technique used in microprocessors where the execution of an instruction is broken down into stages that can be executed concurrently for different instructions. This allows a new instruction to begin executing before the previous one has finished. The document provides an example of a four-stage integer arithmetic pipeline and calculates the speedup from pipelining over a non-pipelined approach for 100 tasks. It is explained that pipelining can reduce the execution time from 8,000 ns to 2,060 ns, providing a speedup of 3.88x.