Read only memory(rom)
- 1. READ ONLY MEMORY (ROM) 18-Apr-19 1 Syed Hasan Saeed, Integral University, Lucknow
- 2. SYED HASAN SAEED hasansaeedcontrol@gmail.com https://shasansaeed.yolasite.com 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 2
- 3. ROM • In ROM Binary information is stored permanently. • Block diagram of ROM (size m x n ) is shown in fig.1, where ‘m’ is the number of locations and ‘n’ is the number of bit words that can stored in each locations. 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 3 2k x n ROM m x n Data Outputs ‘n’Address Inputs (k) Data Outputs ‘n’Address Inputs (k) Fig. 1 Fig. 2 Io I1 Ik-1 . . . . . . ROM O0 O1 O2 ON-1 ‘k’ inputs Address ‘n’ outputs Data
- 4. ROM • There are ‘k’ number of address lines to access ‘m’ locations. • ‘n’ is the data output lines. This gives the data bits of the stored word selected by the address. • Therefore for implementation of ‘k’ variables and ‘n’ outputs then the size of ROM is represented by 2k x n as shown in fig.2. this will generates all possible 2k minterms. • ROMs are designed only for reading the stored informations. • ROM does not have write operation i.e user cannot write any information. • ROM is used to store fixed information like instructions, look up tables etc. 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 4 k 2m
- 5. ROM • ROMs are programmed at the time of manufacturing. • ROMs are costly. • ROMs can be used for the implementation of combinational circuits 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 5
- 6. EXAMPLE 1 The following memory units are specified by the number of words times the number of bit per word. How many address lines and input-output data lines are required in each case. (i) 4K x 16 (ii) 2G x 8 (iii) 16M x 32 (iv) 256K x 64 Reference: Moris Mano Solution: (i) since, 1K=1024=210 4K=22 x 210= 212 4K x 16 can be written as 212 x 16 Therefore, there are 12 address lines and 16 data lines. Total input-output lines = 12+16=32 (ii) 2G x 8 1 G = 230 2G = 2 x 230 = 231 2G x 8 = 231 * 8 Therefore, there are 31 address lines and 8 data lines. Total input-output lines = 31+8 =39 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 6 No. of Address line
- 7. (iii) 16M x 32 1 M = 220 16M = 24 x 220 = 224 16M x 32 can be written as 16M x 32 = 224 x 32 Therefore, there are 24 address lines and 32 data lines. Total input-output lines = 24 + 32 = 56 (iv) 256K x 64 Since, 1K=1024 = 210 256K = 28 x 210 = 218 256K x 64 can be written as 218 x 64 Therefore, there are 18 address lines and 64data lines. Total input-output lines = 18 + 64 = 82 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 7 No. of Address line No. of Address line
- 8. EXAMPLE 2: Give the number of bytes stored in the memories listed in example 1. SOLUTION: (i) 4K x 16 A byte is equivalent to 8 bits. No. of 16 bit words = 4K= 4 * 1024 = 212 = 4096 Memory Size = No. of words * word size = 4096 * 16 bit = 65536 bits (Output is 16 i.e. 2 bytes) Memory size =65536 / 8 = 8192 bytes = 8kB (ii) 2G x 8 A byte is equivalent to 8 bits. No. of 8 bit words = 2G = 2G = 2 x 230 = 231 = 2,147,483,648 Memory Size = No. of words * word size = 2,147,483,648 * 8 bit = 17179869184 bits (Output is 8 i.e. 1 bytes) Memory size = 17179869184 /8 = 2,147,483,648 =2GB 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 8
- 9. (iii) 16 M x 32 A byte is equivalent to 8 bits. No. of 16 bit words = 24 x 220 = 224 = 16777216 Memory Size = No. of words * word size = 16777216 * 32 bit = 536870912 bits (Output is 32 i.e. 4 bytes) Memory size = 536870912 / 8 = 67108864 bytes = 64 MB Alternate 1: 16M = 224 16 M x 32 = 224 * 4* 8 = 224* 22*8 = 226 *8 No. of Bytes stored = 226 = 67108864 bytes = 64 MB Alternate 2: Memory Size = No. of words * word size = 16 M * 4 B = 64 MB (iv) 256K x 64 256K x 64 Memory Size = No. of words * word size = 256 k * 8B = 2048 kB = 2 MB 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 9 32
- 10. TYPES OF ROM Mask Programmed ROM (MROM) Programmable Read Only Memory (PROM) Erasable Programmable Read Only Memory (EPROM) E2PROM 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 10
- 11. ADVANTAGES OF ROM • Low Cost • High Speed • Flexibility in system designed • ROM is non-volatile memory. 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 11
- 12. APPLICATIONS OF ROM • It is used for the implementation of combinational circuits. • It is used for the implementation of sequential circuits. • Used for look up tables. • Used for storage purpose of microprocessor program. • It is suitable for the LSI manufacturing process. • Used in function generators. 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 12
- 13. INTERNAL STRUCTURE OF ROM 18-Apr-19 13 . . . . . 5x32 DECODER A7 A0 A1A2A6 A5 A4 A3 I0 I4 I3 I2 I1 1 2 3 31 30 29 0 8 Data Output . . . . . Each OR gate has 32 inputs Five Inputs 256 interconnections and each interconnection is programmable Fig. 3
- 14. EXAMPLE: Consider 32 x 8 ROM. • It consists of 32 words of 8 bits each. • To access 32 locations (addresses) there are 5 input lines (m =32, m= 25, k = 5) which forms the binary numbers equivalent to 0 to 31. • Fig.5 shows the internal logic of a ROM. • The five inputs are decoded into 32 different outputs with the help of a 5 x 32 decoder and each output of the decoder represent a memory address. • The 32 outputs of the decoder are connected to each of the eight OR gates. It means that each OR gate having 32 inputs. 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 14
- 15. • There are 8 OR gates and each OR gate has 32 connections, therefore total internal connections will be 32 x 8 = 256 • In general ‘2k x n’ ROM will have ‘k x 2k’ decoder and ‘n’ OR gates. • Each OR gate has 2k inputs, which are connected to each of the outputs of the decoder. 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 15
- 16. • All 256 intersections are programmable. • A programmable connection between two lines is equivalent to a switch which is either turned ON or OFF. ON means two lines are connected with each other and OFF means two lines are not connected. • ROM truth table is shown in fig.4 • Truth table shows that there are 5 inputs and 8 outputs. • There are 32 locations (addresses) and each location stored 8 bits word. • ‘0’ in truth table indicates there is no connection and ‘1’ indicates a connection. 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 16
- 17. TRUTH TABLE: 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 17 Location No. Inputs Outputs I4 I3 I2 I1 I0 A7 A6 A5 A4 A3 A2 A1 A0 0 0 0 0 0 0 1 0 0 1 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 1 2 0 0 0 1 0 1 0 1 1 0 0 0 1 3 0 0 0 1 1 1 0 0 0 1 1 1 0 29 1 1 1 0 1 1 0 0 0 1 0 1 0 30 1 1 1 1 0 0 1 1 1 0 0 0 1 31 1 1 1 1 1 0 1 1 0 0 0 1 1 ------ Fig. 4
- 18. INTERNAL STRUCTURE OF 32 x 8 ROM 18-Apr-19 18 . . . . . 5x32 DECODER A7 A0 A1A2A6 A5 A4 A3 I0 I4 I3 I2 I1 1 2 3 31 30 29 0 8 Data Output . . . . . Each OR gate has 32 inputs Five Inputs 256 interconnections and each interconnection is programmable Fig. 3 0 0 0 0 0 0 0 0 0 0 00 0000 0 0 0 0 0 0 0 0 0 0 000 1 1 1 1 1 1 1 1111 1 1 1 1 111 1 11 1 1 1 1 1
- 19. THANK YOU 18-Apr-19 Syed Hasan Saeed, Integral University, Lucknow 19