TLCS-900/H1 Microcontroller
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The document discusses the Toshiba TLCS-900/H1 microcontroller series. It provides details on the processor core features, including a maximum internal operating frequency of 80MHz and minimum instruction execution time of 12.5ns for high-speed products. It also describes the package, CPU specifications, internal and external memory support, timers, serial interfaces, interrupts, and suitability for industrial applications like programmable motor drivers.
TLCS-900/H1 Microcontroller
- 1. Raisoni College of Engineering An Autonomous Institution under UGC Act 1965 |Accredited by NBA & NAAC ‘A’ Grade DEPARTMENT OF ELECTRONICS AND TELECOMMUNICATION ENGINEERING Session: 2016-2017 Semester/Branch/Section: –VII / ETC – C Name of Subject: Embedded System TAE 1 Report on: TLCS-900/H1 Submitted by: Ashish M Pandey (Roll No. 30) Sumitted To: Prof. S. Nimakar E&TC Department, G.H.R.C.E.
- 2. TLCS-900/H1 Series TMP92CH21FG The TLCS-900/H1 series with a high-performance 32-bit CPU core includes two types of products: The high-speed products with the minimum instruction execution time of 12.5 ns at the maximum internal clock frequency of 80 MHz, and the standard products with the minimum instruction execution time of 50 ns at the maximum internal clock frequency of 20 MHz. Description: Toshiba has been expanding its portfolio of application-specific standard products (ASSPs) that combine an ARM CortexTM-M3 core, which features high performance, high code density and low power consumption, with a Toshiba-original NANO FLASHTM, which features high-speed programming and low power consumption. In addition to the low-cost ARM CortexTM-M3-based ASSPs, Toshiba also offers ASSPs with the ARM926EJ-STM core that are ideal for applications with an LCD screen. With Toshiba’s wide range of ASSP offerings covering 8-bit to 32-bit, you can find the optimum solutions for your applications. Our product portfolio includes ASSPs that are specifically designed for digital TV, digital audio and motor applications; kitchen appliance and home appliances, as well as industrial, office and automotive applications. Toshiba's microcontrollers, which combine a high-performance CPU core and a set of CPU peripherals, offer the ideal solutions for a wide variety of applications. The 32-bit TLCS-900/H1 Series is software-compatible with the 16-bit TLCS-900/L1 Series. This makes it easy for customers to produce an array of derivative products.
- 3. ProcessorCore Features: 900/H1 Series Maximum Internal operating frequency (*1) 20 MHz 80 MHz Minimum instruction execution time 50 ns 12.5 ns Address space Up to 16 Mbytes of linear address space (for program and data) Data transfer rate (micro DMA) 0.25 µs/4 bytes @20 MHz internal 62.5 ns/4 bytes @80 MHz internal Operating voltage 5V/3V 3.3V,1.5V (two power supplies) Multiplication Instruction execution time (16-bit operands, 32-bit result) 400 ns 134 ns Dynamic bus sizing 8/16/32-bit Specification: Package: • 144-pin QFP (LQFP144-P-1616-0.40C) • 144-pin chip form is also available. For details, contact your local Toshiba sales representative. CPU: 32-bit CPU (900/H1 CPU) • Compatible with TLCS-900/L1 instruction code • 16 Mbytes of linear address space • General-purpose register and register banks • Micro DMA: 8 channels (250 ns/4 bytes at fSYS = 20 MHz, best case) Minimum instruction execution time: 50 ns (at fSYS = 20 MHz) Internal memory • Internal RAM: 16 Kbytes (can be used for program, data and display memory) • Internal ROM: 8 Kbytes (used as boot program) Possible downloading of user program through either USB, UART or NAND flash.
- 4. External memory expansion • Expandable up to 512 Mbytes (shared program/data area) • Can simultaneously support 8,- 16- or 32-bit width external data bus. dynamic data bus sizing • Separate bus system Memory controller • Chip select output: 4 channels 8-bit timers: 4 channels 16-bit timer/event counter: 1 channel General-purpose serial interface: 2 channels • UART/synchronous mode: 2 channels (channel 0 and 1) • IrDA ver.1.0 (115 kbps) mode selectable: 1 channel (channel 0) Interrupts: 50 interrupt • 9 CPU interrupts: Software interrupt instruction and illegal instruction • 34 internal interrupts: Seven selectable priority levels • 7 external interrupts: Seven selectable priority levels (6-edge selectable) Industrial Applications: Programmable Motor Driver (PMD) Since the 1990s, Toshiba has been developing 8-bit microcontrollers containing a Programmable Motor Driver (PMD) specifically designed for inverter motor applications. Toshiba is dedicated to providing flexible motor control solutions to help realize enhanced efficiency and quiet operation. Recently, advanced motor control techniques are being used in inverter home appliances in order to improve efficiency and offer smooth rotation. Toshiba is now expanding its PMD microcontroller portfolio with the TX03 Series of 32-bit microcontrollers, which have a Vector Engine (VE) for vector control (field-oriented control) operation. With built-in hardware that links the motor drive signals with the feedback signals from a motor, the PMD can realize motor control with less CPU workload. This approach makes it possible to control sine-wave drive at as low a frequency as square-wave drive.