Microcontrollers and intro to real time programming 1
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This document presents a course outline on microcontrollers and real-time programming, detailing the goals and objectives of learning both hardware and software integration in microprocessor systems. It covers a historical perspective of computer and microprocessor evolution, alongside significant milestones and technological advancements such as Moore's Law and embedded systems. The course comprises lectures in English and practical laboratory sessions in French, emphasizing hands-on experience with system design and assembly language programming.
Microcontrollers and intro to real time programming 1
- 1. 1 Microcontrollers and Introduction to Real-Time Programming Prof. Yusuf Leblebici Microelectronic Systems Laboratory (LSM) yusuf.leblebici@epfl.ch
- 2. 2 Organization Introduction Goals of the Course Historical Perspective - Microprocessors • Pre-history • Last 30 years • Today and tomorrow A Few Words on Embedded Systems The Technology Aspect: Moore’s Law ITRS Predictions
- 3. 3 Goals and Objectives In this course, you will: Learn how the hardware (HW) and software (SW) components of a microprocessor-based system work together to implement digital systems. Learn both HW and SW aspects of integrating digital devices (memory, I/O interfaces, etc.) into microprocessor / microcontroller systems. Get practical hands-on experience in system design and assembly language programming.
- 4. 4 Goals and Objectives Remember: There is always more than one way of looking at things ! Hardware Design Software Design
- 5. 5 Goals and Objectives In the classroom lectures, you will learn more about the hardware architecture aspects of microprocessors and microcontrollers, their internal building blocks, operation principles, interfacing with other digital systems etc… In the laboratory sessions, you will learn more about the machine code and assembly language programming of microprocessors / microcontrollers, and implementation of digital systems using these devices.
- 6. 6 Goals and Objectives The classroom lectures will be in English. The laboratory sessions and exercises will be in French. There will be regular handouts for reading: Book chapters Lecture slides Laboratory manuals etc… Please follow the lectures regularly – it’s important !
- 7. 7 Building Blocks of Digital Systems MEMORY DATAPATH CONTROL INPUT-OUTPUT Main question: How to implement these functions ?
- 8. 8 Computer Pre-history • Charles Babbage • Analytical Engine • Started in 1834 • Never finished
- 9. 9 Computer History Eckert and Mauchly • 1st working electronic computer (1946) • 18,000 Vacuum tubes • 1,800 instructions/sec • 3,000 ft3
- 10. 10 Computer History • Maurice Wilkes 1st store program computer 650 instructions/sec 1,400 ft3 http://www.cl.cam.ac.uk/UoCCL/misc/EDSAC99/ EDSAC 1 (1949)
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- 14. 14 Word length: 16 bits (15 bits data + parity bit) First computer using integrated circuits (ICs) Magnetic core memory Fixed memory (ROM): 36,864 words Erasable memory (RAM): 2,048 words Number of instructions: 34 Cycle time: 11.7 µsec Clock frequency: 85 kHz (!) Number of logic gates: 5,600 (2,800 packages) Weight: 30 kg Power consumption: 70 W Apollo Guidance Computer (AGC)
- 15. 15 Intel 4004 Microprocessor • Introduced in 1970 – First microprocessor – 4 bit architecture ! • 2,250 transistors • 12 mm2 • Clock: 108 kHz
- 16. 16 Intel 8085 Microprocessor • Introduced in 1974 • 8-bit architecture • Still used in some microcontroller applications !
- 17. 17 Intel 8086 Microprocessor • Introduced in 1979 • 29,000 transistors • 33 mm2 • Clock: 5 MHz • 16 bit architecture
- 18. 18 Intel 386 Microprocessor • Introduced in 1985 • 275,000 transistors • 43 mm2 • Clock: 16 MHz • 32 bit architecture
- 19. 19 Intel 486 Microprocessor • Introduced in 1989 • 1,200,000 transistors • 81 mm2 • Clock: 25 MHz • 32 bit architecture – 1st pipelined implementation of IA32
- 20. 20 Intel Pentium Microprocessor • Introduced in 1993 • 3,100,000 transistors • 296 mm2 • Clock: 60 MHz • 32 bit architecture – 1st superscalar implementation of IA32
- 21. Pentium Processor Details • State – Registers – Memory • Control ROM • Combinational logic REG
- 22. 22 Intel Pentium III • Introduced in 1999 • 9,500,000 transistors • 125 mm2 • Clock: 450 MHz • 32 bit architecture
- 23. 23 DEC Alpha 21264 • Introduced in 1998 • 15,200,000 transistors • 302 mm2 • Clock: 700 MHz • 64 bit architecture • Still the highest performance commercial microprocessor: SPEC-95fp Alpha 21264: 66 Pentium III Xeon: 30.4
- 24. 24 Moore’s Law
- 25. 25 Don’t think that the highest-performance processors are always found in a computer !! • Sony Playstation II • Chip designed by Toshiba • Introduced in 1998 • 10,500,000 transistors • 238 mm2 • Clock: 300 MHz • 128 bit architecture • 10 floating-point multiplier accumulators • MPEG-2 decoder • Multimedia processor
- 26. 26 Embedded Systems About four (!) percent of the world’s microprocessors are used in computers. Source: Embedded Systems Programming, May 1999 Average car has about 15 microprocessors. Mercedes S-class: 63 microprocessors !! 32-bit embedded microprocessors 16-bit 8-bit 8-bit 250 million 1 billion 1 billion 1 billion 125 million PCs Intel, AMD Motorola, ARM, MIPS, i960, x86, … Only 4% of the total number
- 27. 27 New Direction: System-on-Chip (SoC) ASIC Core Memory Embedded Processor Core Analog Functions Communication Sensor Interface
- 28. 28 Building Blocks of Digital Systems MEMORY DATAPATH CONTROL INPUT-OUTPUT Main question: How to implement these functions ? CPU
- 29. 29 Bus and CPU Bus: A shared group of wires used for communicating signals among devices • address bus: the device and the location within the device that is being accessed • data bus: the data value being communicated • control bus: describes the action on the address and data buses CPU: Core of the processor, where instructions are executed • High-level language: a = b + c • Assembly language: add r1 r2 r3 • Machine language: 0001001010111010101
- 30. 30 Memory and I/O Memory: Where instructions (programs) and data are stored • Organized in arrays of locations (addresses), each storing one byte (8 bits) in general • A read operation to a particular location always returns the last value stored in that location I/O devices: Enable system to interact with the world • Device interface (a.k.a. controller or adapter) hardware connects actual device to bus • The CPU views the I/O device registers just like memory that can be accessed over the bus. However, I/O registers are connected to external wires, device control logic, etc. • Reads may not return last value written • Writes may have side effects
- 31. 31 Moore’s Law
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- 33. 33 YEAR 2002 2005 2008 2011 2014 TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm CHIP SIZE 400 mm 2 600 mm 2 750 mm 2 800 mm 2 900 mm 2 NUMBER OF TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion DRAM CAPACITY 2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits MAXIMUM CLOCK FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz MINIMUM SUPPLY VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V MAXIMUM POWER DISSIPATION 130 W 160 W 170 W 175 W 180 W MAXIMUM NUMBER OF I/O PINS 2500 4000 4500 5500 6000 ITRS - International Technology Roadmap for Semiconductors Predictions of the worldwide semiconductor / IC industry about its own future prospects...
- 34. 34 YEAR 2002 2005 2008 2011 2014 TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm CHIP SIZE 400 mm 2 600 mm 2 750 mm 2 800 mm 2 900 mm 2 NUMBER OF TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion DRAM CAPACITY 2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits MAXIMUM CLOCK FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz MINIMUM SUPPLY VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V MAXIMUM POWER DISSIPATION 130 W 160 W 170 W 175 W 180 W MAXIMUM NUMBER OF I/O PINS 2500 4000 4500 5500 6000 Shrinking Device Dimensions
- 35. 35 YEAR 2002 2005 2008 2011 2014 TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm CHIP SIZE 400 mm 2 600 mm 2 750 mm 2 800 mm 2 900 mm 2 NUMBER OF TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion DRAM CAPACITY 2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits MAXIMUM CLOCK FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz MINIMUM SUPPLY VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V MAXIMUM POWER DISSIPATION 130 W 160 W 170 W 175 W 180 W MAXIMUM NUMBER OF I/O PINS 2500 4000 4500 5500 6000 Increasing Function Density
- 36. 36 YEAR 2002 2005 2008 2011 2014 TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm CHIP SIZE 400 mm 2 600 mm 2 750 mm 2 800 mm 2 900 mm 2 NUMBER OF TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion DRAM CAPACITY 2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits MAXIMUM CLOCK FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz MINIMUM SUPPLY VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V MAXIMUM POWER DISSIPATION 130 W 160 W 170 W 175 W 180 W MAXIMUM NUMBER OF I/O PINS 2500 4000 4500 5500 6000 Increasing Clock Frequency
- 37. 37 YEAR 2002 2005 2008 2011 2014 TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm CHIP SIZE 400 mm 2 600 mm 2 750 mm 2 800 mm 2 900 mm 2 NUMBER OF TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion DRAM CAPACITY 2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits MAXIMUM CLOCK FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz MINIMUM SUPPLY VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V MAXIMUM POWER DISSIPATION 130 W 160 W 170 W 175 W 180 W MAXIMUM NUMBER OF I/O PINS 2500 4000 4500 5500 6000 Decreasing Supply Voltage
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- 41. 41 Some Interesting WWW Links • Great Microprocessors of the Past and Present http://www3.sk.sympatico.ca/jbayko/cpu.html • CPU Info Center http://bwrc.eecs.berkeley.edu/CIC/ • CPU Design HOW-TO http://www.linuxdoc.org/HOWTO/CPU-Design-HOWTO.html • VLSI Microprocessors http://www.microprocessor.sscc.ru/ • Molecular Expressions Chip Shots Gallery http://micro.magnet.fsu.edu/chipshots/index.html