Unit 1c
- 2. RECAP • DESIGN METHODS (T2M, Q, Cost) • Design FLOWS (5) • Requirement Analysis (2) • SPECIFICATION (SDL)
- 3. System analysis and architecture design > The acronym CRC stands for the following three major items - Classes - Responsibilities - Collaborators > In this section we consider how to turn a specification into an architecture design. > Methodology- CRC card 3
- 5. EX: CRC cards for elevator - Classes - Responsibilities - Collaborators 5
- 6. Elevator crc class responsibilities collaborators Elevator car* Move up and down Car control, car sensor, car control sender Car state Reads current position of car car sensor
- 8. > The quality of a product or service can be judged by how well it satisfies its intended function. > ISO 9000 > If process is crucial, > Documentation , communication are important > CMM- Capability Maturity Model > Initial, repeatable, defined, manages, optimizing 8
- 11. How to create an initial working embedded system How to ensure that the system works properly. To describes the use of the PC as an embedded computing platform. 11
- 12. EXAMPLE PLATFORMS > Architectures and components: - software; - hardware. 12
- 13. HARDWARE: >CPU >BUS >Memory >I/O Devices CHOOSING A PLATFORM . SOFTWARE: >Run Time Components (OS) >Support Components (bug) 13
- 14. INTELLECTUAL PROPERTY > Architectures and components: - Software Libraries; - Hardware design. - Schematics - Net lists 14
- 15. DEVELOPMENT ENVIRONMENT HOST: Software development on a PC TARGET: Hardware on which code will run COMMUNICATION Host & Target connected by the USB HOST FUNCTIONS COMPLIER CROSS COMPILER TEST BENCH 15
- 16. DEBUGGING TECHNIQUES 16 DEBUGGING TECHNIQUES SOFTWARE DEBUGGING TOOLS HARDWARE DEBUGGING TOOLS LOGIC ANALYZERMP-ICEBREAK POINT TOOLSERIAL PORT TOOL
- 17. SOFTWARE DEBUGGING TOOLS 17 SERIAL PORT TOOL Debugging process from the INITIAL SATE of an embedded system BREAK POINT TOOL To specify an address where the Program execution is to break LED To Flash when error detected ADVANTAGE Implementing break points does not require any external devices 17
- 18. HARDWARE DEBUGGING TOOLS 18 MP-ICE Micro Processor In Circuit Emulator Hardware tool to debug software ICE special version of MP that internal Registers to be stopped after reading Expensive
- 20. 2 MODES OF OEPARTION 20 STATE MODE TIMING MODE
- 21. STATE MODE: Sampling the values Uses its own system clock Per clock cycle one signal is sampled Less memory Sequential oriented problems 21
- 22. TIMIMG MODE: Sampling the values Uses its internal clock Per clock cycle SEVERAL signal is sampled MORE memory GLITCH oriented problems 22
- 24. OPERATION Systems data signals are sampled Each sample is copied in vector memory All peripherals must run at high speed as several samples per system clock is performed. After sampling gets over, MP used to control the display by providing the data stored in memory 24
- 26. USE CASES AND REQUIREMENTS 2 REQUIREMENT FUNCTIONAL REQUIREMENT: MULTIMEDIA- MP3 AUDIO, MPEG VIDEO, JPEG Images DATA STORAGE & MANAGEMENT- Memory COMMUNICATION- USB interface Nonfunctional requirements -typical battery 26
- 27. Use case for playing multimedia. > Use case: 27
- 28. use case for connecting to a client > USB or Internet 28
- 29. Hardware architectures: > CPU > runs the operating system, > runs the user interface, > maintains the file system, 29 DSP performs signal processing
- 30. FILE SYSTEMS DOS file systems: DOS file allocation table (FAT) developed by Microsoft FAT can be implemented on flash storage Flash memory: > Flash memory is a type of semiconductor memory provides permanent storage 30
- 32. 32 Performance depends on all the elements of the system: CPU. Cache. Bus. Main memory. I/O device.
- 33. data from memory to the CPU > read from the memory; > transfer over the bus to the cache; and > transfer from the cache to the CPU 33
- 34. Bandwidth as performance > T: # bus cycles. W-Bus width > P: bus clock period. > Total time for transfer: > D: data transformation. > O1 + O2 = overhead O . 34 t = TP
- 35. Bus bandwidth > T-total time taken to transfer N data > D-data transformation > O-Overhead > N-N bytes of data transfer > W-Width of the Bus. 35 Tbasic(N) = (D+O)(N/W)
- 36. Bus burst transfer bandwidth > T-total time taken to transfer N data in burst mode, B- Burst bus transformation > D-data transformation > O-Overhead > N-N bytes of data transfer > W-Width of the Bus. 36 Tburst(N) = (BD+O)N/(BW)
- 37. Memory aspect ratios The height/width ratio of a memory . Best AR depends on Amount of memory required. 37
- 38. Thank you! 38