vlsi Lecture06
0 likes370 views
This document discusses computer-aided design (CAD) tools and their importance in designing modern integrated circuits (ICs). It provides a brief overview of how CAD tools have become necessary to design chips with billions of transistors in a timely manner. It then outlines a simple CAD tool chain involving hardware description, synthesis, layout and routing, simulation, and verification. The remainder of the document focuses on using the Tanner L-Edit tool to implement the layout of an inverter, walking through each step of creating the layout and checking design rules.
vlsi Lecture06
- 1. Design and Implementation of VLSI Systems (EN1600) lecture06
- 2. Computer-Aided Design (CAD) Tools • Early days were easy. The first IC-based microprocessor 4004 from Intel had only 2300 transistors (manufactured in 10 micron technology). Almost manual design. • Current chips has well about 1B transistors. To get the chip to market fast, CAD tools are needed. S. Reda EN160 SP’08
- 3. A simple tool chain specifications Hardware if SEL == “00“ then Y elseif SEL == “01“ then Y = = A; B; elseif SEL == “10“ then Y = C; Description else end if; Y = D; Languages 2:1 MUX 2:1 MUX schematic entry D synthesis C 2:1 MUX B Y A SEL == 10 SEL == 01 SEL == 00 IC layout/ Layout and routing Cell library area simulation Verification and timing/ power results S. Reda EN160 SP’08
- 4. Design Layout using Tanner L-Edit S. Reda EN160 SP’08
- 5. How to implement the layout for an inverter? S. Reda EN160 SP’08
- 6. 1. First setup technology Use AMI 0.5μ submicron technology (λ=0.3μ) S. Reda EN160 SP’08
- 7. Design rules are a bit different than book active polysilicon contacts metal S. Reda EN160 SP’08
- 8. Adjust design in terms of lambda S. Reda EN160 SP’08
- 9. N well creation S. Reda EN160 SP’08
- 10. Active region S. Reda EN160 SP’08
- 11. P-Select S. Reda EN160 SP’08
- 12. N-select S. Reda EN160 SP’08
- 13. Active well/substrate taps Had to adjust well S. Reda EN160 SP’08
- 14. Select for taps S. Reda EN160 SP’08
- 15. Polysilicon S. Reda EN160 SP’08
- 16. Metal 1 S. Reda EN160 SP’08
- 17. Contacts (to active) S. Reda EN160 SP’08
- 18. Contacts to poly S. Reda EN160 SP’08
- 19. Contacts to poly S. Reda EN160 SP’08
- 20. Piece of metal1 for input pin S. Reda EN160 SP’08
- 21. Via1 from metal1 to metal2 S. Reda EN160 SP’08
- 22. Add little metal2 for output pin S. Reda EN160 SP’08
- 23. Design Rule Checker (DRC) verifies that your layout does not violate any rules ignore density warnings if they show up error S. Reda EN160 SP’08
- 24. Design cosmetics Translate your design to the origin S. Reda EN160 SP’08
- 25. Label your inverter pins Make sure you are on the right layer When you label pin, you can select a region (not just point) S. Reda EN160 SP’08