Ca alternative architecture
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The document discusses RISC and CISC architectures, Flynn's taxonomy of parallel processing, and alternative parallel processing approaches. It notes that RISC machines use explicit load and store instructions to access memory, while CISC machines use variable-length instructions. Flynn's taxonomy categorizes architectures based on the number of instruction and data streams. The document also describes superscalar, VLIW, vector processors, distributed computing, dataflow computing, neural networks, and systolic arrays as parallel processing approaches.
Ca alternative architecture
- 2. PRESENTATION
- 4. RISC MACHINES RISC machines were being developed, the term “reduced” became somewhat of a misnomer, and is even more so now. The original idea was to provide a set of minimal instructions that could carry out all essential operations: data movement, ALU operations, and branching. RISC systems access memory only with explicit load and store instructions. In CISC systems, many different kinds of instructions access memory, making instruction length variable and fetch-execute time unpredictable.
- 5. RISC MACHINES The difference between CISC and RISC becomes evident through the basic computer performance equation: RISC systems shorten execution time by reducing the clock cycles per instruction. CISC systems improve performance by reducing the number of instructions per program Add to this the fact that RISC clock cycles are often shorter than CISC clock cycles, and it should be clear that even though there are more instructions, the actual execution time is less for RISC than for CISC.
- 6. FLYNN’S TAXONOMY Flynn’s taxonomy considers two factors: 1. The number of instructions 2. The number of data streams that flow into the processor Flynn’s Taxonomy takes into consideration the number of processors and the number of data streams that flow into the processor. Data driven or Dataflow type architectures sequence of processor events are based on the data characteristics and not the instructions’ characteristics. Flynn’s Taxonomy falls short in a number of ways: First, there appears to be no need for MISD machines. Second, parallelism is not homogeneous. This assumption ignores the contribution of specialized processors. Third, it provides no straightforward way to distinguish architectures of the MIMD category.
- 7. FLYNN’S TAXONOMY The four combinations of multiple processors and multiple data paths are described by Flynn as: SISD: Single instruction stream, single data stream. These are classic uniprocessor systems. SIMD: Single instruction stream, multiple data streams. Executes a single instruction using multiple computations at the same time (or in parallel) – makes use of data-level parallelism. All processors execute the same instruction simultaneously. MIMD: Multiple instruction streams, multiple data streams. These are today’s parallel architectures. Multiple processors function independently and asynchronously in executing different instructions on different data MISD: Multiple instruction streams operating on a single data stream. Many processors performing different operations on the same data stream.
- 8. PARALLEL AND MULTIPROCESSOR ARCHITECTURES Parallel processing is capable of economically increasing system throughput while providing better fault tolerance. The limiting factor is that no matter how well an algorithm is parallelized, there is always some portion that must be done sequentially. Additional processors sit idle while the sequential work is performed. Thus, it is important to keep in mind that an n -fold increase in processing power does not necessarily result in an n -fold increase in throughput.
- 9. PARALLEL AND MULTIPROCESSOR ARCHITECTURES Superscalar And VLIW Superscalar Superpipeling VLIW Vectors Processors Vector Registers Distributed Computing Remote Procedure Calls(RPC) Superscalar And VLIW Superscalar architectures include multiple execution units such as specialized integer and floating-point adders and multipliers. Very long instruction word (VLIW) architectures differ from superscalar architectures because the VLIW compiler, instead of a hardware decoding unit, packs independent instructions into one long instruction that is sent down the pipeline to the execution units.
- 10. PARALLEL AND MULTIPROCESSOR ARCHITECTURES Vector Processors Vector computers are processors that operate on entire vectors or matrices at once. Vector processors can be categorized according to how operands are accessed. Register-register vector processors require all operands to be in registers. Memory-memory vector processors allow operands to be sent from memory directly to the arithmetic units. Distributed Computing Distributed computing is another form of multiprocessing. However, the term distributed computing means different things to different people. Remote procedure calls (RPCs) extend the concept of distributed computing and help provide the necessary transparency for resource sharing.
- 11. ALTERNATIVE PARALLEL PROCESSING APPROACHES Some people argue that real breakthroughs in computational power-- breakthroughs that will enable us to solve today’s intractable problems-- will occur only by abandoning the von Neumann model. Numerous efforts are now underway to devise systems that could change the way that we think about computers and computation. These systems implement new ways of thinking about computers and computation.
- 12. ALTERNATIVE PARALLEL PROCESSING APPROACHES They include Dataflow Computing Neural Network Systolic Array Dataflow Computing Von Neumann machines exhibit sequential control flow: A linear stream of instructions is fetched from memory, and they act upon data. In dataflow computing, program control is directly controlled by data dependencies. There is no program counter or shared storage.
- 13. ALTERNATIVE PARALLEL PROCESSING APPROACHES Neural Network Neural network computers consist of a large number of simple processing elements that individually solve a small piece of a much larger problem. They are particularly useful in dynamic situations that are an accumulation of previous behavior, and where an exact algorithmic solution cannot be formulated. Neural network processing elements (PEs) multiply a set of input values by an adaptable set of weights to yield a single output value. Systolic Array Systolic arrays, a variation of SIMD computers, have simple processors that process data by circulating it through vector pipelines. Systolic arrays can sustain great throughout because they employ a high degree of parallelism. Connections are short, and the design is simple and scalable. They are robust, efficient, and cheap to produce. They are, however, highly specialized and limited as to they types of problems they can solve.
- 14. CONCLUSION The RISC-versus-CISC debate is becoming increasingly more a comparison of chip architectures. What really matters is program execution time, and both RISC and CISC designers will continue to improve performance. Flynn’s taxonomy categorizes architectures depending on the number of instructions and data streams. MIMD machines should be further divide into those that use shared memory and those that do not. Very long instruction word (VLIW) architectures differ from superscalar architectures because the compiler, instead of a decoding unit, creates long instructions. New architectures are being devised to solve intractable problems. These new architectures include dataflow computers, neural networks, and systolic arrays.