Cad for vlsi design june2013 (1)
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This document contains 10 questions related to VLSI design and CAD for VLSI circuits. The questions cover topics such as simulated annealing, Boolean gate problems, parameters for floor planning and local routing, software modules for simulation, use of ROBDD in logic verification, high level synthesis, and data flow graphs.
Cad for vlsi design june2013 (1)
- 1. I Question Paper Code; 71871 M.E. DEGREE EXAMINATION, JUNE/JULY 2013. Second Semester VLSI Design VL 9221/VL 921- CAD FOR VLSI CIRCUITS (Common to M.E. - Applied Electronics, M.E. - VLSI Design, l1.E. Embedded Systems, and M.E. Digital Electronics and Comm unication Engineering) (Regulation 2009) Time : Three hours Maximum: 100 marks Answer ALL questions. PART A - (10 x 2 = 20 marks) 1. What is simulated annealing? What is its significance? 2. There are three different types of problems faced at the level of Boolean gates. Name them. 3. Write the values that govern the minimum distance calculation. 4. Perturbation of a feasible solution for standard cell or building block placement is more complex. Why? 5. How do you select the floor plan order? 6. List the parameters that characterize the types of local routing problem.' 7. What are the software modules used for the construction of a simulator? 8. How can ROBDD be used in logic verification? 9. Show a chart that performs the transition of a high level synthesis. 10. Draw the data flow graph for the given program fragment While (a >b) a,.......a-b;