CArcMOOC 07.02 - Non-volatile memory devices
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This document discusses different types of non-volatile memory chips, including NAND and NOR memories. It describes the basic components and workings of floating gate transistors, which are used to build FLASH memories. NOR-based and NAND-based FLASH memories are compared in terms of their read, erase, and write processes as well as their typical applications. Multi-level cell FLASH memories that can store multiple bits per cell are also introduced.
CArcMOOC 07.02 - Non-volatile memory devices
- 1. Carc 07.02 alessandro.bogliolo@uniurb.it 07. Memory 07.02. Non-Volatile Memory Chips • NAND and NOR memories • Floating gate transistors • FLASH memories Computer Architecture alessandro.bogliolo@uniurb.it
- 2. Carc 07.02 alessandro.bogliolo@uniurb.it NOR-based ROM GND/source WL0 WL1 WL2 WL3 BL0 BL1 BL2 BL3 charge WL0 WL1 WL2 WL3 BL0 BL1 BL2 BL3 1 0 1 1 0 1 1 0 1 0 1 0 1 1 1 1
- 3. Carc 07.02 alessandro.bogliolo@uniurb.it NAND-based ROM WL0 WL1 WL2 WL3 BL0 BL1 BL2 BL3 charge WL0 WL1 WL2 WL3 BL0 BL1 BL2 BL3 0 1 0 0 1 0 0 1 0 1 0 1 0 0 0 0
- 4. Carc 07.02 alessandro.bogliolo@uniurb.it Floating gate transistor Control gate Floating gate n+ source n+ drain p-substrate bulk - - Erasure (Fowler-Nordheim tunneling) Programming (hot-electron injection) - Programming (F-N tunneling)
- 5. Carc 07.02 alessandro.bogliolo@uniurb.it Floating gate transistor (programming/writing) VGS FG FG T C Q V Without charge in the FG With negative charge in the FG 1 0 1 0 Works like a transistor Works like an open line With positive charge in the FG 1 0 Works like a short circuit
- 6. Carc 07.02 alessandro.bogliolo@uniurb.it NOR-based flash memories • Read • Random access, like a ROM • Erase • F-N tunneling • Write (programming) • Hot-electron injection • Interface • Common flash interface • Applications • Execute in place
- 7. Carc 07.02 alessandro.bogliolo@uniurb.it NAND-based flash memories • Read • Sequential • Erase • F-N tunneling (release) • Write (programming) • F-N tunneling (injection) • Interface • Like a block device • MMU required to support execute-in-place • Applications • File system
- 8. Carc 07.02 alessandro.bogliolo@uniurb.it Multi-level flash cells • Multi-level cell • Control the amount of charge in the floating gate • Sense the current level rather than the presence of current • Store 2 or more bits in a single cell • DiskOnChip • High storage capacity • Built-in file system • Built-in execute-in-place
- 9. Carc 07.02 alessandro.bogliolo@uniurb.it DiskOnChip vs NOR vs NAND http://www.m-sys.com/site/en-US/Corporate/Technology/NANDandNOR_Flash_Technologies.htm DiskOnChip NOR NAND Capacity 8MB-1024MB 1MB-32MB 16MB-512MB XIP (code execution) XIP boot block Yes None Fast erase (3 msec) VERY SLOW erase (5 sec) Fast erase (3 msec) Fast write Slow write Fast write Fast read Fast read Fast read Extremely high: Standard: Low: Built-in EDC/ECC solves bit-flipping. Bit-flipping issues reported Requires 1-4 bit EDC/ECC due to bit-flipping issue. Bad block managed by TrueFFS. Less than 10% the life span of NAND. Requires bad-block management. Erase Cycles 100,000 - 1,000,000 10,000 - 100,000 100,000 - 1,000,000 Interface SRAM/NOR-like Full memory interface I/O only Access Method RND on code area, SEQ on data area. Random Sequential Ideal Usage Both data and code storage in any application that requires a file system. Code storage - limited capacity due to price in high capacity. May save limited data as well. Data storage only - due to complicated flash management. Code will usually not be stored in raw NAND flash. Examples Smartphones Simple home appliances PC Cards PDAs Embedded designs Compact Flash Point-Of-Sale Workstations Low-end set top boxes Secure Digital SCB/IPC Low-end mobile handsets MP3 players Digital Gateways PC BIOS chips Digital Cameras Telecom Equipment Set-Top Boxes Thin Clients Price Low High Low Reliability Performance
- 10. Carc 07.02 alessandro.bogliolo@uniurb.it Flash vs HDD • No random-access rewrite • Require complex built-in interfaces • Higher cost • NAND flashes have the lowest cost per bit • Limited number of erase-write cycles • Read-most memories • Much lower power consumption