![Chapter 1
Introduction
Temperature is the most often-measured environmental quantity [1]. This is because
nearly all physical, chemical, mechanical, and biological systems exhibit some sort
of temperature dependence. Temperature measurement and control are therefore
critical tasks in many applications. Traditionally, temperature sensors have been
implemented with discrete components such as resistance temperature detectors
(RTDs), thermistors, or thermocouples. In the last three decades, integrated tem-
perature sensors, particularly in CMOS technology, have become a promising
alternative. A sustained research effort has been devoted to the development of
compact, low-cost temperature sensors with co-integrated readout circuitry, thus
providing temperature information in a digital format. Such smart temperature
sensors (see Fig. 1.1) are conventional products nowadays [3–7].
There are several advantages associated with smart sensors; firstly, since a
digital output is almost mandatory in modern systems, no external analog-to-digital
converter (ADC) is required. This higher level of integration reduces component
count, and therefore size and, typically, cost. Secondly, in contrast to digital signals,
analog signals are prone to interference and thus are not well suited for accurately
transmitting data to other blocks in a system. Lastly, by integrating the readout
circuit and the sensor on the same chip, on-chip digital post-processing becomes
possible, which usually results in simpler systems.
1.1 Motivation
Smart temperature sensors have been around for many years. However, with the
recent development of low-power radio systems, wireless temperature sensing has
become very attractive, as it opens up a wide variety of new applications. One
can think of applications in cold supply chains, monitoring of perishable goods,
animal husbandry and agriculture, automotive, building automation, and healthcare.
© Springer International Publishing AG 2018
K. Souri, K.A.A. Makinwa, Energy-Efficient Smart Temperature Sensors
in CMOS Technology, Analog Circuits and Signal Processing,
DOI 10.1007/978-3-319-62307-8_1
1](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-20-320.jpg)
![2 1 Introduction
Fig. 1.1 Block diagram of an
integrated smart temperature
sensor [2]
smart temperature sensor
sensor
front-end ADC
digital
interface
digital
temperature
reading
temperature
Remote
Sensor
Clustering Node,
Intermediate Processing Node
Remote
Sensor
Remote
Sensor
Wireless
Link
Final Processing Node
Wireless
Link
Sensor Field
Single-hop
Multi-hops
Fig. 1.2 A typical wireless sensor network (WSN) arrangement [8]
Wireless sensor networks (WSNs), which consist of spatially distributed sensor
nodes with a wireless communication infrastructure, were introduced in the 2000s
[8]. Various physical or environmental quantities such as temperature, sound,
humidity, motion, and pressure can be sensed and digitized by the sensor nodes.
The digitized signals are then passed through the communication network towards
a centralized or distributed control unit for further processing, as shown in Fig. 1.2.
As the name WSN suggests, and mainly due to cost reasons and ease of integration,
wireless operation is a key feature, which at the same time makes powering the
sensor nodes a challenging task. Most WSNs have used battery-powered sensors
nodes, while quite recently, nodes based on energy harvesting or scavenging have
also been introduced [9].](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-21-320.jpg)
![1.1 Motivation 3
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a
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o
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.
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o
i
l
l
i
B
n
i
e
z
i
S
t
e
k
r
a
M
2010 2011 2012 2013 2014 2015 2016 2017 2020
7.4
5.6 6.4
8.4
9.7
11.1
12.7
21.9
14.5
Fig. 1.3 Projected size of the global market for RFID tags from 2010 to 2020 (in billion U.S.
dollars) [10]
Another opportunity for wireless sensing has recently emerged through the
introduction of radio frequency identification (RFID) technology as a versatile
wireless communication platform. RFID has been around for years now and has
become a billion dollar market over the last few years and it is still growing. With
an estimated $5.6 billion market in 2010, and an average 15% year-on-year growth
rate (see Fig. 1.3), the forecasted market in 2020 will exceed $21.9 billion [10]. This
shows that RFID technology has achieved solid penetration throughout worldwide
commerce, boosted by dynamic growth in the retail apparel sector. The freedom
provided by small size and easy positioning, non-line-of-sight wireless operation
and powering, and extended read ranges are key features that have made RFID
technology so promising.
Apart from its primary application in identification and tracking, RFID has
become a pragmatic building block for the internet of things (IoT), thus creating
a flood of new applications in numerous industries [11]. According to an IC Market
Drivers report in 2016 [12], 30.0 billion Internet connections are expected to be in
place worldwide in 2020, with 85% of them being to web-enabled things, meaning
a wide range of commercial, industrial, and consumer systems, distributed sensors,
vehicles, and other connected objects. As reported, IoT applications will fuel strong
sales growth in optoelectronics, sensors/actuators, and discrete semiconductors,
which are projected to rise by a compound annual growth rate (CAGR) of 26.0%
between 2015 and 2019, thus offering a forecasted market of $11.6 billion in 2019.
Most RFID tags consist of two main parts (see Fig. 1.4). The first part is an
integrated circuit (IC) to implement the target functionality, e.g., the storing and
processing of information, as well as the RF transceiver. This part usually occupies
only a small portion of the total area of the tag. The second part, which takes up the
bulk of the area, is the antenna, which is required for receiving and transmitting the
RF signal. Depending on their source of energy, RFID tags can be classified into
passive and active tags. Active RFID tags include a battery to power the IC, which](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-22-320.jpg)
![4 1 Introduction
Silicon Chip
Coiled Antenna
Silicon Chip
Coiled Antenna
Silicon Chip
Coiled Antenna
Fig. 1.4 Various samples of RFID tags; each tag is composed of a large antenna and a silicon
integrated circuit (IC)
makes autonomous operation possible. In consequence, low power designs, along
with brief operating periods, are desirable in order to maximize battery lifetime.
Passive RFID tags, in contrast, are not equipped with a battery and consequently,
autonomous operation is not possible. Instead, the power required to operate the
tag is scavenged from an external magnetic/electromagnetic field, transmitted by
a reader. The energy absorbed via an antenna from the field used to power the
tag, thus, enabling data transmission and other functionalities. In other words,
the antenna of a passive RFID tag is used to transfer information as well as to
receive power.
The choice of RFID tag type depends on the target application. Battery-equipped
or active RFID tags can communicate over long distances, up to 100 m or more.
Furthermore, they can operate continuously. However, they have limited lifetime
(typically 1–4 years), significantly higher production costs, e.g., few dollars and
larger package size, all due to the use of a dedicated battery. The major advantage
of passive RFID tags is that they can operate without a battery, thus offering much
lower production cost (usually a few pennies), longer lifetime (20 years or more),
and much smaller package size. For many years, the main drawback of passive
tags was known to be their limited operating range, e.g., 3–5 m. Recent tags with
operating range up to 100 m have been developed [13], thus making them the tags
of choice for most RFID applications.](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-23-320.jpg)
![1.2 Challenges in Wireless Sensing 5
1.2 Challenges in Wireless Sensing
Although wireless temperature sensors seem very promising, there are many
challenges associated with their implementation. To be cost-effective, such sensors
must be fully compatible with CMOS technology. Fortunately, various temperature
sensing elements are available in standard CMOS technology. However, due to
the process spread of various elements, CMOS sensors often require sophisticated
and/or time-consuming calibration and trimming processes (e.g., two-temperature
calibration and trimming) to obtain sufficient accuracy. The calibration process is
usually performed by comparing the sensor’s output with that of a reference sensor
at a number of known temperatures. Since both sensors need to reach thermal equi-
librium, such thermal calibration can take several tens of seconds. The extra time
required to perform calibration and trimming, however, increases the production
cost, and thus sensors with no calibration or a minimum number of calibration points
are desired. Alternatively, calibration techniques based on electrical measurements
can be developed to simultaneously achieve low cost and good accuracy [14].
The required accuracy of a temperature-sensing node depends on the target
application, ranging from ˙0:1 ı
C for medical [15, 16] to ˙1 ı
C for food and
environmental monitoring applications [17]. The operating temperature range also
depends on the target application, e.g., from 35 to 45 ı
C in medical applications,
from 40 to 85 ı
C in environmental monitoring, and from 40 to 150 ı
C in auto-
motive applications. The actual number of required calibration points then depends
on the type of sensing element, the target accuracy, and the sensor’s operating
temperature range. Clearly, there is a trade-off between the number of required
calibration points (and therefore cost) and the target accuracy for a given application.
Furthermore, in the design of temperature-sensing wireless nodes, the power
and energy efficiency of the co-integrated temperature sensor are key parameters.
Typical CMOS smart sensors suffer from relatively high power consumption, e.g.,
500 A in [3] and 2.2 mA in [5], and/or long conversion time .Tconv/, e.g., 300 ms
in [3] and 1.5 s in [4], which results in high “energy consumption.” Such sensors
are ill suited for use in battery-powered WSNs or active RFID tags as they would
dramatically decrease the battery’s lifetime, and thus are not cost-effective. They
are also not suitable for use in passive RFID tags or WSNs operating based on
energy harvesting or scavenging. This is due to the restricted amount of energy
available in such systems, which either limits the maximum communication range
or requires a larger antenna or energy storing element, e.g., a capacitor, or calls for
using energy harvesters. Moreover, the power received at a passive RFID tag falls
off as the square of the distance. Therefore, there is a trade-off between the sensor’s
energy consumption on the one hand, and the operating range, size, and cost of the
sensor node on the other hand. This implies that energy-efficient sensors, i.e., low-
power (e.g., a few W) sensors with fast conversion times are essential for wireless
temperature sensing applications.
Temperature sensors for wireless sensing were introduced prior to the start of
this research [17, 18]. The design in [17] presents a temperature sensor, which](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-24-320.jpg)
![6 1 Introduction
is embedded into a passive-RFID tag. The tag dissipates 10 A to operate and
requires a conversion time of 510 ms. It achieves an inaccuracy of ˙2:5 ı
C (four
samples) from 0 to 100 ı
C, after a one-point calibration. The read range is limited
to 10–25 cm, depending on the size of the antenna used. The sensor in [18] is
quite power-efficient, dissipating 220 nW from a 1 V supply. However, it requires a
conversion time of 100 ms to obtain a resolution of 0:1 ı
C. Furthermore, it requires
a two-point calibration to achieve an inaccuracy of 1:6 ı
C=C3 ı
C (five samples)
from 0 to 100 ı
C. In 2010, a sensor was presented which dissipates 100 nW, and
achieves a resolution of 35 mK in a conversion time of 100 ms [16]. It also achieves
an inaccuracy of ˙0:1 ı
C (three samples), over a range from 35 to 45 ı
C, but only
after a two-point calibration. Recently, another temperature sensor embedded into
a passive RFID tag has been presented [19]. The sensor dissipates 350 nA from a
1 V supply. After a one-point calibration, it achieves an inaccuracy of ˙1:5 ı
C .3/
from 30 to 60 ı
C. In a conversion time of 14.5 ms, it obtains a resolution of 0:3 ı
C.
As can be seen, most of these low power/energy sensors suffer from poor accuracy,
even after calibration.
In this thesis, we will focus on the design of low-cost, accurate, and energy-
efficient CMOS temperature sensors. To understand the existing design trade-offs,
we will first review various CMOS-compatible sensing elements from the perspec-
tives of accuracy and energy efficiency, which will be presented in the following
section. A general figure-of-merit (FoM) will then be presented, which will facilitate
comparisons between the energy efficiency of different types of sensors. Lastly, a
short survey of the state of the art in 2009 will be provided, which enables us to
evaluate the state of the art at the start of this research.
1.3 CMOS-Compatible Sensing Elements
In CMOS technology, the temperature dependence of several different circuit
elements can be used for temperature sensing. The correct choice of sensing
element, however, is not trivial and depends on the requirements of the target
application, such as accuracy, resolution, power consumption, conversion time,
operating supply voltage range, operating temperature range, and power supply
rejection ratio (PSRR). In the following, various CMOS-compatible sensing
elements are briefly introduced and then investigated based on some of the
aforementioned requirements.
1.3.1 Bipolar Junction Transistors (BJTs)
In CMOS technology, the same diffusions normally used to realize MOSFETs can
be used to realize parasitic vertical bipolar junction transistors (BJTs). While smart
temperature sensors based on lateral PNP transistors have been realized [20, 21],](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-25-320.jpg)
![1.3 CMOS-Compatible Sensing Elements 7
N+ N+
P+
Deep N-Well
P-Well
P+
B E
C
P+ P+
N+
N-Well
B E
(a) (b)
Fig. 1.5 (a) Cross section of vertical PNP transistors in standard CMOS; (b) cross section of
vertical NPN transistors in modern CMOS technology supporting deep N-well
nowadays vertical PNP transistors are preferred due to their lower sensitivity to
process spread and packaging stress [22, 23]. Such parasitic vertical PNPs, however,
usually offer limited implementation flexibility, collector is formed inside the P-
substrate, and thus, is not directly accessible (see Fig. 1.5a). In modern CMOS
technologies with twin well or deep N-Well options, vertical NPN transistors are
also available as shown in Fig. 1.5b. They exhibit significantly larger current gain
than PNPs, e.g., ˇF D 24 (NPNs) versus ˇF D 4 (PNPs) in a TSMC 0:18 m
CMOS technology. NPNs also offer more circuit design flexibility, since their
collector terminals are accessible.
The base-emitter voltage VBE of a BJT can be expressed as follows:
VBE
kT
q
ln
IC
IS
C 1
; (1.1)
where k, T, and q denote the Boltzmann constant .1:381023
J/K), the temperature
in Kelvin, and the electron charge .1:6 1019
C), respectively. The parameter IS
denotes the saturation current of the bipolar transistor. It can be shown that VBE
exhibits complementary-to-absolute temperature (CTAT) behavior with a slope of
2 mV=ı
C [2]. However, if two BJTs are biased at different collector current
densities with a ratio p, the difference VBE D VBE2 VBE1 will be a proportional-
to-absolute temperature (PTAT) voltage with a temperature coefficient that depends
on the constants k=q and the ratio p [2]. The well-defined temperature dependency
of VBE and VBE makes BJTs attractive for use in CMOS temperature sensors
and bandgap voltage references. In fact, BJT-based temperature sensors have been
widely used in the industry for decades [3–7]. The reasons for this are as follows: for
a properly designed sensor, the dominant source of inaccuracy is the process spread
in VBE, which has been shown to have a PTAT profile [2], and thus can be corrected
by means of a cost-effective one-point PTAT trim, e.g., ˙0:5 ı
C .3/ from 50 to
120 ı
C in [24] and ˙0:1 ı
C .3/ from 55 to 125 ı
C in [25]. Another advantage is
that the necessary temperature dependent and reference voltages are both generated](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-26-320.jpg)
![8 1 Introduction
−60 −40 −20 0 20 40 60 80 100 120
−50
−40
−30
−20
−10
0
10
20
30
40
50
Temperature (°C)
Resistance
Variations
(%)
N−Well
N−Poly
P−PolyLow
P−PolyHigh
Fig. 1.6 Temperature dependency of some types of resistors available in a TSMC 0:18 m
process. Resistance variations are normalized to the value at 25 ı
C
from the same circuit, which significantly simplifies the implementation. They
require bias currents in the range of A or even sub-A to operate, and exhibit low
supply dependency, usually a few tenths of degrees Celsius per Volt, e.g., 0:5 ı
C/V
in [24] and 0:1 ı
C/V in [25].
1.3.2 Resistors
Resistance temperature detectors (RTDs) have been widely used as stand-alone
temperature sensing elements. Temperature information is obtained by reading out
resistance variations as a function of temperature, implying that a large temperature-
coefficient is often desired. As it turns out, most CMOS-compatible resistors exhibit
significant temperature coefficients, with 1st-order coefficients ranging between
0.1%/ı
C and 0.4%/ı
C, depending on the resistor type. Figure 1.6 shows the
simulated temperature dependency of some of the resistors available in the TSMC
0:18 m CMOS process. The variations are normalized to the resistance at 25 ı
C.
The temperature coefficient of +0.4%/ı
C exhibited by a typical N-Well or N-Poly
resistor means that its resistance will increase by about 72% over the temperature
range from 55 to 125 ı
C, which is reasonably large sensitivity. In such resistor-
based sensors, the minimum supply voltage is usually limited by the readout circuit,
thus enabling low supply voltages. The value of the bias current is defined by
thermal-noise and area constraints.
A drawback of resistors as temperature sensing elements is the fact that the
spread of most resistances in CMOS is in the range of 15–20% across the process](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-27-320.jpg)
![1.3 CMOS-Compatible Sensing Elements 9
corners. Their temperature coefficients also suffer from process spread and higher
order nonlinear terms, as can be noticed from Fig. 1.6. As a result, resistors usually
require a costly multiple-temperature calibration to achieve decent accuracy, where
the number of calibration points could range between 3 and 5, depending on the
target accuracy. The work presented in [26] and [27], for example, both achieve
an inaccuracy of ˙0:15 ı
C .3/ from 55 to 85 ı
C, but only after a costly three-
temperature trim. Employing a single temperature trim, the work in [28] achieves
an inaccuracy of ˙1 ı
C .3/ from 45 to 125 ı
C, which is among the best reported
for similarly trimmed resistor-based sensors.
1.3.3 Electro-Thermal Filters (ETFs)
The thermal diffusivity of silicon D is defined as the rate at which heat diffuses
through a silicon substrate. Recent research has shown that D is a well-defined
parameter, as the silicon used for IC fabrication is highly pure [29]. Furthermore, D
is strongly temperature dependent and can be approximated by a power law: D /
1=T1:8
[30–32]. This well-defined temperature dependency can thus be exploited
to realize temperature sensors. Figure 1.7 shows the structure of an electro-thermal
filter (ETF), which uses a heater to generate heat pulses, and a (relative) temperature
sensor (thermopile), fabricated at a distance s from the heater, which converts the
received temperature variations into a small voltage signal. In the thermal domain,
an ETF behaves like a low-pass filter. Driving such a filter at a given excitation
frequency results in a temperature-dependent phase-shift [32, 33]:
ETF / .s
p
fref/Tn=2
; (1.2)
where n 1:8. A phase-domain ADC can then be used to digitize ETF and
obtain temperature in digital format [33]. Figure 1.8 shows the phase-shift ETF
versus temperature for a typical ETF. As shown, and is also clear from the above
expression, ETF is slightly nonlinear with temperature, which calls for linearization
in the digital domain.
Since an ETF requires heat pulses to operate, it is naturally ill suited to low-power
applications, e.g., the ETF-based sensor presented in [33] requires 5 mW to operate.
However, decent accuracies can be obtained without trimming, and only based on
batch-calibration of sensors, e.g., ˙0:5 ı
C .3/ from 55 to 125 ı
C in 0:7 m
Fig. 1.7 Cross section of an
electro-thermal filter (ETF)
consisting of a heater and a
temperature sensor
(thermopile) at a distance s
formed in the silicon substrate](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-28-320.jpg)
![10 1 Introduction
Fig. 1.8 Phase shift of an
electro-thermal filter (ETF) as
a function of temperature [33]
CMOS process [33], and even ˙0:2 ı
C .3/ in 0:18 m CMOS [34]. This is due to
the fact that the accuracy of ETF-based sensors depends on that of the lithography
that realizes the distance s, and is thus expected to scale with every CMOS process
node. This makes such sensors quite promising in applications where uncalibrated
accuracy is critical, while their relatively large power consumption can be tolerated,
e.g., in the thermal management of microprocessors.
1.3.4 MOSFETs
When biased in the sub-threshold region, the drain current ID and the gate-
source voltage VGS of a MOSFET exhibit a temperature-dependent exponential
relationship, similar to that between the collector current IC and VBE of a BJT [35]:
Ibulk
D /
W
L
exp
h q
mkT
.VGS Vbulk
T /
i
; (1.3)
where k is the Boltzmann’s constant, T is the absolute temperature, and q is
the electron charge, and W and L represent the width and length of the device,
respectively. The parameter m D 1 C CD=COX, is the body effect coefficient,
where CD and COX are the depletion-layer and gate-oxide capacitances, respectively
[35]. Similar exponential relationships between Eqs. (1.1) and (1.3) suggest that
MOSFETS can replace BJTs as temperature sensing elements [36]. Compared to
BJTs, however, the gate-source voltage VGS of a MOSFET biased in sub-threshold
is substantially smaller and can be controlled by sizing W and/or L. This, in turn,
offers a potential advantage for low supply voltage operation. However, the oxide
capacitance COX suffers from process spread, while the threshold voltage Vbulk
T
also varies due to the body-effect and suffers from the process spread as well.
In consequence, MOSFET-based sensors suffer from the process spread of two
different parameters, which, in turn, results in greater inaccuracies when compared
to equally one-point calibrated BJTs. Therefore, MOSFET-based sensors often](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-29-320.jpg)
![1.3 CMOS-Compatible Sensing Elements 11
Start
Stop
Out
Clock
counter
Trigger
Trigger
Stop
Out 0 123 ∙∙∙ N N 0
Tdelay = f ( μ,VT,VDD)
Fig. 1.9 Block diagram of a MOSFET-based temperature sensor based on inverter delay
require two-temperature calibration to meet the accuracy requirements of most of
the applications.
The propagation delay of a CMOS inverter chain, or alternatively, the frequency
of a ring oscillator, can also be used as a measure of temperature [37]. Figure 1.9
shows the operating principle of such sensors, where a counter is used to measure
the propagation delay through a chain of inverters. The average propagation delay
TP of an inverter composed of balanced PMOS and NMOS devices can be expressed
as [37]:
TP D
.L=W/CL
COX.VDD VT/
ln
3VDD 4VT
VDD
; (1.4)
in which the mobility and VT are temperature-dependent parameters. Assuming
VDD VT, then TP will depend on temperature mainly through . This assumption,
however, becomes less and less valid in the modern CMOS processes with reduced
supply voltages. Besides, TP suffers from the process spread in VT and from the
variations in VDD as well. In consequence, such sensors usually require two-point
calibration and suffer from a poor power supply sensitivity, usually in the range of
several degrees Celsius per Volt, e.g., 10 ı
C/V in [38]. This is about two orders of
magnitude worse than typical BJT-based sensors and is prohibitively large for most
of the applications. Therefore, in practice, such sensors should be used with voltage
regulators, which calls for extra area and power consumption.
1.3.5 Dynamic Threshold MOSFETs (DTMOSTs)
Consider a standard MOSFET biased in sub-threshold region, with the gate and bulk
terminals tied together, as shown in Fig. 1.10. This connection fixes the width of the
depletion layer under the channel, thereby causing the threshold voltage to vary
dynamically, hence the name dynamic-threshold MOST (DTMOST). As a result,
the drain current IDT
D of a DTMOS transistor operated in the sub-threshold region
can be expressed as follows [39]:](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-30-320.jpg)
![12 1 Introduction
Fig. 1.10 A P-type
DTMOST diode; cross
section view (a), symbol
view (b)
VGS
D1
I1
Poly Si
p+ p+
n-well
G
S D
substrate
B
)
b
(
)
a
(
Fig. 1.11 Subthreshold
characteristics of a bulk
PMOS device operated in
both “bulk” and “DTMOST”
modes, measured at room
temperature [39]
IDT
D /
W
L
exp
h q
kT
.VGS VDT
T /
i
; (1.5)
The key observation is that the gate-body connection ensures that the threshold
voltage VDT
T of a DTMOS transistor is well defined. As a result, a diode-connected
DTMOST, i.e., a DTMOS diode exhibits a near-ideal exponential relationship
between IDT
D and VGS, which is less dependent on COX and CD [35, 39]. Figure 1.11
compares the sub-threshold characteristics of a bulk PMOST operated in both bulk
mode (gate and substrate electrically isolated) and DTMOST mode. As shown,
a DTMOST configuration would result in a steeper sub-threshold slope, lowered
threshold voltage, and thus higher ID, when compared to the bulk configuration for
the same device.
More importantly, unlike the bulk configuration, the sub-threshold slope in the
DTMOST configuration is well defined and is less dependent on device-related
parameters, as can be also seen from Eq. (1.5). In other words, the process spread
of VGS in the DTMOST configuration is less than that of the bulk configuration
[39, 40]. This would suggest that similar to BJTs, DTMOSTs can be effectively
calibrated at a single temperature, while offering the low-voltage capability of
MOSFETs.](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-31-320.jpg)
![1.4 Energy Efficiency and Resolution FoM 13
1.4 Energy Efficiency and Resolution FoM
Given the variety of smart temperature sensors in standard CMOS, devising a
single figure of merit (FoM) to assess their energy efficiency performance would
be very useful. As shown in Fig. 1.1, a smart temperature sensor typically consists
of an ADC that digitizes the sensor’s front-end output: usually a small signal
contaminated by the thermal-noise. Moreover, the resolution of an optimally
designed ADC is limited by thermal- rather than quantization-noise. This would
suggest that as for general-purpose ADCs [41], a resolution figure-of-merit (FoM)
involving the energy per conversion and resolution could be defined as follows [42]:
FoM D Econv Resolution2
; (1.6)
where Econv is the amount of energy dissipated per conversion. It should be noted
that in the context of smart temperature sensors, other figures of merit involving
the sensor’s accuracy might also be useful. However, this is complicated by the fact
that various sensors employ different numbers of calibration points, making a fair
comparison rather difficult.
Figure 1.12 shows the energy per conversion versus the resolution of several
smart temperature sensors, published prior to the start of this research (in 2009). It
can be seen that the resolution FoM defines a line that usefully bounds the state of
the art, as would be expected for thermal-noise limited converters.
10
−4
10
−3
10
−2
10
−1
10
0
10
−2
10
0
10
2
10
4
10
6
10
8
Resolution (°C)
Energy/Conversion
[nJ]
BJT
MOS
TD
1nJ°C (2009)
2
10pJ°C2
Fig. 1.12 Energy per conversion versus the resolution of several smart temperature sensors,
published prior to the start of this research (in 2009) [42]. Note that no resistor-based sensors
were published before 2009](https://image.slidesharecdn.com/25491-250615170044-c2241592/85/Energy-Efficient-Smart-Temperature-Sensors-in-CMOS-Technology-1st-Edition-Kamran-Souri-32-320.jpg)
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Energy-Efficient Smart Temperature Sensors in CMOS Technology 1st Edition Kamran Souri
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- 4. ACSP · Analog Circuits And Signal Processing Kamran Souri Kofi A.A. Makinwa Energy- Efficient Smart Temperature Sensors in CMOS Technology
- 5. Analog Circuits and Signal Processing Series Editors: Mohammed Ismail, Dublin, USA Mohamad Sawan, Montreal, Canada
- 6. The Analog Circuits and Signal Processing book series, formerly known as the Kluwer International Series in Engineering and Computer Science, is a high level academic and professional series publishing research on the design and applications of analog integrated circuits and signal processing circuits and systems. Typically per year we publish between 5–15 research monographs, professional books, handbooks, edited volumes and textbooks with worldwide distribution to engineers, researchers, educators, and libraries. The book series promotes and expedites the dissemination of new research results and tutorial views in the analog field. There is an exciting and large volume of research activity in the field worldwide. Researchers are striving to bridge the gap between classical analog work and recent advances in very large scale integration (VLSI) technologies with improved analog capabilities. Analog VLSI has been recognized as a major technology for future information processing. Analog work is showing signs of dramatic changes with emphasis on interdisciplinary research efforts combining device/circuit/technology issues. Consequently, new design concepts, strategies and design tools are being unveiled. Topics of interest include: Analog Interface Circuits and Systems; Data converters; Active-RC, switched-capacitor and continuous-time integrated filters; Mixed analog/digital VLSI; Simulation and modeling, mixed-mode simulation; Analog nonlinear and computational circuits and signal processing; Analog Artificial Neural Networks/Artificial Intelligence; Current-mode Signal Processing; Computer-Aided Design (CAD) tools; Analog Design in emerging technologies (Scalable CMOS, BiCMOS, GaAs, heterojunction and floating gate technologies, etc.); Analog Design for Test; Integrated sensors and actuators; Analog Design Automation/Knowledge-based Systems; Analog VLSI cell libraries; Analog product development; RF Front ends, Wireless communications and Microwave Circuits; Analog behavioral modeling, Analog HDL. More information about this series at http://www.springer.com/series/7381
- 7. Kamran Souri • Kofi A.A. Makinwa Energy-Efficient Smart Temperature Sensors in CMOS Technology 123
- 8. Kamran Souri SiTime Corp. Santa Clara, CA, USA Kofi A.A. Makinwa Delft University of Technology Delft, The Netherlands ISSN 1872-082X ISSN 2197-1854 (electronic) Analog Circuits and Signal Processing ISBN 978-3-319-62306-1 ISBN 978-3-319-62307-8 (eBook) DOI 10.1007/978-3-319-62307-8 Library of Congress Control Number: 2017945353 © Springer International Publishing AG 2018 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations. Printed on acid-free paper This Springer imprint is published by Springer Nature The registered company is Springer International Publishing AG The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland
- 9. Acknowledgments This thesis is the result of my Ph.D. study at the Electronic Instrumentation Laboratory of Delft University of Technology. In a period of about four and half years, I had the chance to experience a productive and enjoyable time in a friendly and encouraging group. In this page, I would like to dedicate my sincere gratitude to all of those who helped and supported me during the past several years. I would like to start by thanking my supervisor, Kofi Makinwa, for his continuous encouragement, guidance, and support. In particular, I very much enjoyed our informal brainstorming chats, which resulted in many fruitful ideas and created a clear, solid path forward during my Ph.D. study. Thank you Kofi for trusting me and introducing me to the field of precision analog circuit design. I am also very grateful to Youngcheol Chae for his friendship and technical advice, and I wish him great success with his academic career. Although I didn’t get a chance to work with Michiel Pertijs in person, I would like to take the opportunity to appreciate his work on the precision smart temperature sensors, which formed a solid foundation for my research. This thesis would not have been possible without the help and support of different people at various branches of NXP Semiconductors. In particular, I must thank Frank Thus (now with Broadcom), Hamid Bonakdar, Anton Tombeur, Paul Noten, Jim Caravella (now with Dialog Semiconductors), Jim Spehar, Brad Gunter, Heimo Scheucher, and Youri Ponomarev (now with Analog Devices). I wish to thank all my colleagues and friends at the Electronic Instrumentation Laboratory for providing a friendly and pleasant work environment. I thank Joyce, Zu-Yao, Qinwen, Caspar, Junfeng, Sha Xia, Ugur, Burak, Bahman, Zhichao, Saleh, Navid, Mina, and Arvin. My special thanks go to Mahdi Kashmiri for being a great colleague. I truly enjoyed our never-ending coffee-time discussions, and I would never forget our oven-room moments during the ISSCC submission deadlines. I am very grateful to Morteza Alavi for his friendship and unconditional help with following up various defence-related matters while I was in the United States. My particular thanks also go to my dear friend, Sanaz Saeid, for her friendship and support over the past several years. v
- 10. vi Acknowledgments The burden of writing a Ph.D. thesis becomes unbearable when it is concurrent with relocation and starting a new job. I would like to thank my managers at SiTime, Sassan Tabatabaei and Vinod Menon, for their support and understanding of my situation during this period. I would also like to thank Meisam Roshan for his encouragement. I would also appreciate the help by Saleh Heidary and Vincent van Hoek for proofreading of this thesis. My sincere thanks go to my family and especially to my parents. I appreciate your support and encouragement throughout these years. I am also very grateful to my in-laws for motivating me towards the end of this journey. I must thank my brother Kianoush for his love and ongoing encouragement over the years. I am also indebted to Darioush Keyvani for his continuous support and advice, and for being the first one to introduce me to the field of integrated circuit design. Last but not least, I would like to express my deepest gratitude to my wife, Sara, for her unconditional love and support during my study, and in particular during the thesis writing period. This work would have never been finished without your persistent encouragement. Mountain View, CA, USA Kamran Souri May 2017
- 11. Contents 1 Introduction .................................................................. 1 1.1 Motivation ............................................................... 1 1.2 Challenges in Wireless Sensing ........................................ 5 1.3 CMOS-Compatible Sensing Elements ................................. 6 1.3.1 Bipolar Junction Transistors (BJTs) ........................... 6 1.3.2 Resistors......................................................... 8 1.3.3 Electro-Thermal Filters (ETFs) ................................ 9 1.3.4 MOSFETs ....................................................... 10 1.3.5 Dynamic Threshold MOSFETs (DTMOSTs) ................. 11 1.4 Energy Efficiency and Resolution FoM ................................ 13 1.5 Prior-Art and Choice of Sensing Element ............................. 14 1.6 Thesis Organization ..................................................... 15 References ..................................................................... 16 2 Readout Methods for BJT-Based Temperature Sensors ................. 19 2.1 Introduction ............................................................. 19 2.2 Operating Principle of BJT-Based Sensors ............................ 19 2.2.1 Temperature Characteristics of BJTs .......................... 20 2.3 Generic BJT Readout ................................................... 23 2.3.1 Topology ........................................................ 23 2.3.2 ADC Resolution ................................................ 25 2.4 Energy Efficiency of BJT-Based Sensors .............................. 26 2.4.1 Efficiency Limits of a BJT-Based Front-End .................. 26 2.4.2 Energy Efficiency Gap.......................................... 31 2.4.3 ADC Topology.................................................. 32 2.5 Conclusions ............................................................. 34 References ..................................................................... 35 3 Energy-Efficient BJT Readout ............................................. 37 3.1 Introduction ............................................................. 37 3.2 Proposed Sensor Topology ............................................. 38 3.2.1 ADC’s Resolution Requirement ............................... 40 vii
- 12. viii Contents 3.3 The Zoom-ADC: An Energy-Efficient ADC .......................... 42 3.3.1 Introduction ..................................................... 42 3.3.2 Topology ........................................................ 42 3.3.3 Coarse Converter................................................ 42 3.3.4 Fine Converter .................................................. 44 3.3.5 System-Level Considerations .................................. 46 3.3.5.1 Redundancy and Guard-Banding .................... 46 3.3.5.2 Number of Cycles .................................... 48 3.3.5.3 Signal Swing.......................................... 49 3.3.5.4 Integrator Gain ....................................... 51 3.3.5.5 DAC Mismatch ....................................... 52 3.4 Curve Fitting and Trimming ............................................ 53 3.5 Conclusions ............................................................. 57 References ..................................................................... 58 4 BJT-Based, Energy-Efficient Temperature Sensors ...................... 59 4.1 A Micropower Temperature Sensor .................................... 59 4.1.1 Analog Front-End............................................... 60 4.1.1.1 Topology .............................................. 60 4.1.1.2 Effect of Forward Current Gain ˇF .................. 61 4.1.1.3 Offset Cancellation ................................... 62 4.1.1.4 Opamp Topology ..................................... 62 4.1.1.5 Precision Issues....................................... 63 4.1.2 Zoom ADC...................................................... 64 4.1.2.1 Topology .............................................. 64 4.1.2.2 Implementation ....................................... 64 4.1.3 Measurement Results ........................................... 67 4.2 An Energy-Efficient Temperature Sensor .............................. 69 4.2.1 Improving Energy Efficiency................................... 70 4.2.2 An Energy-Efficient Integration Scheme ...................... 71 4.2.3 Implementation ................................................. 72 4.2.3.1 Circuit Diagrams ..................................... 72 4.2.3.2 Precision Techniques ................................. 73 4.2.4 Realization and Measurements................................. 75 4.2.5 Thermal Calibration ............................................ 76 4.2.6 Voltage Calibration ............................................. 76 4.2.7 Batch-to-Batch Spread and Plastic Packaging................. 78 4.2.8 Noise and ADC Characteristics ................................ 79 4.2.9 Comparison to Previous Work ................................. 80 4.3 Sensing High Temperatures ............................................ 81 4.3.1 Analog Front-End............................................... 82 4.3.2 ADC Design .................................................... 84 4.3.3 Measurement Results ........................................... 85 4.4 Conclusions ............................................................. 87 References ..................................................................... 88
- 13. Contents ix 5 All-CMOS Precision Temperature Sensors ............................... 91 5.1 DTMOSTs as Sensing Element ........................................ 92 5.1.1 Operating Principle ............................................. 92 5.1.2 Temperature Sensor Design .................................... 93 5.1.3 Measurement Results ........................................... 94 5.2 A Sub-1V All-CMOS Temperature Sensor ............................ 97 5.2.1 Sensor Front-End ............................................... 98 5.2.2 Accuracy Issues ................................................. 99 5.2.3 System Diagram ................................................ 100 5.2.4 Power Domains ................................................. 100 5.2.5 Inverter-Based Zoom ADC..................................... 102 5.2.6 Prototype and Measurement Results........................... 104 5.3 Conclusions ............................................................. 107 References ..................................................................... 107 6 Conclusions ................................................................... 109 6.1 Main Findings ........................................................... 109 6.2 Other Applications of This Work....................................... 111 6.3 Future Work ............................................................. 112 References ..................................................................... 113 Index............................................................................... 115
- 14. About the Authors Kamran Souri was born in Tabriz, Iran, in 1980. He received his B.Sc. in Elec- tronics and M.Sc. in Telecommunication Systems from Amirkabir University of Technology, Iran, in 2001 and 2004, respectively. In Sept. 2007, he joined the Electronic Instrumentation Laboratory (EI-Lab), TU-Delft, where he received his M.Sc. degree (cum laude) in Micro-electronics in 2009 and Ph.D. degree in 2016 for his research on energy-efficient smart temperature sensors in CMOS technology. From 2001 to 2007, he worked at PSP-Ltd, Tehran, Iran, designing embedded systems for use in high-quality audio/video systems and KVM switches. From 2008 to 2009, he was an intern at NXP Semiconductors, Eindhoven, designing energy- efficient temperature sensors for use in RFID tags. Since 2014, he has been with SiTime Corp., Santa Clara, United States, where he is currently a Principal Circuit Design Engineer, focusing on the design of MEMS-based oscillators. Dr. Souri was the recipient of the IEEE Solid-State Circuits Society Predoctoral Achievement Award in 2013. He has also served as the technical reviewer for several journals in the field, among them the IEEE Journal of Solid-State Circuits (JSSC), Analog Integrated Circuits and Signal Processing (AICSP), and the IEEE Transactions on Circuits and Systems (TCAS). Kofi A.A. Makinwa received his B.Sc. and M.Sc. degrees from Obafemi Awolowo University, Nigeria, in 1985 and 1988, respectively. In 1989, he received an M.E.E. degree from the Philips International Institute, the Netherlands, and in 2004, a Ph.D. degree from Delft University of Technology, the Netherlands. From 1989 to 1999, he was a Research Scientist with Philips Research Lab- oratories, Eindhoven, the Netherlands, where he worked on interactive displays and digital recording systems. In 1999, he joined Delft University of Technology, where he is currently an Antoni van Leeuwenhoek Professor and Head of the Microelectronics Department. His main research interests are in the design of precision mixed-signal circuits, sigma-delta modulators, smart sensors, and sensor interfaces. This has resulted in 12 books, 25 patents, and over 200 technical papers. xi
- 15. xii About the Authors Kofi Makinwa is the Analog Subcommittee Chair of the International Solid- State Circuits Conference (ISSCC). He is also on the program committees of the VLSI Symposium, the European Solid-State Circuits Conference (ESSCIRC), and the Advances in Analog Circuit Design (AACD) workshop. He has been a guest editor of the Journal of Solid-State Circuits (JSSC) and a distinguished lecturer of the IEEE Solid-State Circuits Society. For his doctoral research, he was awarded the 2005 Simon Stevin Gezel Award from the Dutch Technology Foundation. He is a co- recipient of 14 best paper awards, from the JSSC, ISSCC, VLSI, and Transducers, among others. At the 60th anniversary of ISSCC he was recognized as a top-10 contributor. He is an IEEE Fellow, an alumnus of the Young Academy of the Royal Netherlands Academy of Arts and Sciences, and an elected member of the IEEE Solid-State Circuits Society AdCom, the society’s governing board.
- 16. Summary Nowadays, smart temperature sensors, i.e., sensors with digital outputs, are widely used in various systems. Integrating smart sensors into wireless systems such as RFID tags or wireless sensor networks (WSNs) enables wireless temperature sens- ing, which in turn opens up a wide range of new applications. This thesis describes the requirements, design, and implementation of smart temperature sensors for use in wireless temperature sensing. In Chap. 1, an introduction to wireless temperature sensing and its requirements is given. Typically, a wireless node is either powered by a battery or scavenges its energy from the environment, e.g., from an external RF magnetic field. Due to the limited amount of energy available, energy efficiency of the integrated sensor restricts either the battery’s lifetime or the operating range of the wireless node. On the other hand, mass production imposes stringent requirements on the cost, which calls for CMOS-compatible sensors. To obtain sufficient accuracy, however, CMOS sensors often require time-consuming (and thus costly) calibration: a process in which the sensor’s output is compared with that of a reference sensor at a number of known temperatures. The information obtained during calibration is then used to trim the sensor, thereby improving its accuracy. A short survey of various CMOS compatible choices is presented. It is shown that substrate PNPs are suitable candidates for wireless temperature sensing. They are power-efficient and exhibit a well-defined process spread, which can be effectively trimmed at a single temperature. However, they require supply voltages greater than 1.2 V, making them ill suited for low-voltage applications and nano-scale CMOS processes. A promising alternative is to bias a MOSFET in the subthreshold region, while its body and gate terminals are shorted. This so-called DTMOST configuration enables sub-1V operation while exhibiting less spread when compared to the bulk configuration. Finally, to facilitate the comparison between energy efficiency of various temperature sensors, a single figure of merit (FoM) is presented. In Chap. 2, the operating principle of BJT-based smart temperature sensors is presented. Using the parasitic BJTs available in CMOS, a complementary- to-absolute-temperature (CTAT) voltage VBE and a proportional-to-absolute- temperature (PTAT) voltage VBE can be generated. By properly scaling VBE xiii
- 17. xiv Summary (with a scalar ˛) and combining it with VBE, a reference voltage VREF can then be obtained. In a generic BJT readout, the ratio of ˛ VBE and VREF is digitized by means of an analog-to-digital converter (ADC) to generate a PTAT ratio . The resolution requirement of the ADC is also discussed. It is shown that almost 2 3 of the ADS’s dynamic range is wasted with this approach. To identify the energy efficiency of existing sensors prior to the start of this research, a study of energy efficiency limits in BJT-based sensors is presented. In this analysis, the ultimate energy efficiency of a BJT-based sensor front-end is calculated and the theoretical limits are defined. Two different approaches based on bias-current and emitter-area scaling are considered. Based on this analysis, a significant energy-efficiency gap, over four orders of magnitude, is observed between the prior-art and theoretical limits. The study of various sensor architectures reveals that, in fact, the reason behind this gap lies in the employed readout circuits, which mostly include †- or SAR-ADCs. They either suffer from long conversion times and poor power efficiency, or are not capable of providing the target resolution or accuracy. To bridge this efficiency gap, a new readout architecture is clearly required. In Chap. 3, different BJT-based sensor architectures based on digitizing nonlinear ratios between VBE and VBE (or their combinations) are explored. The required linearization to calculate the PTAT ratio is then performed in the digital back-end. Since the coefficient ˛ is digitally implemented, it can also be used for trimming. The employed ADC architectures in these examples, however, often result in more waste of dynamic range than in the generic approach, exacerbating the lack of energy efficiency. To address this issue, a new readout topology based on digitizing the ratio X D VBE=VBE is proposed. Since temperature changes are rather slow, the ratio X is accurately digitized by a two-step zoom-ADC. As X is typically greater than one, it can be expressed as X D n C 0 , where n and 0 correspond to the integer and fractional parts, respectively. First, a full-range SAR conversion obtains the integer n by performing a binary search algorithm, comparing VBE to integer multiples of VBE. This is then followed by a low-range fine † converter, whose references are set to n and n C 1. In this manner, the ratio 0 can be accurately digitized with high resolution. In contrast to the conventional †-ADCs, the full- scale range of the fine converter in the zoom-ADC is considerably reduced, which notably relaxes various key requirements such as the number of †-cycles and the DC gain and swing of the loop filter. In this architecture, both conversion time and power efficiency can be improved, which results in a substantial improvement in energy efficiency. The fact that dynamic correction techniques can be used in the fine conversion phase ensures that the accuracy of the zoom-ADC can be as good as that of conventional †-ADC architectures. In Chap. 4, a low-power BJT-based sensor prototype based on a 1st-order switched-capacitor (SC) zoom-ADC is presented. It achieves a resolution of 15 mK in a conversion time of 100 ms while dissipating only 4.6 A. After a single ˛-trim at 25 ı C, the sensor obtains an inaccuracy of ˙0.2 ı C (3) from 30 to 125 ı C. This result shows 11 energy efficiency improvement when compared to sensors with similar accuracy, back in 2011. However, its fine conversion step employs a slow, 1st-order † modulator, limiting its energy efficiency. Moreover, each
- 18. Summary xv † cycle requires two full clock periods, since VBE and VBE are separately sampled/integrated. To further improve the sensor’s energy efficiency, a second prototype is realized which achieves similar resolution in about 16 less conversion time, while drawing 25% less supply current. This is achieved by using a 2nd-order zoom-ADC, combined with a new charge-balancing scheme, whose operation is based on simultaneous sampling of VBE and VBE. This allows the use of low- swing, low-power amplifiers. The sensor’s energy efficiency is therefore improved by over 20 compared to the first prototype. Using a thermal calibration and digital PTAT trimming at 30 ı C, the sensor achieves an inaccuracy of ˙0.15 ı C (3) from 55 to 125 ı C. Moreover, a voltage calibration technique based on electrical measurements is also explored, which is significantly faster (only requires 200 ms), while achieving comparable accuracy. The impact of batch-to-batch spread and plastic packaging on sensor’s accuracy is investigated as well. As observed, both of them can cause temperature reading shifts in the order of 0.4–0.5 ı C from 55 to 125 ı C. In the last part of Chap. 4, a BJT-based sensor prototype for sensing high temperatures (150 ı C) is also demonstrated. It is shown that by optimizing the emitter area and bias current of a substrate PNP, the impact of saturation current IS at high temperatures can be mitigated. Furthermore, robust circuit techniques are employed to cope with the various leakage currents at such temperatures, which would otherwise impact the accuracy of VBE and VBE, and thus the sensor output. It achieves an inaccuracy of ˙0.4 ı C (3) from 55 to 200 ı C, which is similar to that of state-of-the-art sensors capable of operating over such temperature ranges. However, it draws only 22 A, which is more than an order of magnitude less. In Chap. 5, the use of DTMOSTs as temperature sensing elements is demon- strated. When operated in weak inversion, the gate-source voltage VGS of a DTMOST is almost half of the base-emitter voltage VBE, thus enabling sub- 1V operations. Moreover, compared to a diode-connected MOSFET, the VGS–ID characteristic of a diode-connected DTMOST is less sensitive to the spread in threshold voltage VT, making it a promising candidate for realizing accurate temperature sensors. Two sensor prototypes based on such sensing elements are demonstrated in a chosen 160 nm CMOS process. After a single-temperature trim, the first prototype achieves an inaccuracy of ˙0.4 ı C (3) from 55 to 125 ı C, and enables an apples-to-apples comparison with BJTs, proving that DTMOSTs are indeed only a factor 2 less accurate. In the second prototype, the low-voltage capability of DTMOSTs is then exploited to realize a sub-1V, sub-W precision sensor. Employing fully inverter-based SC integrators, a 2nd-order zoom-ADC is realized in the second prototype. It can operate at supply voltages as low as 0.85 V, while drawing only 700 nA. It also maintains the same inaccuracy of ˙0.4 ı C (3) from 40 to 125 ı C, after a single-temperature trim. These results prove that DTMOSTs could be considered as the temperature sensors of choice when sub-1V, high accuracy, and energy efficiency are key requirements. In Chap. 6, the main findings of this work are summarized. These include the development of the zoom-ADC and its application in energy-efficient smart temperature sensors. The final prototype BJT-based sensor achieved a resolution
- 19. xvi Summary FoM of 11 pJ ı C2 and improved state of the art by a factor of 15 (in 2012). Another key finding was the fact that DTMOST sensors enable low-voltage operations while being only 2 less accurate than BJT-based sensors. The final prototype achieved a fairly good energy efficiency, evidenced by a FoM of 14 pJ ı C2 . The chapter also contains some suggestions for future work: to further improve the energy efficiency, continuous-time (CT) readouts could be considered as promising alternatives to the switched-capacitor circuits. Furthermore, to reduce the cost of over-temperature characterizations, a combination of voltage calibration with integrated heaters could be used to quickly extract the global calibration parameters. Another alternative could be to exploit the high accuracy of thermal-diffusivity (TD) sensors as on-die references during the calibration process. The chapter ends with a discussion of the potential use of the zoom-ADC technique to realize general-purpose ADCs with high energy efficiency.
- 20. Chapter 1 Introduction Temperature is the most often-measured environmental quantity [1]. This is because nearly all physical, chemical, mechanical, and biological systems exhibit some sort of temperature dependence. Temperature measurement and control are therefore critical tasks in many applications. Traditionally, temperature sensors have been implemented with discrete components such as resistance temperature detectors (RTDs), thermistors, or thermocouples. In the last three decades, integrated tem- perature sensors, particularly in CMOS technology, have become a promising alternative. A sustained research effort has been devoted to the development of compact, low-cost temperature sensors with co-integrated readout circuitry, thus providing temperature information in a digital format. Such smart temperature sensors (see Fig. 1.1) are conventional products nowadays [3–7]. There are several advantages associated with smart sensors; firstly, since a digital output is almost mandatory in modern systems, no external analog-to-digital converter (ADC) is required. This higher level of integration reduces component count, and therefore size and, typically, cost. Secondly, in contrast to digital signals, analog signals are prone to interference and thus are not well suited for accurately transmitting data to other blocks in a system. Lastly, by integrating the readout circuit and the sensor on the same chip, on-chip digital post-processing becomes possible, which usually results in simpler systems. 1.1 Motivation Smart temperature sensors have been around for many years. However, with the recent development of low-power radio systems, wireless temperature sensing has become very attractive, as it opens up a wide variety of new applications. One can think of applications in cold supply chains, monitoring of perishable goods, animal husbandry and agriculture, automotive, building automation, and healthcare. © Springer International Publishing AG 2018 K. Souri, K.A.A. Makinwa, Energy-Efficient Smart Temperature Sensors in CMOS Technology, Analog Circuits and Signal Processing, DOI 10.1007/978-3-319-62307-8_1 1
- 21. 2 1 Introduction Fig. 1.1 Block diagram of an integrated smart temperature sensor [2] smart temperature sensor sensor front-end ADC digital interface digital temperature reading temperature Remote Sensor Clustering Node, Intermediate Processing Node Remote Sensor Remote Sensor Wireless Link Final Processing Node Wireless Link Sensor Field Single-hop Multi-hops Fig. 1.2 A typical wireless sensor network (WSN) arrangement [8] Wireless sensor networks (WSNs), which consist of spatially distributed sensor nodes with a wireless communication infrastructure, were introduced in the 2000s [8]. Various physical or environmental quantities such as temperature, sound, humidity, motion, and pressure can be sensed and digitized by the sensor nodes. The digitized signals are then passed through the communication network towards a centralized or distributed control unit for further processing, as shown in Fig. 1.2. As the name WSN suggests, and mainly due to cost reasons and ease of integration, wireless operation is a key feature, which at the same time makes powering the sensor nodes a challenging task. Most WSNs have used battery-powered sensors nodes, while quite recently, nodes based on energy harvesting or scavenging have also been introduced [9].
- 22. 1.1 Motivation 3 s r a l l o D . S . U n o i l l i B n i e z i S t e k r a M 2010 2011 2012 2013 2014 2015 2016 2017 2020 7.4 5.6 6.4 8.4 9.7 11.1 12.7 21.9 14.5 Fig. 1.3 Projected size of the global market for RFID tags from 2010 to 2020 (in billion U.S. dollars) [10] Another opportunity for wireless sensing has recently emerged through the introduction of radio frequency identification (RFID) technology as a versatile wireless communication platform. RFID has been around for years now and has become a billion dollar market over the last few years and it is still growing. With an estimated $5.6 billion market in 2010, and an average 15% year-on-year growth rate (see Fig. 1.3), the forecasted market in 2020 will exceed $21.9 billion [10]. This shows that RFID technology has achieved solid penetration throughout worldwide commerce, boosted by dynamic growth in the retail apparel sector. The freedom provided by small size and easy positioning, non-line-of-sight wireless operation and powering, and extended read ranges are key features that have made RFID technology so promising. Apart from its primary application in identification and tracking, RFID has become a pragmatic building block for the internet of things (IoT), thus creating a flood of new applications in numerous industries [11]. According to an IC Market Drivers report in 2016 [12], 30.0 billion Internet connections are expected to be in place worldwide in 2020, with 85% of them being to web-enabled things, meaning a wide range of commercial, industrial, and consumer systems, distributed sensors, vehicles, and other connected objects. As reported, IoT applications will fuel strong sales growth in optoelectronics, sensors/actuators, and discrete semiconductors, which are projected to rise by a compound annual growth rate (CAGR) of 26.0% between 2015 and 2019, thus offering a forecasted market of $11.6 billion in 2019. Most RFID tags consist of two main parts (see Fig. 1.4). The first part is an integrated circuit (IC) to implement the target functionality, e.g., the storing and processing of information, as well as the RF transceiver. This part usually occupies only a small portion of the total area of the tag. The second part, which takes up the bulk of the area, is the antenna, which is required for receiving and transmitting the RF signal. Depending on their source of energy, RFID tags can be classified into passive and active tags. Active RFID tags include a battery to power the IC, which
- 23. 4 1 Introduction Silicon Chip Coiled Antenna Silicon Chip Coiled Antenna Silicon Chip Coiled Antenna Fig. 1.4 Various samples of RFID tags; each tag is composed of a large antenna and a silicon integrated circuit (IC) makes autonomous operation possible. In consequence, low power designs, along with brief operating periods, are desirable in order to maximize battery lifetime. Passive RFID tags, in contrast, are not equipped with a battery and consequently, autonomous operation is not possible. Instead, the power required to operate the tag is scavenged from an external magnetic/electromagnetic field, transmitted by a reader. The energy absorbed via an antenna from the field used to power the tag, thus, enabling data transmission and other functionalities. In other words, the antenna of a passive RFID tag is used to transfer information as well as to receive power. The choice of RFID tag type depends on the target application. Battery-equipped or active RFID tags can communicate over long distances, up to 100 m or more. Furthermore, they can operate continuously. However, they have limited lifetime (typically 1–4 years), significantly higher production costs, e.g., few dollars and larger package size, all due to the use of a dedicated battery. The major advantage of passive RFID tags is that they can operate without a battery, thus offering much lower production cost (usually a few pennies), longer lifetime (20 years or more), and much smaller package size. For many years, the main drawback of passive tags was known to be their limited operating range, e.g., 3–5 m. Recent tags with operating range up to 100 m have been developed [13], thus making them the tags of choice for most RFID applications.
- 24. 1.2 Challenges in Wireless Sensing 5 1.2 Challenges in Wireless Sensing Although wireless temperature sensors seem very promising, there are many challenges associated with their implementation. To be cost-effective, such sensors must be fully compatible with CMOS technology. Fortunately, various temperature sensing elements are available in standard CMOS technology. However, due to the process spread of various elements, CMOS sensors often require sophisticated and/or time-consuming calibration and trimming processes (e.g., two-temperature calibration and trimming) to obtain sufficient accuracy. The calibration process is usually performed by comparing the sensor’s output with that of a reference sensor at a number of known temperatures. Since both sensors need to reach thermal equi- librium, such thermal calibration can take several tens of seconds. The extra time required to perform calibration and trimming, however, increases the production cost, and thus sensors with no calibration or a minimum number of calibration points are desired. Alternatively, calibration techniques based on electrical measurements can be developed to simultaneously achieve low cost and good accuracy [14]. The required accuracy of a temperature-sensing node depends on the target application, ranging from ˙0:1 ı C for medical [15, 16] to ˙1 ı C for food and environmental monitoring applications [17]. The operating temperature range also depends on the target application, e.g., from 35 to 45 ı C in medical applications, from 40 to 85 ı C in environmental monitoring, and from 40 to 150 ı C in auto- motive applications. The actual number of required calibration points then depends on the type of sensing element, the target accuracy, and the sensor’s operating temperature range. Clearly, there is a trade-off between the number of required calibration points (and therefore cost) and the target accuracy for a given application. Furthermore, in the design of temperature-sensing wireless nodes, the power and energy efficiency of the co-integrated temperature sensor are key parameters. Typical CMOS smart sensors suffer from relatively high power consumption, e.g., 500 A in [3] and 2.2 mA in [5], and/or long conversion time .Tconv/, e.g., 300 ms in [3] and 1.5 s in [4], which results in high “energy consumption.” Such sensors are ill suited for use in battery-powered WSNs or active RFID tags as they would dramatically decrease the battery’s lifetime, and thus are not cost-effective. They are also not suitable for use in passive RFID tags or WSNs operating based on energy harvesting or scavenging. This is due to the restricted amount of energy available in such systems, which either limits the maximum communication range or requires a larger antenna or energy storing element, e.g., a capacitor, or calls for using energy harvesters. Moreover, the power received at a passive RFID tag falls off as the square of the distance. Therefore, there is a trade-off between the sensor’s energy consumption on the one hand, and the operating range, size, and cost of the sensor node on the other hand. This implies that energy-efficient sensors, i.e., low- power (e.g., a few W) sensors with fast conversion times are essential for wireless temperature sensing applications. Temperature sensors for wireless sensing were introduced prior to the start of this research [17, 18]. The design in [17] presents a temperature sensor, which
- 25. 6 1 Introduction is embedded into a passive-RFID tag. The tag dissipates 10 A to operate and requires a conversion time of 510 ms. It achieves an inaccuracy of ˙2:5 ı C (four samples) from 0 to 100 ı C, after a one-point calibration. The read range is limited to 10–25 cm, depending on the size of the antenna used. The sensor in [18] is quite power-efficient, dissipating 220 nW from a 1 V supply. However, it requires a conversion time of 100 ms to obtain a resolution of 0:1 ı C. Furthermore, it requires a two-point calibration to achieve an inaccuracy of 1:6 ı C=C3 ı C (five samples) from 0 to 100 ı C. In 2010, a sensor was presented which dissipates 100 nW, and achieves a resolution of 35 mK in a conversion time of 100 ms [16]. It also achieves an inaccuracy of ˙0:1 ı C (three samples), over a range from 35 to 45 ı C, but only after a two-point calibration. Recently, another temperature sensor embedded into a passive RFID tag has been presented [19]. The sensor dissipates 350 nA from a 1 V supply. After a one-point calibration, it achieves an inaccuracy of ˙1:5 ı C .3/ from 30 to 60 ı C. In a conversion time of 14.5 ms, it obtains a resolution of 0:3 ı C. As can be seen, most of these low power/energy sensors suffer from poor accuracy, even after calibration. In this thesis, we will focus on the design of low-cost, accurate, and energy- efficient CMOS temperature sensors. To understand the existing design trade-offs, we will first review various CMOS-compatible sensing elements from the perspec- tives of accuracy and energy efficiency, which will be presented in the following section. A general figure-of-merit (FoM) will then be presented, which will facilitate comparisons between the energy efficiency of different types of sensors. Lastly, a short survey of the state of the art in 2009 will be provided, which enables us to evaluate the state of the art at the start of this research. 1.3 CMOS-Compatible Sensing Elements In CMOS technology, the temperature dependence of several different circuit elements can be used for temperature sensing. The correct choice of sensing element, however, is not trivial and depends on the requirements of the target application, such as accuracy, resolution, power consumption, conversion time, operating supply voltage range, operating temperature range, and power supply rejection ratio (PSRR). In the following, various CMOS-compatible sensing elements are briefly introduced and then investigated based on some of the aforementioned requirements. 1.3.1 Bipolar Junction Transistors (BJTs) In CMOS technology, the same diffusions normally used to realize MOSFETs can be used to realize parasitic vertical bipolar junction transistors (BJTs). While smart temperature sensors based on lateral PNP transistors have been realized [20, 21],
- 26. 1.3 CMOS-Compatible Sensing Elements 7 N+ N+ P+ Deep N-Well P-Well P+ B E C P+ P+ N+ N-Well B E (a) (b) Fig. 1.5 (a) Cross section of vertical PNP transistors in standard CMOS; (b) cross section of vertical NPN transistors in modern CMOS technology supporting deep N-well nowadays vertical PNP transistors are preferred due to their lower sensitivity to process spread and packaging stress [22, 23]. Such parasitic vertical PNPs, however, usually offer limited implementation flexibility, collector is formed inside the P- substrate, and thus, is not directly accessible (see Fig. 1.5a). In modern CMOS technologies with twin well or deep N-Well options, vertical NPN transistors are also available as shown in Fig. 1.5b. They exhibit significantly larger current gain than PNPs, e.g., ˇF D 24 (NPNs) versus ˇF D 4 (PNPs) in a TSMC 0:18 m CMOS technology. NPNs also offer more circuit design flexibility, since their collector terminals are accessible. The base-emitter voltage VBE of a BJT can be expressed as follows: VBE kT q ln IC IS C 1 ; (1.1) where k, T, and q denote the Boltzmann constant .1:381023 J/K), the temperature in Kelvin, and the electron charge .1:6 1019 C), respectively. The parameter IS denotes the saturation current of the bipolar transistor. It can be shown that VBE exhibits complementary-to-absolute temperature (CTAT) behavior with a slope of 2 mV=ı C [2]. However, if two BJTs are biased at different collector current densities with a ratio p, the difference VBE D VBE2 VBE1 will be a proportional- to-absolute temperature (PTAT) voltage with a temperature coefficient that depends on the constants k=q and the ratio p [2]. The well-defined temperature dependency of VBE and VBE makes BJTs attractive for use in CMOS temperature sensors and bandgap voltage references. In fact, BJT-based temperature sensors have been widely used in the industry for decades [3–7]. The reasons for this are as follows: for a properly designed sensor, the dominant source of inaccuracy is the process spread in VBE, which has been shown to have a PTAT profile [2], and thus can be corrected by means of a cost-effective one-point PTAT trim, e.g., ˙0:5 ı C .3/ from 50 to 120 ı C in [24] and ˙0:1 ı C .3/ from 55 to 125 ı C in [25]. Another advantage is that the necessary temperature dependent and reference voltages are both generated
- 27. 8 1 Introduction −60 −40 −20 0 20 40 60 80 100 120 −50 −40 −30 −20 −10 0 10 20 30 40 50 Temperature (°C) Resistance Variations (%) N−Well N−Poly P−PolyLow P−PolyHigh Fig. 1.6 Temperature dependency of some types of resistors available in a TSMC 0:18 m process. Resistance variations are normalized to the value at 25 ı C from the same circuit, which significantly simplifies the implementation. They require bias currents in the range of A or even sub-A to operate, and exhibit low supply dependency, usually a few tenths of degrees Celsius per Volt, e.g., 0:5 ı C/V in [24] and 0:1 ı C/V in [25]. 1.3.2 Resistors Resistance temperature detectors (RTDs) have been widely used as stand-alone temperature sensing elements. Temperature information is obtained by reading out resistance variations as a function of temperature, implying that a large temperature- coefficient is often desired. As it turns out, most CMOS-compatible resistors exhibit significant temperature coefficients, with 1st-order coefficients ranging between 0.1%/ı C and 0.4%/ı C, depending on the resistor type. Figure 1.6 shows the simulated temperature dependency of some of the resistors available in the TSMC 0:18 m CMOS process. The variations are normalized to the resistance at 25 ı C. The temperature coefficient of +0.4%/ı C exhibited by a typical N-Well or N-Poly resistor means that its resistance will increase by about 72% over the temperature range from 55 to 125 ı C, which is reasonably large sensitivity. In such resistor- based sensors, the minimum supply voltage is usually limited by the readout circuit, thus enabling low supply voltages. The value of the bias current is defined by thermal-noise and area constraints. A drawback of resistors as temperature sensing elements is the fact that the spread of most resistances in CMOS is in the range of 15–20% across the process
- 28. 1.3 CMOS-Compatible Sensing Elements 9 corners. Their temperature coefficients also suffer from process spread and higher order nonlinear terms, as can be noticed from Fig. 1.6. As a result, resistors usually require a costly multiple-temperature calibration to achieve decent accuracy, where the number of calibration points could range between 3 and 5, depending on the target accuracy. The work presented in [26] and [27], for example, both achieve an inaccuracy of ˙0:15 ı C .3/ from 55 to 85 ı C, but only after a costly three- temperature trim. Employing a single temperature trim, the work in [28] achieves an inaccuracy of ˙1 ı C .3/ from 45 to 125 ı C, which is among the best reported for similarly trimmed resistor-based sensors. 1.3.3 Electro-Thermal Filters (ETFs) The thermal diffusivity of silicon D is defined as the rate at which heat diffuses through a silicon substrate. Recent research has shown that D is a well-defined parameter, as the silicon used for IC fabrication is highly pure [29]. Furthermore, D is strongly temperature dependent and can be approximated by a power law: D / 1=T1:8 [30–32]. This well-defined temperature dependency can thus be exploited to realize temperature sensors. Figure 1.7 shows the structure of an electro-thermal filter (ETF), which uses a heater to generate heat pulses, and a (relative) temperature sensor (thermopile), fabricated at a distance s from the heater, which converts the received temperature variations into a small voltage signal. In the thermal domain, an ETF behaves like a low-pass filter. Driving such a filter at a given excitation frequency results in a temperature-dependent phase-shift [32, 33]: ETF / .s p fref/Tn=2 ; (1.2) where n 1:8. A phase-domain ADC can then be used to digitize ETF and obtain temperature in digital format [33]. Figure 1.8 shows the phase-shift ETF versus temperature for a typical ETF. As shown, and is also clear from the above expression, ETF is slightly nonlinear with temperature, which calls for linearization in the digital domain. Since an ETF requires heat pulses to operate, it is naturally ill suited to low-power applications, e.g., the ETF-based sensor presented in [33] requires 5 mW to operate. However, decent accuracies can be obtained without trimming, and only based on batch-calibration of sensors, e.g., ˙0:5 ı C .3/ from 55 to 125 ı C in 0:7 m Fig. 1.7 Cross section of an electro-thermal filter (ETF) consisting of a heater and a temperature sensor (thermopile) at a distance s formed in the silicon substrate
- 29. 10 1 Introduction Fig. 1.8 Phase shift of an electro-thermal filter (ETF) as a function of temperature [33] CMOS process [33], and even ˙0:2 ı C .3/ in 0:18 m CMOS [34]. This is due to the fact that the accuracy of ETF-based sensors depends on that of the lithography that realizes the distance s, and is thus expected to scale with every CMOS process node. This makes such sensors quite promising in applications where uncalibrated accuracy is critical, while their relatively large power consumption can be tolerated, e.g., in the thermal management of microprocessors. 1.3.4 MOSFETs When biased in the sub-threshold region, the drain current ID and the gate- source voltage VGS of a MOSFET exhibit a temperature-dependent exponential relationship, similar to that between the collector current IC and VBE of a BJT [35]: Ibulk D / W L exp h q mkT .VGS Vbulk T / i ; (1.3) where k is the Boltzmann’s constant, T is the absolute temperature, and q is the electron charge, and W and L represent the width and length of the device, respectively. The parameter m D 1 C CD=COX, is the body effect coefficient, where CD and COX are the depletion-layer and gate-oxide capacitances, respectively [35]. Similar exponential relationships between Eqs. (1.1) and (1.3) suggest that MOSFETS can replace BJTs as temperature sensing elements [36]. Compared to BJTs, however, the gate-source voltage VGS of a MOSFET biased in sub-threshold is substantially smaller and can be controlled by sizing W and/or L. This, in turn, offers a potential advantage for low supply voltage operation. However, the oxide capacitance COX suffers from process spread, while the threshold voltage Vbulk T also varies due to the body-effect and suffers from the process spread as well. In consequence, MOSFET-based sensors suffer from the process spread of two different parameters, which, in turn, results in greater inaccuracies when compared to equally one-point calibrated BJTs. Therefore, MOSFET-based sensors often
- 30. 1.3 CMOS-Compatible Sensing Elements 11 Start Stop Out Clock counter Trigger Trigger Stop Out 0 123 ∙∙∙ N N 0 Tdelay = f ( μ,VT,VDD) Fig. 1.9 Block diagram of a MOSFET-based temperature sensor based on inverter delay require two-temperature calibration to meet the accuracy requirements of most of the applications. The propagation delay of a CMOS inverter chain, or alternatively, the frequency of a ring oscillator, can also be used as a measure of temperature [37]. Figure 1.9 shows the operating principle of such sensors, where a counter is used to measure the propagation delay through a chain of inverters. The average propagation delay TP of an inverter composed of balanced PMOS and NMOS devices can be expressed as [37]: TP D .L=W/CL COX.VDD VT/ ln 3VDD 4VT VDD ; (1.4) in which the mobility and VT are temperature-dependent parameters. Assuming VDD VT, then TP will depend on temperature mainly through . This assumption, however, becomes less and less valid in the modern CMOS processes with reduced supply voltages. Besides, TP suffers from the process spread in VT and from the variations in VDD as well. In consequence, such sensors usually require two-point calibration and suffer from a poor power supply sensitivity, usually in the range of several degrees Celsius per Volt, e.g., 10 ı C/V in [38]. This is about two orders of magnitude worse than typical BJT-based sensors and is prohibitively large for most of the applications. Therefore, in practice, such sensors should be used with voltage regulators, which calls for extra area and power consumption. 1.3.5 Dynamic Threshold MOSFETs (DTMOSTs) Consider a standard MOSFET biased in sub-threshold region, with the gate and bulk terminals tied together, as shown in Fig. 1.10. This connection fixes the width of the depletion layer under the channel, thereby causing the threshold voltage to vary dynamically, hence the name dynamic-threshold MOST (DTMOST). As a result, the drain current IDT D of a DTMOS transistor operated in the sub-threshold region can be expressed as follows [39]:
- 31. 12 1 Introduction Fig. 1.10 A P-type DTMOST diode; cross section view (a), symbol view (b) VGS D1 I1 Poly Si p+ p+ n-well G S D substrate B ) b ( ) a ( Fig. 1.11 Subthreshold characteristics of a bulk PMOS device operated in both “bulk” and “DTMOST” modes, measured at room temperature [39] IDT D / W L exp h q kT .VGS VDT T / i ; (1.5) The key observation is that the gate-body connection ensures that the threshold voltage VDT T of a DTMOS transistor is well defined. As a result, a diode-connected DTMOST, i.e., a DTMOS diode exhibits a near-ideal exponential relationship between IDT D and VGS, which is less dependent on COX and CD [35, 39]. Figure 1.11 compares the sub-threshold characteristics of a bulk PMOST operated in both bulk mode (gate and substrate electrically isolated) and DTMOST mode. As shown, a DTMOST configuration would result in a steeper sub-threshold slope, lowered threshold voltage, and thus higher ID, when compared to the bulk configuration for the same device. More importantly, unlike the bulk configuration, the sub-threshold slope in the DTMOST configuration is well defined and is less dependent on device-related parameters, as can be also seen from Eq. (1.5). In other words, the process spread of VGS in the DTMOST configuration is less than that of the bulk configuration [39, 40]. This would suggest that similar to BJTs, DTMOSTs can be effectively calibrated at a single temperature, while offering the low-voltage capability of MOSFETs.
- 32. 1.4 Energy Efficiency and Resolution FoM 13 1.4 Energy Efficiency and Resolution FoM Given the variety of smart temperature sensors in standard CMOS, devising a single figure of merit (FoM) to assess their energy efficiency performance would be very useful. As shown in Fig. 1.1, a smart temperature sensor typically consists of an ADC that digitizes the sensor’s front-end output: usually a small signal contaminated by the thermal-noise. Moreover, the resolution of an optimally designed ADC is limited by thermal- rather than quantization-noise. This would suggest that as for general-purpose ADCs [41], a resolution figure-of-merit (FoM) involving the energy per conversion and resolution could be defined as follows [42]: FoM D Econv Resolution2 ; (1.6) where Econv is the amount of energy dissipated per conversion. It should be noted that in the context of smart temperature sensors, other figures of merit involving the sensor’s accuracy might also be useful. However, this is complicated by the fact that various sensors employ different numbers of calibration points, making a fair comparison rather difficult. Figure 1.12 shows the energy per conversion versus the resolution of several smart temperature sensors, published prior to the start of this research (in 2009). It can be seen that the resolution FoM defines a line that usefully bounds the state of the art, as would be expected for thermal-noise limited converters. 10 −4 10 −3 10 −2 10 −1 10 0 10 −2 10 0 10 2 10 4 10 6 10 8 Resolution (°C) Energy/Conversion [nJ] BJT MOS TD 1nJ°C (2009) 2 10pJ°C2 Fig. 1.12 Energy per conversion versus the resolution of several smart temperature sensors, published prior to the start of this research (in 2009) [42]. Note that no resistor-based sensors were published before 2009
- 33. Another Random Scribd Document with Unrelated Content
- 34. FIG. 275. CLOISTERS, ST CRISTOFERO, TAGGIA. FIG. 276. CHURCH AT ALASSIO.
- 35. effects, so captivating to the artist, it is difficult, however, to pick out anything which may be regarded as really good architecture. Fig. 272 gives some idea of the picturesqueness of the arcaded streets and gateways, while Figs. 273 and 274 give a few good architectural details. The first (Fig. 273) might, from its style, be the lintel of any fifteenth century house in Genoa (a splendid example of a similar style of doorway at Genoa being shown in Fig. 281), and the other (Fig. 274) is a Renaissance doorway in black marble ornamented with raised arabesques. Close to the town is the monastery of San Cristofero, where the ancient cloister and tower (Fig. 275) are good specimens of early Italian work. The vaulting of FIG. 277. TOWERS AND WEST END OF CHURCH, ALBENGA.
- 36. the cloister is late, the original roof being probably of timber. The tower is a good Italian campanile, with string courses of the arcaded ornament so common in Lombardy and the Rhineland. FIG. 278. ALBENGA (from Railway Station). We are now in the centre of the district which suffered so severely from the earthquakes of 1887. Bussana is passed on the right in returning to the railway. The towns of Porto Maurizio (which stands on a solitary rock), Oneglia, and Diano Marina, all names too well known in connection with the above catastrophe, are reached in succession before arriving at Alassio, the furthest east of the health resorts of the Riviera. The tower of the church here (Fig. 276) has the usual form of the Italian campanile. A few miles further east bring us to Albenga, which is, architecturally speaking, the most interesting town on this part of the coast. It lies in a hollow near the mouth of the river Acosia, and is defended from the cold winds of the North by an amphitheatre of lofty, snow-clad mountains. The general view of the town from the
- 37. FIG. 279. TOWER AT NORTH-EAST OF CHURCH, ALBENGA. railway station (Fig. 278) shews the peculiar preponderance of square towers for which it is remarkable. On closer inspection these are found to be no less surprising than when seen from a distance. They are generally quite plain and are built of brick. The view of the west end of the church (Fig. 277) shews four of these towers crowded close together, exhibiting examples of
- 38. several different designs. That over the north entrance to the church has a strong resemblance to the campaniles of Lombardy, such as that of Mantua, and is thoroughly Italian in every detail, while the plain square towers adjoining recall similar examples at Bologna and elsewhere in Italy. That again at the east end of the church, which has the figure of the lion at its base (Fig. 279), with its plain brick shaft, its triple arcaded top, and fork-shaped battlements, is almost identical with those of Verona. The church has originally been an Italian design of the thirteenth century. Although now much altered and spoiled it has evidently had the same arcaded ornament at the eaves as we have observed at Grasse, San Remo, and elsewhere. The doorways also correspond in style with the above churches. To the north of the church is a very interesting baptistery, which reminds one of those of Fréjus and Aix. It is of octagonal form, 28 feet long by 26 feet wide, with a vault supported on Corinthian-like pillars, and has a very ancient but dismal and neglected appearance. One of the windows is filled with stone tracery of a Byzantine or Moorish character. In moving eastwards we pass in succession Ceriale, with its fortifications, and Loano with its great monasteries, Verezzi with one good campanile, and Flnalmarino with two. From the latter a view is obtained of Finalborgo in the distance (about two miles off), where there are evidently the remains of a fine castellated structure. At
- 39. FIG. 280. CLOISTERS, SAN MATTEO, GENOA.
- 40. FIG. 281. DOORWAY, PIAZZA SAN MATTEO, GENOA. Noli there is an ancient entrance tower with an archway through it. Savona retains its fortifications of the Vauban School, and Verazze the shattered ruins of an old castle.
- 41. FIG. 282. CHURCH, CLOISTERS, ETC., GENOA. It is not intended to attempt to describe the architecture of Genoa. That has already formed the subject of special works, and would require a volume to itself. Only, in closing this account of the architecture of the Riviera, one or two examples from Genoa are given, in order to make more distinct the analogies to which attention has been drawn between the architecture of a large part of the Riviera and that of the famous Republic, as well as the style of Italy generally. Thus the side doorway of the cathedral exhibits, in a remarkable manner, the same imitation of Roman architecture (see Vignette on title page, and Heading p. 25), modified by the introduction of Romanesque or Teutonic ornament, which we observed at St Gilles, Arles, and other churches of Provence. This doorway is part of the original building of the eleventh century, although the greater part of the cathedral was restored about 1300. The façade of San Matteo, on which are engraved so many inscriptions in honour of the various distinguished members of the family of Doria and that of San Stefano, shew the arcaded caves, and the inlaid moulding under the
- 42. FIG. 283. CAMPANILE, GENOA. cornice which exist at Grasse, San Remo, Ventimiglia, c. The doorways of these churches have the same flat porch, with small projection, and plain pointed gable, and the same sort of arch and shafts as several of the examples we have met with in the Riviera. San Matteo dates from 1278. The cloister (Fig. 280) which adjoins that church is of the beginning of the fourteenth century, and contains the monuments of the Dorias, which have been brought here from the suppressed church of Santa Dominica. The cloisters of San Matteo, and also those of San Lorenzo, present shafts and caps in the same Italian style as we have observed extended as far westwards as the cloisters at Fréjus, and the upper cloister of the castle of St Honorat. The sculptured lintel in the Piazza San Matteo (Fig. 281), exhibiting the combat of St George and the Dragon, although more elaborate, is similar in style to the lintel of the house at Taggia (Fig. 273); while the campaniles and arcades of other churches in Genoa (Figs. 282 and 283) recall the Italian style, of which we have met with so many examples in Provence.
- 43. FIG. 284. KNOCKER, ELNE CATHEDRAL.
- 44. FIG. 285. LAMP FROM OLD CHURCH, MONACO.
- 45. INDEX. A, B, C, D, E, F, G, H, I, L, M, N, O, P, R, S, T, V. Aegitna, 308. Aigues Mortes, 206. Aix-en-Provence, 217. Alassio, 454. Albenga, 456. Albigensian Crusades, 27. Antibes, 84, 371. Arles, 50, 183. Autun, 33. Aurelian Way, 79. Auribeau, 380. Avignon, 3, 34, 137. Barbarians, Invasions of, 14. Beaucaire, 173. Béziers, 222. Biot, 387. Burgundy, Style of, 109. Bussana, 456. Byzantine Architecture, 97. Cagnes, 376. Callian, 364. Camargue, The, 77. Cannes, 83, 308. Cannet, 275. Carcassonne, 243. Carpentras, 47, 167. Castellar, 441. Castellaras, 350. Castellated Architecture, 116. Cavaillon, 48, 167.
- 46. Cemenelum (Cimiès), 86, 421. Ceriale, 458. Charlemagne, Revival under, 17. Chartreuse du Val de Bénédiction, 164. Christian Buildings, Early, 95. Church, Early Organisation of, 12; Revival of, 19. Cistertian Architecture, 110, 274. Citeaux, Monks of, 22. Clausonne, 84. Cluny, Abbey of, 19. Cogolin, 302. Courthézon, 137. Crau, The, 77. Cruas, 128. Crusades, 23. Crussol, 128. Dolce Aqua, 448. Dome, The use of, 105. Elne, 239. Esterel, 304. Eza, 424. Feudal System, 112. Finalborgo, 458. Finalmarino, 458. France, Northern Architecture, 1. ” Southern ” , 3. Fraxinet, le Grand, 304. Fréjus, 80, 285. Garde Adhémar, 134. Gaul, Southern, History, 5, 9. Genoa, 461. Gorbio, 440. Gothic, Northern, 114.
- 47. Gourdon, 366. Grasse, 350. Greek and Roman Colonies—in Towns—10. Grimaud, 302. Holy Roman Empires, 15. Hyères, 270. Iles de Lérins, 319. La Garde Freinet, 304. Lagunes, The, 221, 235. La Trinité, Tower of, 382. La Turbie, 87, 428. Le Bar, 365. Le Cannet, 347. Le Luc, 80. Le Thor, 167. Les Baux, 178. Les Maures, 299. Les Saintes Maries, 212. Loano, 458. Lyons, 34, 121. Marseilles, 79, 213. Mediterranean, Littoral of—History, 7. Mentone, 440. Molléges, 168. Monaco, 432. Monasteries, Origin of, 12. ” Growth of, 19. Mont Majour, 194. Mont St Cassien, 307. Mougins, 348. Municipalities of the Middle Ages, 11. Musée Calvert, 34. Napoule, 305.
- 48. Narbonne, 230. Nice, 86, 418. Nimes, 64. Noli, 461. Notre Dame de Vie, 349. ” ” du Pré, Le Mans, 102. Oneglia, 456. Orange, 40. Pernes, 167. Perpignan, 235. Phocæans in Gaul, 7. Phœnicians do., 7. Pigna, 449. Pointed Arch, 107, 113. Pomponiana, 80. Pont du Gard, 76. ” St Bénezet, 151. ” St Esprit, 136. Porto Maurizio, 456. Provence, History of, 25. ” passed to France, 30. Provençal Architecture, 105, 118, 211. Puisalicon, 229. Ravenna, 96. Riez, 292. Riviera, The, 79. Roman Architecture, Early, 90. ” ” The Arch in, 91. Roman Architecture, Continued under Christianity, 94. Roman Architecture, Remains in Provence, 33. Roquebrune, 437. Ste Agnès, 441. St André, Castle of, 155, 421. ” Césaire, 359.
- 49. ” Chamas, 77. ” Front, Perigueux, 104. ” Gabriel, 182. ” Gilles, 204. ” Honorat, Castle of, 323. ” ” Island of, 319. ” Mark’s, Venice, 98. Ste Marguérite (Lérins), 343. St Martin de Londres, 229. ” ” les Vences, 418. ” Maximin, 282. ” Paul-Trois-Châteaux, 134. ” ” -du-Var, 392. ” Peyré, 306. ” Pierre de Reddes, 229. ” Raphäel, 299. ” Remy, 48. ” Ruf, 164. ” Sauveur (Lérins), 323. Ste Trinité (Lérins), 320. St Tropez, 300. ” Veran, 164. San Miniato, 100. ” Remo, 450. Saracens, Invasion of, 15. Saut du Loup, 369. Savona, 461. Sculpture in Provence, 107. Single-nave Churches, 105. Syrian Churches, 98, 210. Taggia, 452. Tarascon, 168. Thoronet, 274. Toulon, 79. Tourettes, 369. Tournon, 363.
- 50. Vaison, 165. Valence, 127. Vallauris, 344. Vaulting, Introduction of, 100. ” in Provence, 102. Vaulting in Aquitaine, 103. Venasque, 167. Vence, 84, 408. Ventimiglia, 442. Verazze, 461. Verezze, 458. Vernégues, 78. Vienne, 34, 124. Villeneuve, Town of, 154. ” Church, 163. Villeneuve-Loubet, 378. Villes Mortes, 220. Visigoths, 10. Viviers, 134. FROM ARLES MUSEUM. THE CASTELLATED AND DOMESTIC A R C H I T E C T U R E OF SCOTLAND FROM THE TWELFTH TO THE EIGHTEENTH CENTURY BY DAVID MACGIBBON and THOMAS ROSS ARCHITECTS
- 51. With about 1000 Illustrations of Ground Plans, Sections, Views, Elevations, and Details. In 2 Volumes. Royal 8vo. Four Guineas nett. “One of the most important and complete books on Scottish architecture that has ever been compiled. Its value to the architect, the archæologist, and the student of styles is at once apparent. It consists almost exclusively of what may be called illustrated architectural facts, well digested and arranged, and constituting a monument of patient research, capable draughtsmanship, and of well sustained effort, which do the authors infinite credit.”— Scotsman. “Their descriptions are good, and their arguments always worth attention and generally convincing.... The plans ... are clear and good, and by themselves make the book a most valuable addition to the library of any man who wishes to study and understand the defensive architecture of the Middle Ages. The book has another value in that it preserves a record of so many buildings in the state they are now. Many are neglected and daily falling more and more into ruin.”—Athenæum. “No one acquainted with the history of Great Britain can take up this neatly-bound volume ... without being at once struck by its careful completeness and extreme archæological interest, while all students of architectural style will welcome the work specially for its technical thoroughness.”—Building News. “The authors merit the thanks of all architectural readers, professional and amateur, for the production of a very well studied and illustrated hand- book of a most interesting class of ancient buildings.”—The Builder. “Careful observation and accurate description appear to specially characterise this work.”—British Architect. “In its complete form the merits of the work are more apparent, and we have no hesitation in saying that we consider it to be far superior to any of the preceding books on the subject.”—The Architect. “A learned, painstaking, and highly important work.”—Scottish Review. “The best authority upon the architecture of Scottish Castles yet issued.”—Dundee Advertiser. “To the intelligent readers of all classes, we can cordially recommend it as a very interesting and suggestive book.”—Daily Free Press, Aberdeen. “Messrs. MacGibbon and Ross now show in sketches of ground plans and elevations such a series of domestic structures as not only indicates the
- 52. gradual progress of Scottish architecture from times comparatively rude, but permits the development to be traced in such a way as determines the stages of progress or ‘Periods’ into which its history may be naturally divided.”— Glasgow Herald. “Highly interesting and picturesque work.”—Edinburgh Review. EDINBURGH: DAVID DOUGLAS, 15 Castle Street. FOOTNOTE: [A] Elevations and details are given in Viollet-le-Duc’s Dictionnaire, to which we are also indebted for most of the above particulars.
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