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An Introduction to PIC18FX6J Series MCUs Source: Microchip Technology
Introduction Purpose An Introduction to PIC18F26J/PIC18F46J Series MCUs Outline Core Features and MCU Block Diagram,  Target Applications. Features and Benefits of nanoWatt XLP Technology ENHANCED CAPTURE/COMPARE/PWM (ECCP) MODULE EUSART  Transmitter / Receiver Charge Time Measurement Unit (CTMU), Content 17 pages
nanoWatt XLP Technology Portfolio Microchip PIC microcontrollers with nanoWatt XLP - Roadmap
Key Features Deep Sleep mode ideal for battery applications  Peripheral Pin Select for mapping digital peripherals to various I/O for design flexibility  Hardware RTCC provides clock, calendar & alarm functions  Charge Time Measurement Unit (CTMU) supports capacitive touch screens  2 Enhanced Capture / Compare / PWM modules  2 MSSP serial ports for SPI with DMA or I2C™ communication  2 Enhanced USART modules  Dual analog comparators & 10 ch, 10-bit ADC  Typical nanoWatt XLP™ specifications include:  13nA Deep Sleep mode  54nA Sleep mode (RAM retention)  830nA Real Time Clock & Calendar operation in Sleep modes  820nA Watch Dog Timer operation in Sleep modes
Target Applications  Battery ■  Utility Metering ■  Asset Tracking ■  Electronic Locks ■  Portable Medical ■  Smoke/CO2 Detectors ■  Irrigation Systems ■  Security Systems/ Sensors ■  Remote Keyless Entry Green Initiatives ■  Compliance with Regulations ■  Appliances ■  Home Electronics Energy Harvesting ■  Wireless Switches ■  Battery-less Sensors
nanoWatt XLP Technology This XLP version represents a significant reduction of power consumption over the original nanoWatt Technology. To meet this standard, a PIC microcontroller is required to have typical current consumption of less than the following: 100 nA for Power Down current (IPD) 800 nA Watchdog Timer current (IWDT) 800 nA Real-time Clock & Calendar (IRTCC) Currently, nanoWatt XLP Technology is available in the most recent members of Microchip’s microcontrollers, including PIC16, PIC18 & PIC24F. Benefits of nanoWatt XLP: Sleep / Power-down current down to 20 nA Brown-out Reset down to 45 nA Watch-dog Timer down to 400 nA Real-time Clock/Calendar down to 500 nA
Low-Power Modes For Managing power in an application, the primary modes of operation are: Run Mode Idle Mode Sleep Mode Deep Sleep Mode There is an Ultra Low-Power Wake-up (ULPWU) mode for generating an interrupt-on-change The Run and Idle modes can use any of the three available clock sources  The Sleep mode does not use a clock source Deep Sleep mode brings the device into its lowest power consumption state without requiring the use of external switches to remove power from the device. During deep sleep, the on-chip VDDCORE voltage regulator is powered down, effectively disconnecting power to the core logic of the microcontroller. During Deep Sleep, the general purpose I/O pins will retain their previous states
Block Diagram
PIC18F46J11 Family Clock Diagram The operation of the oscillator in PIC18F46J11 family devices is controlled through three Configuration registers and two control registers. An internal postscaler allows users to select a clock frequency other than that of the crystal or resonator. The main output (INTOSC) is an 8 MHz clock source which can be used to directly drive the device clock
Parallel Master Port (PMP) Key features of the PMP module are: Up to 16 bits of Addressing when Using Data/Address Multiplexing Up to 8 Programmable Address Lines Address Auto-Increment/Auto-Decrement Programmable Address/Data Multiplexing Programmable Polarity on Control Signals Legacy Parallel Slave Port Support Enhanced Parallel Slave Support: Address Support 4-Byte Deep, Auto-Incrementing Buffer Programmable Wait States Selectable Input Voltage Levels
Enhanced Capture/Compare/Pwm (ECCP) Module Capture Mode Operation Block Diagram The CCPRxH:CCPRxL register pair captures the 16-bit value of the TMR1 or TMR3. The event is selected by the mode select bits, CCPxM<3:0>, of the CCPxCON register. When a capture is made, the interrupt request flag bit, CCPxIF, is set; it must be cleared by software. There are four prescaler settings in Capture mode; they are specified as part of the operating mode selected by the mode select bits.
Compare Mode Timer1 and/or Timer3 must be running in Timer mode or Synchronized Counter mode.  Users must configure the ECCPx pin as an output by clearing the appropriate TRIS bit. The Special Event Trigger is enabled by selecting the Compare Special Event Trigger mode.
PWM Block Diagram The PWM period is specified by writing to the PR2 (PR4) register. When TMR2 (TMR4) is equal to PR2 (PR4), the following three events occur on the next increment cycle: •  TMR2 (TMR4) is cleared •  The CCPx pin is set (exception: if PWM duty cycle = 0%, the CCPx pin will not be set) •  The PWM duty cycle is latched from CCPRxL into CCPRxH
EUSART Asynchronous Transmitter / Receiver EUSART Transmit Block Diagram EUSART Receive Block Diagram
Master SSP (MSSP) Module The MSSP module can operate in one of two modes: Serial Peripheral Interface (SPI) Inter-Integrated Circuit (I2C™) - Full Master mode - Slave mode (with general address call) The I2C interface supports the following modes in hardware: Master mode Multi-Master mode Slave mode with 5-bit and 7-bit address masking
Charge Time Measurement Unit (CTMU) Up to 13 channels available for capacitive or time measurement input On-chip precision current source Four-edge input trigger sources Polarity control for each edge source Control of edge sequence Control of response to edges Time measurement resolution of 1 nanosecond High precision time measurement Time delay of external or internal signal asynchronous to system clock.
Additional Resource For ordering PIC18F26J, please click the part list or Call our sales hotline For more product information go to http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en533681 For additional inquires contact our technical service hotline or even use our “Live Technical Chat” online facility Newark Farnell

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Introduction to PIC18FX6J Series MCUs

  • 1. An Introduction to PIC18FX6J Series MCUs Source: Microchip Technology
  • 2. Introduction Purpose An Introduction to PIC18F26J/PIC18F46J Series MCUs Outline Core Features and MCU Block Diagram, Target Applications. Features and Benefits of nanoWatt XLP Technology ENHANCED CAPTURE/COMPARE/PWM (ECCP) MODULE EUSART Transmitter / Receiver Charge Time Measurement Unit (CTMU), Content 17 pages
  • 3. nanoWatt XLP Technology Portfolio Microchip PIC microcontrollers with nanoWatt XLP - Roadmap
  • 4. Key Features Deep Sleep mode ideal for battery applications Peripheral Pin Select for mapping digital peripherals to various I/O for design flexibility Hardware RTCC provides clock, calendar & alarm functions Charge Time Measurement Unit (CTMU) supports capacitive touch screens 2 Enhanced Capture / Compare / PWM modules 2 MSSP serial ports for SPI with DMA or I2C™ communication 2 Enhanced USART modules Dual analog comparators & 10 ch, 10-bit ADC Typical nanoWatt XLP™ specifications include: 13nA Deep Sleep mode 54nA Sleep mode (RAM retention) 830nA Real Time Clock & Calendar operation in Sleep modes 820nA Watch Dog Timer operation in Sleep modes
  • 5. Target Applications Battery ■ Utility Metering ■ Asset Tracking ■ Electronic Locks ■ Portable Medical ■ Smoke/CO2 Detectors ■ Irrigation Systems ■ Security Systems/ Sensors ■ Remote Keyless Entry Green Initiatives ■ Compliance with Regulations ■ Appliances ■ Home Electronics Energy Harvesting ■ Wireless Switches ■ Battery-less Sensors
  • 6. nanoWatt XLP Technology This XLP version represents a significant reduction of power consumption over the original nanoWatt Technology. To meet this standard, a PIC microcontroller is required to have typical current consumption of less than the following: 100 nA for Power Down current (IPD) 800 nA Watchdog Timer current (IWDT) 800 nA Real-time Clock & Calendar (IRTCC) Currently, nanoWatt XLP Technology is available in the most recent members of Microchip’s microcontrollers, including PIC16, PIC18 & PIC24F. Benefits of nanoWatt XLP: Sleep / Power-down current down to 20 nA Brown-out Reset down to 45 nA Watch-dog Timer down to 400 nA Real-time Clock/Calendar down to 500 nA
  • 7. Low-Power Modes For Managing power in an application, the primary modes of operation are: Run Mode Idle Mode Sleep Mode Deep Sleep Mode There is an Ultra Low-Power Wake-up (ULPWU) mode for generating an interrupt-on-change The Run and Idle modes can use any of the three available clock sources The Sleep mode does not use a clock source Deep Sleep mode brings the device into its lowest power consumption state without requiring the use of external switches to remove power from the device. During deep sleep, the on-chip VDDCORE voltage regulator is powered down, effectively disconnecting power to the core logic of the microcontroller. During Deep Sleep, the general purpose I/O pins will retain their previous states
  • 9. PIC18F46J11 Family Clock Diagram The operation of the oscillator in PIC18F46J11 family devices is controlled through three Configuration registers and two control registers. An internal postscaler allows users to select a clock frequency other than that of the crystal or resonator. The main output (INTOSC) is an 8 MHz clock source which can be used to directly drive the device clock
  • 10. Parallel Master Port (PMP) Key features of the PMP module are: Up to 16 bits of Addressing when Using Data/Address Multiplexing Up to 8 Programmable Address Lines Address Auto-Increment/Auto-Decrement Programmable Address/Data Multiplexing Programmable Polarity on Control Signals Legacy Parallel Slave Port Support Enhanced Parallel Slave Support: Address Support 4-Byte Deep, Auto-Incrementing Buffer Programmable Wait States Selectable Input Voltage Levels
  • 11. Enhanced Capture/Compare/Pwm (ECCP) Module Capture Mode Operation Block Diagram The CCPRxH:CCPRxL register pair captures the 16-bit value of the TMR1 or TMR3. The event is selected by the mode select bits, CCPxM<3:0>, of the CCPxCON register. When a capture is made, the interrupt request flag bit, CCPxIF, is set; it must be cleared by software. There are four prescaler settings in Capture mode; they are specified as part of the operating mode selected by the mode select bits.
  • 12. Compare Mode Timer1 and/or Timer3 must be running in Timer mode or Synchronized Counter mode. Users must configure the ECCPx pin as an output by clearing the appropriate TRIS bit. The Special Event Trigger is enabled by selecting the Compare Special Event Trigger mode.
  • 13. PWM Block Diagram The PWM period is specified by writing to the PR2 (PR4) register. When TMR2 (TMR4) is equal to PR2 (PR4), the following three events occur on the next increment cycle: • TMR2 (TMR4) is cleared • The CCPx pin is set (exception: if PWM duty cycle = 0%, the CCPx pin will not be set) • The PWM duty cycle is latched from CCPRxL into CCPRxH
  • 14. EUSART Asynchronous Transmitter / Receiver EUSART Transmit Block Diagram EUSART Receive Block Diagram
  • 15. Master SSP (MSSP) Module The MSSP module can operate in one of two modes: Serial Peripheral Interface (SPI) Inter-Integrated Circuit (I2C™) - Full Master mode - Slave mode (with general address call) The I2C interface supports the following modes in hardware: Master mode Multi-Master mode Slave mode with 5-bit and 7-bit address masking
  • 16. Charge Time Measurement Unit (CTMU) Up to 13 channels available for capacitive or time measurement input On-chip precision current source Four-edge input trigger sources Polarity control for each edge source Control of edge sequence Control of response to edges Time measurement resolution of 1 nanosecond High precision time measurement Time delay of external or internal signal asynchronous to system clock.
  • 17. Additional Resource For ordering PIC18F26J, please click the part list or Call our sales hotline For more product information go to http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en533681 For additional inquires contact our technical service hotline or even use our “Live Technical Chat” online facility Newark Farnell

Editor's Notes

  • #3: Welcome to the training module on An Introduction to PIC18FX6J Series MCUs. This training module introduces you to the basic features of the device, it’s peripheral interface, block diagrams and targeted applications.
  • #4: Microchip released a range of low-power PIC microcontrollers with nano-Watt XLP extreme Low Power Technology and with sleep currents as low as 20 nano amps. These three new 8- and 16-bit MCU families join three other recent 8-bit families that are all part of Microchip’s nano-Watt XLP portfolio, providing designers with a rich and compatible low-power migration path that includes on-chip peripherals for USB and mTouch™ sensing solutions. This industry-leading combination of low power consumption and functionality, makes these PIC MCUs ideal for any battery-powered or power-constrained application.
  • #5: This family of devices include several features intended to maximize reliability and minimize cost through elimination of external components. The oscillator can be configured for the application, depending on frequency, power, accuracy and cost. The inclusion of an internal RC oscillator also provides the additional benefits of a Fail-Safe Clock Monitor (FSCM) and a Two-Speed Start-up. The digital-core-logic of the PIC18F46J11 family of devices is designed on an advanced manufacturing process, and requires a 2.0V to 2.7V supply. The digital-core-logic obtains power from the VDD-CORE or V-CAP power supply pin.
  • #6: These MCUs can be used in various fields of application including: Portable and Battery-powered Consumer applications, Industrial, the automotive field, and Medical applications. Examples of consumer applications are sealed and disposable electronics, portable electronics, white goods, game controllers, digital photo frames and coffee machines. Industrial applications include: energy harvesting or scavenging, utility meters, security systems, thermostats, sprinkler timers, portable temperature controllers, remote or portable gas sensors &amp; remote sensor networks, data logging &amp; asset tracking, as well as sealed or harsh environment sensors. The automotive field includes: diagnostic equipment, car alarms and key fobs); Examples of medical applications included: oxygen or bio flow meters, digital thermometers, patient monitors, lifestyle or fitness monitors and pedometers.
  • #7: PIC MCUs featuring nanoWatt XLP Technology are useful in designing embedded applications with extremely low power consumption. The nano-Watt XLP Technology’s key advantages are: Sleep currents down to 20 nA, Real-Time Clock currents down to 500 nA, and Watchdog Timer currents down to 400 nA. The vast majority of low-power applications require one or more of these features. Nano-Watt XLP Technology combines all three in a comprehensive portfolio of devices. These PIC microcontrollers also introduce a new low-power mode called Deep Sleep. Microchip achieves these very low current draw figures by using two new process technologies, 0.35u for the PIC24 and 0.25u for the PIC18. These new processes boast a new transistor design with extremely low leakage current, and design switches to dynamically turn sections of the silicon off and on.
  • #8: The PIC18F46J11 and PIC18F26J11 family can both manage power consumption through clocking to the CPU and the peripherals. In general, reducing the clock frequency and the amount of circuitry being clocked reduces power consumption. In the Run modes, clocks to both the core and peripherals are active. Sleep mode is entered by clearing the IDLE-N bit and executing the SLEEP instruction. The Idle modes allow the controller’s CPU to be selectively shut down while the peripherals continue to operate.
  • #9: The device family incorporates a range of serial and parallel communication peripherals. It also includes two independent Enhanced U-SARTs and two Master Synchronous Serial Port (MSSP) modules, capable of both Serial Peripheral Interface (SPI) and I2C™ (Master and Slave) modes of operation. The device also has a parallel port and can be configured to serve as either a Parallel Master Port (PMP) or as a Parallel Slave Port or PSP. All devices in the family incorporate three Enhanced Capture/Compare/PWM modules, also known as ECCP modules, to maximize flexibility in control applications. Up to four different time bases may be used to perform several different operations at once. Each of the ECCPs offer up to four PWM outputs, allowing for a total of 8 PWMs. The ECCPs also offer many beneficial features, including polarity selection, programmable dead time, auto-shutdown and restart and Half-Bridge and Full-Bridge Output modes
  • #10: The devices can be operated in eight distinct oscillator modes. Users can program the FOSC Configuration bits to select one of the modes. This device family has additional pre-scalers and post-scalers, which have been added to accommodate a wide range of oscillator frequencies. A Phase Locked Loop (PLL) circuit is provided as an option for users who want to use a lower frequency oscillator circuit, or to clock the device up to its highest rated frequency from a crystal oscillator. It also includes an internal oscillator block which generates two different clock signals, either of which can be used as the microcontroller’s clock source. The internal oscillator may eliminate the need for external oscillator circuits on the OSC1 and/or OSC2 pins.
  • #11: The Parallel Master Port module or PMP, is an 8-bit parallel I/O module, specifically designed to communicate with a wide variety of parallel devices, such as communication peripherals, LCDs, external memory devices and microcontrollers. Because the interface to parallel peripherals varies significantly, the PMP is highly configurable. The PMP module can be configured to serve as either a master port or as a Parallel Slave Port.
  • #12: Another feature of the device is the Enhanced Capture, Compare and PWM module. This family of devices have two Enhanced Capture/Compare/PWM (ECCP) modules: ECCP1 and ECCP2. These modules contain a 16-bit register, which can operate as a 16-bit Capture register, a 16-bit Compare register or a PWM Master/Slave Duty Cycle register. These ECCP modules are upward compatible with CCP, ECCP1 and ECCP2 and are implemented as standard CCP modules with enhanced PWM capabilities. In Capture mode, the CCPRX register pair, captures the 16-bit value of the TMR1 or TMR3 registers when an event occurs on the corresponding ECCPx pin. An event is defined as one of the following cases, Every falling edge, Every rising edge, Every 4th rising edge and every 16th rising edge. The event is selected by the mode select bits CCPxM, of the CCPxCON register. When a capture is made, the interrupt request flag bit CCPxIF is set.
  • #13: In Compare mode, the 16-bit CCPRx register value is constantly compared against either the TMR1 or TMR3 register pair value. When a match occurs, the ECCPx pin can be: Driven high, Driven low, Toggled – that is high-to-low or low-to-high, Remain unchanged –that is reflects the state of the I/O latch. The action on the pin is based on the value of the mode select bits CCPxM. At the same time, the interrupt flag bit, CCPxIF, is set.
  • #14: In PWM mode, the CCPx pin produces up to a 10-bit resolution PWM output, The PWM duty cycle is specified by writing to the CCPRxL register and to the CCPxCON bits. A PWM output has a time base (period) and a time that the output stays high (duty cycle). The frequency of the PWM is the inverse of the period (1/period).
  • #15: The EUSART’s transmitter and receiver are functionally independent but use the same data format and baud rate. They transmits and receives the LSB first. The heart of the transmitter is the Transmit (Serial) Shift Register (TSR). The Shift register obtains its data from the Read/Write Transmit Buffer register, TXREGx. This register is loaded with data in software. The TSR register is not loaded until the Stop bit has been transmitted from the previous load. As soon as the Stop bit is transmitted, the TSR is loaded with new data from the TXREGx register. Once the TXREGx register transfers the data to the TSR register, the TXREGx register is empty and the TXxIF flag bit is set. The receiver block should be Initialised by configuring SPBRGx registers for the appropriate baud rate. Set or clear the BRGH and BRG16 bits, as required, to achieve the desired baud rate, Enable the asynchronous serial port by clearing SYNC bit, and setting SPEN bit, Enable the reception by setting CREN bit. The data is received on the RX pin and drives the data recovery block. This mode would typically be used in RS-232 systems.
  • #16: The device has two master synchronous serial port modules desginated as MSSP1 and MSSP2. The modules operate independently. All of the MSSP1 module-related SPI and I2C I/O functions are hard-mapped to specific I/O pins. The SPI mode allows 8 bits of data to be synchronously transmitted and received simultaneously. All four modes of SPI are supported. When MSSP2 is used in SPI mode, it can optionally be configured to work with the SPI DMA sub-module.
  • #17: The Charge Time Measurement Unit or CTMU is a flexible analog module that provides accurate differential time measurement between pulse sources, as well as asynchronous pulse generation. By working with other on-chip analog modules, the CTMU can be used to precisely measure time, measure capacitance, measure relative changes in capacitance or generate output pulses with a specific time delay. The CTMU is ideal for interfacing with capacitive-based sensors. The CTMU works in conjunction with the A/D Converter to provide up to 13 channels for time or charge measurement, depending on the specific device and the number of A/D channels available.
  • #18: Thank you for taking the time to view this presentation on “ An Introduction to PIC18FX6J Series MCUs ” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the Microchip Technologies site, or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.