Lec5 encoder
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The document discusses decoders and encoders used in digital logic circuits. It provides examples of: 1) Designing a full binary adder using one decoder, where the sum and carry outputs are functions of the input and decoder output lines. 2) Implementing an encoder with OR gates to encode 2n input lines into n output lines. 3) A priority encoder that accepts multiple active inputs and encodes them, setting the output to the highest priority input value and indicating if any inputs are active. Truth tables are shown for a 4-input priority encoder.
Lec5 encoder
- 1. X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 Designing Binary Adders with decoders C(X,Y,Z) = Σ m(3,5,6,7) S(X,Y,Z) = S m(1,2,4,7);
- 2. •Example: design a full binary adder using one decoder. S(X,Y,Z) = Σ m(1,2,4,7); C(X,Y,Z) = Σ m(3,5,6,7)
- 3. Chapter 2 Encoder Dr. Bernard Chen Ph.D. University of Central Arkansas Spring 2009
- 4. Encoders Perform the inverse operation of a decoder 2n (or less) input lines and n output lines
- 5. Encoders
- 6. Encoders with OR gates
- 7. Encoders Perform the inverse operation of a decoder 2n (or less) input lines and n output lines
- 8. Can be implemented with 3 OR gates A0 = D1 + D3 + D5 + D7; A1 = D2 + D3 + D6 + D7; A2 = D4 + D5 + D6 + D7; If more than 2 inputs are active we need to use priority encoder (priority for inputs) Encoders
- 9. Accepts multiple values and encodes them Works when more than one input is active Consists of: Inputs (2n ) Outputs when more than one output is active, sets output to correspond to highest input V (indicates whether any of the inputs are active) Selectors / Enable (active high or active low) Priority Encoder
- 10. D3 D2 D1 D0 A1 A2 V 0 0 0 0 x X 0 0 0 0 1 0 0 1 0 0 1 0 0 1 1 0 0 1 1 0 1 1 0 1 0 0 1 0 1 0 1 0 1 1 0 1 0 1 1 0 1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1 1 1 0 0 1 1 1 1 1 0 1 0 1 1 1 1 0 1 1 1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1
- 11. Priority Encoder
- 12. Priority Encoder