Logic family.ppt
- 2. INTRODUCTION 2 Logic Family: It is a group of compatible ICs with the same logic levels and the supply voltages for performing various logic functions They have been fabricated using a specific circuit configuration. They are the building block of logic circuits.
- 3. INTRODUCTION 3 ICs are integrated using following integration techniques SSI (upto 12) MSI (12 to 99) LSI (100 to 9999) VLSI (10,000 to 99999) ULSI (> 100,000)
- 4. Types of logic families 4 Logic Families Bipolar Logic Family Saturated RTL DCTL IIL DTL HTL TTL Non- Saturated Schottkey TTL ECL Unipolar Logic Family MOSFET
- 5. BIPOLAR ICs 5 – Resistor-Transistor logic (RTL), – Direct-Coupled transistor logic (DCTIL), – Integrated-injection logic (IIL), – Diode-transistor logic (DTL), – High-Threshold logic (HTL) and – Transistor-transistor logic (TTL)
- 6. UNIPOLAR LOGIC FAMILIES 6 MOS devices are unipolar devices and only MOSFETs are employed in MOS logic circuits. These families are: PMOS (p-channel MOSFETs) NMOS (n-channel MOSFETs) CMOS (Both p- and n- channel MOSFETs are fabricated on same silicon chip)
- 7. Basic Characteristics of ICs 7 DC supply Voltage Logic levels
- 8. 1) DC supply voltage 8 CMOS and TTL are available in different supply voltage categories In each IC, Vcc pin is connected to positive supply and GND pin is connected to ground of supply.
- 9. 2) LOGIC LEVELS 9 Four different kind of Logic level specifications are defined: VIL, VIH, VOL, VOH VIL, VIH : These are the input logic levels (Low & High) VOL, VOH : These are the output logic levels (Low & High)
- 10. 3) Noise Immunity 10 Noise is unwanted voltage that is induced in electrical circuits and can cause threat to proper operation of circuit. Noise immunity is the ability to tolerate a certain amount of unwanted voltage fluctuations on its inputs without changing outputs
- 11. 3) Noise Immunity 11 For example, If noise voltage causes the input of 5V CMOS gate to drop below 3.5V in HIGH state, then input lies in unallowed band and the operation becomes unpredictable
- 12. 4) Noise Margin 12 A measure of circuits’ noise immunity is called Noise margin. It is expressed in volts. Two Noise margins are specified for logic circuits, High level Noise margin (VNH) and Low level Noise margin (VNL), expressed as:
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- 14. 5) Power Dissipation 14 This is the amount of power dissipated in an IC. It is Determined by the current Icc, that it draws from the Vcc supply, and is given by , Pd = Vcc X Icc.
- 16. 7) Fan out 16 The maximum number of inputs of the same series of an IC that can be connected to a gates’ output and still maintains the specified output voltage level.
- 17. Fan in Fan in – the no of inputs gate. for example a two i/p gate will have fan in equal to 2. 17
- 18. Operating temperature Operating temperature range- Industrial application is 0oC to 70oC Military application is -55oC to 125oC 18
- 20. 20 RTL, DTL (This is not part of syallbus in CVMU. Kept here for just understanding)
- 21. RTL gate circuit NPN 21
- 22. RTL operation 22 • When A=B= 0: – Both Q1 & Q2 are off, and current through Rc=0, So, drop across Rc = 0, Thus output voltage at Y becomes equal to Vcc i.e. 1 – Y = 1 • When A=0, B=1: – Q1 = off, Q2 = saturated – Voutput = Vce2(sat) i.e. 0 – Y = 0
- 23. RTL operation 23 When A=1, B=0: Q1 = saturated, Q2 = off Voutput = Vce1(sat) i.e. 0 Y = 0 When A = B = 1: Both Q1 & Q2 are in saturated Vout is at lower potential then required Y = 0
- 24. Disadvantages of RTL 24 Poor Noise Margin Poor Fan out Low speed High power dissipation
- 26. DTL OPERATION 26 • A=B=0: – D1 & D2 are Forward biased, Hence, Potential drop at M = 0.7V. – But Q needs 2.1V to Forward bias D3 & D4, Therefore Q1 = cutoff & output Y = 1 • Either A or B = 0: – Again same procedure as above will follow • A=B=1: – A = B= Vcc, Therefore D1 & D2 = Reverse Biased & do not conduct – D3 & D4= Forward Biased & base current is supplied to Transistor via Rd,D3,D4. Thus, Q = saturated & Y=pulled down to low voltage & Y= 0
- 27. Advantages 27 Good Fan out More Economical Disadvantages Limited operating speed Poor noise immunity Large propagation delay
- 28. TTL Important logic family-TTL It is a transistor transistor logic. This is most popular logic family as lot of functions are available in the family The important series are 74xx & 54xx It works with power supply of +5v.
- 29. The multiple emitter transistor
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- 33. 33 Advantages 33 Disadvantages Low propagation delay So they are fast High current sinking and sourcing Large Power Dissipation because it operate on +5V Less fanout compared to CMOS Less Noise immunity
- 34. 34 CMOS CIRCUITS
- 35. CMOS 35 CMOS stands for complementary metal oxide semiconductor FET. MOSFETs are the active switching elements in CMOS circuits MOSFETs are of two types: n-channel and p-channel
- 36. ON/OFF states of MOSFETs 36 N-channel switch
- 37. ON/OFF states of MOSFETs 37 P-channel switch
- 38. 1) CMOS Inverter • It uses both P- channel and n-channel MOSFETs •Q1 = P- MOS •Q2 = N- MOS 38
- 40. Advantages Propagation Delay are longer than TTL 40 Disadvantages Low power Consumption High Fanout High Noise Margin
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