logic family
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This document discusses various digital integrated circuit logic families including RTL, DTL, TTL, ECL, MOS, and CMOS. It covers key characteristics such as fan-out, power dissipation, propagation delay, and noise margin. TTL is described as having several subfamilies or series with different output configurations like open-collector, totem-pole, or three-state outputs. ECL is introduced as a non-saturated logic family with very fast propagation rates below 2ns but also the worst noise immunity and power dissipation of all families.
logic family
- 1. Chap.10 Digital Integrated Circuits
- 2. Content 10-1 Introduction 10-2 Feature 10-3 Feature of BJT 10-4 RTL and DTL 10-5TTL 10-6 ECL 10-7 MOS 10-8 CMOS 10-9 MOS transmission gate
- 3. Integration Levels 3 • Gate/transistor ratio is roughly 1/10 – SSI < 12 gates/chip – MSI < 100 gates/chip – LSI …1K gates/chip – VLSI …10K gates/chip – ULSI …100K gates/chip – GSI …1Meg gates/chip
- 4. Logic Family Definition A circuit configuration or approach used to produce a type of digital integrated circuit. Consequence: different logic functions, when fabricated in the form of an IC with the same approach, or in other words belonging to the same logic family, will have identical electrical characteristics. the set of digital ICs belonging to the same logic family are electrically compatible with each other 4
- 5. 10-1 Introduction IC digital logic families ◦ RTL （Resistor-transistor logic） ◦ DTL （Diode-transistor logic） ◦ TTL （Transistor -transistor logic） ◦ ECL （Emitter-coupled logic） ◦ MOS （Metal-oxide semiconductor） ◦ CMOS （ Complementary Metal-oxide semiconductor）
- 6. Moore’s law 6 • A prediction made by Moore (a co-founder of Intel) in 1965: “… a number of transistors to double every 2 years.”
- 7. Common Characteristics of the Same Logic Family Supply voltage range, speed of response, power dissipation, input and output logic levels, current sourcing and sinking capability, fan-out, noise margin, etc. Consequence: choosing digital ICs from the same logic family guarantees that these ICs are compatible with respect to each other and that the system as a whole performs the intended logic function. 7
- 8. Positve logic and Negative logic Positive logic: H is set to be binary 1 Negative logic: L is set to be binary 1
- 9. 10-2 Feature The feature to be concerned of IC logic families: ◦ fan-out The no. of standard loads can be connected to the output of the gate without degrading its normal operation Sometimes the term loading is used ◦ Power dissipation The power needed by the gate Expressed in mW ◦ Propagation delay The average transition-delay time for the signal to propagate from input to output when the binary signal changes in value ◦ Noise margin The unwanted signals are referred to as noise Noise margin is the maximum noise added to an input signal of a digital circuit that does not cause an undesirable change in the circuit output
- 11. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved. Computing fan-out ( High-level output)
- 12. Input and output current specifications 12
- 13. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved. Computing fan-out ( Low-level output)
- 15. Propagation delay 50% VH 50% VH 50% VH 50% VH For standard TTL ?)( 11,7 avgt nstnst P PLHPHL
- 16. Other delay times ◦Rise Time from 10% up to 90% level ◦FallTime from 90% down to 10% level
- 17. Noise margin
- 18. Noise margin High-state noise margin=0.4 Low-state noise margin=0.4
- 19. In the beginning… 19 Diode Logic (DL) • simplest; does not scale • NOT not possible (need an active element) = = Resistor-Transistor Logic (RTL) • replace diode switch with a transistor switch • can be cascaded • large power draw
- 20. was… 20 = Diode-Transistor Logic (DTL) • essentially diode logic with transistor amplification • reduced power consumption • faster than RTL DL AND gate Saturating inverter
- 21. 10-3 Feature of BJT BJT ◦ npn or pnp ◦ Si or Ge ◦ Si is used mainly ◦ npn is most popular
- 22. Table 10-1 Typical npn Transistor Parameters Region VBE (V) VCE (V) Current Relation Cutoff < 0.6 Open circuit IB=IC=0 Active 0.6-0.7 > 0.8 IC =hFEIB Saturation 0.7-0.8 0.2 IB ≥IC/hFE
- 23. Feature of npn-type BJT HVLV V VLh VHkR VVkR ii o FE B CCC andfor ?Find 2.0,50 5,22 5,1
- 24. Diode – symbol and characteristic
- 25. 10-4 RTL and DTL circuits RTL ◦ ResistorTL ◦ L: 0.2V, H: 1~3.6V DTL ◦ DiodeTL ◦ L: 0.2V, H: 4~5V
- 26. DL Example 26
- 27. RTL Example 27
- 28. DTL Example 28
- 29. RTL--NOR
- 30. DTL--NAND
- 31. Modified DTL
- 32. 10-5 Transistor-Transistor Logic (TTL) The original basicTTL gate was a slight improvement over the DTL gate. There are several TTL subfamilies or series of the TTL technology. Eight TTL series appear in Table 10-2. Has a number start with 74 and follows with a suffix that identifies the series type, e.g 7404, 74S86, 74ALS161. Three different types of output configurations: ◦ 1. open-collector output ◦ 2.Totem-pole output ◦ 3.Three-state (or tristate) output
- 34. TTL family evolution 34 Legacy: don’t use in new designs Widely used today
- 36. Wired-AND of Two Open-Collector
- 37. Open-Collector Gates Forming a Common Bus Line In this case Y = ?
- 38. TTL Gate withTotem-Pole Output
- 39. SchottkyTTL Gate
- 41. 10-6 Emitter-Coupled Logic (ECL) Nonsaturated digital logic family Propagation rate as low as 1-2ns Used mostly in high speed circuits Noise immunity and power dissipation is the worst of all logic families. High level -0.8V, Low level -1.8V Including ◦ Differential input amplifier ◦ Internal temperature and voltage compensated bias network ◦ Emitter-follower outputs
- 42. ECL Basic Gate
- 43. Graphic Symbols of ECL Gates