![REFERENCES
[1] Kaushi Roy, Saibal Mukhopadhyay and Hamid
Mahmoodi-Meimand, "Leakage current mechanisms
and leakage reduction techniques in deep-
submicrometer CMOS circuits", Proceedings of the
IEEE, 305-327, vol. 91, no.2, February 2003.
[2].Sung-Mo Kang and Yusuf Leblebici, Cmos Digital
Integrated Circuits, Tata McGraw-Hill Education,
2003.
[3]. Narain Arora, Mosfet Modeling for VLSI Simulation:
Theory and Practice, WORLD SCIENTIFIC, 2007](https://image.slidesharecdn.com/shortchanneleffects-180919050414/85/Short-channel-effects-11-320.jpg)
Short channel effects
- 2. CONTENTS SHORT CHANNEL DEVICE SHORT CHANNEL EFFECTS: DRAIN INDUCED BARRIER LOWERING DRAIN PUNCH THROUGH VELOCITY SATURATION IMPACT IONIZATION HOT ELECTRON EFFECT REFERENCES
- 3. SHORT CHANNEL DEVICE When the channel of the MOSFET becomes the same order of magnitude as the junction depth of source and drain, the device is said to be a short channel device. The short-channel effects are attributed to two physical phenomena: A) The limitation imposed on electron drift characteristics in the channel, B) The modification of the threshold voltage due to the shortening channel length.
- 4. SHORT CHANNEL EFFECTS 1. Drain-induced barrier lowering 2. Drain Punch Through 3. Velocity saturation 4. Impact ionization 5. Hot electrons
- 5. DRAIN INDUCED BARRIER LOWERING Under normal conditions (VDS=0 and VGS=0), there is a potential barrier that stops the electrons from flowing from source to drain. The gate voltage has the function of lowering this barrier down to the point where electrons are able to flow . Ideally, this would be the only voltage that would affect the barrier. However, as the channel becomes shorter, a larger VD widens the drain depletion region to a point that reduces the potential barrier . For this reason, this effect is aptly called Drain Induced Barrier Lowering (DIBL).
- 6. DRAIN PUNCH THROUGH When the drain is at high enough voltage with respect to the source, the depletion region around the drain may extend to the source, causing current to flow irrespective of gate voltage (i.e. even if gate voltage is zero). This is known as Drain Punch Through condition . So when channel length L decreases (i.e. short channel length case), punch through voltage rapidly decreases.
- 7. VELOCITY SATURATION The performance short-channel devices is also affected by velocity saturation. At low Ey, the electron drift velocity Vde in the channel varies linearly with the electric field intensity. However, as Ey increases the drift velocity tends to increase more slowly, and approaches a saturation value. The drain current is limited by velocity saturation instead of pinch off.
- 8. IMPACT IONIZATION Another undesirable short-channel effect, especially in NMOS, occurs due to the high velocity of electrons in presence of high longitudinal fields that can generate electron hole pairs by impact ionization. In case the generation of electron-hole pairs is very aggressive , two catastrophic effects can happen. One of them relates to the parasitic bipolar transistor that is formed by the junctions between source-bulk-drain. This transistor is normally turned off because the bulk is biased at the lowest voltage of the circuit.
- 9. • However, when holes are flowing through the bulk, they are causing a voltage drop at the parasitic resistance of the bulk itself. This, in turn, can active the BJT if the base-emitter (bulk-source) voltage exceeds 0.6-0.7 V. With the transistor on, electrons start flowing from the source to the bulk and drain, which can lead to even more generation of electron-hole pairs. •The most catastrophic case happens when the newly generated electrons become themselves hot carriers and knock out other atoms of the lattice. This in turn can create an avalanche effect, eventually leading to an overrun current that the gate voltage cannot control.
- 10. HOT ELECTRON EFFECT Another problem, related to high electric fields , is caused by so-called hot electrons. This high energy electrons can enter the oxide, where they can be trapped, giving rise to oxide charging that can accumulate with time and degrade the device performance by increasing VT and affect adversely the gate‟ s control on the drain current.
- 11. REFERENCES [1] Kaushi Roy, Saibal Mukhopadhyay and Hamid Mahmoodi-Meimand, "Leakage current mechanisms and leakage reduction techniques in deep- submicrometer CMOS circuits", Proceedings of the IEEE, 305-327, vol. 91, no.2, February 2003. [2].Sung-Mo Kang and Yusuf Leblebici, Cmos Digital Integrated Circuits, Tata McGraw-Hill Education, 2003. [3]. Narain Arora, Mosfet Modeling for VLSI Simulation: Theory and Practice, WORLD SCIENTIFIC, 2007