By
Mr. C.R.Shinde
Electrical Engineering Department
Matoshri College of Engineering & Research centre, Nashik
Unit 03: Digital memories and logic families
Digital memories:
SRAM, DRAM, ROM, EPROM
Digital logic families:
PAL,PLA, CPLD, FPGA
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 2
Module4 :- PLA
(Programmable Logic Array)
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 3
1. Introduction.
2. Block Diagram of PLA.
3. Basic Structure of PLA.
4. Advantages & Disadvantage of PLA.
5. Comparison of PAL & PLA.
Classification of PLDs.
PLD
SPLD
PAL PLA
CPLD FPGA
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 4
Block diagram
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 5
Block diagram
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 6
Basic Structure
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 7
Advantages of PLA
ď‚— PLA basic design required less time.
ď‚— Design can also be quickly tested.
ď‚— Design layout is much simpler .
ď‚— They can be produce in large volume.
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 8
Disadvantages of PLA
ď‚— The product term count restrict the application of PLA.
ď‚— It is not easy to use.
ď‚— It is difficult to manufacture,test and programmed.
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 9
Application.
ď‚— PLA is used as counter.
ď‚— PLA is used as Decoder.
ď‚— PLA is used to provide control over datapath.
ď‚— In programmed input/output PLA used as bus interface.
Unit 3_Module4
Matoshri College of Engineering & Research Center
Nashik 10
SR.NO PLA PAL
1 Both AND & OR array are
programmed
OR array is fixed AND array is
programmed
2 It is costly and complex They are simple.
3 AND array can be programmed to
get desired minterms
AND array can be programmed to get
desired Maxterm
4 Any Boolean function in SOP form
can be implemented using PLA
Any Boolean function in SOP form can
be implemented using PAL
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 11
Module 4
Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 12
1. Introduction.
2. Block Diagram of PLA.
3. Basic Structure of PLA.
4. Advantages & Disadvantage of PLA.
5. Comparison of PAL & PLA
Thank you
Mr. C. R. Shinde
Electrical Engineering Department
Matoshri College of Engineering & Research centre, Nashik
If you have any query, ask me anytime on…… … .. . . .
cshinde58@gmail.com
chandrakant.shinde@matoshri.edu.in
9970031353
Unit 3_Module4
Matoshri College of Engineering & Research Center
Nashik 13

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Module 4: PLA

  • 1. By Mr. C.R.Shinde Electrical Engineering Department Matoshri College of Engineering & Research centre, Nashik
  • 2. Unit 03: Digital memories and logic families Digital memories: SRAM, DRAM, ROM, EPROM Digital logic families: PAL,PLA, CPLD, FPGA Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 2
  • 3. Module4 :- PLA (Programmable Logic Array) Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 3 1. Introduction. 2. Block Diagram of PLA. 3. Basic Structure of PLA. 4. Advantages & Disadvantage of PLA. 5. Comparison of PAL & PLA.
  • 4. Classification of PLDs. PLD SPLD PAL PLA CPLD FPGA Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 4
  • 5. Block diagram Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 5
  • 6. Block diagram Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 6
  • 7. Basic Structure Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 7
  • 8. Advantages of PLA ď‚— PLA basic design required less time. ď‚— Design can also be quickly tested. ď‚— Design layout is much simpler . ď‚— They can be produce in large volume. Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 8
  • 9. Disadvantages of PLA ď‚— The product term count restrict the application of PLA. ď‚— It is not easy to use. ď‚— It is difficult to manufacture,test and programmed. Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 9
  • 10. Application. ď‚— PLA is used as counter. ď‚— PLA is used as Decoder. ď‚— PLA is used to provide control over datapath. ď‚— In programmed input/output PLA used as bus interface. Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 10
  • 11. SR.NO PLA PAL 1 Both AND & OR array are programmed OR array is fixed AND array is programmed 2 It is costly and complex They are simple. 3 AND array can be programmed to get desired minterms AND array can be programmed to get desired Maxterm 4 Any Boolean function in SOP form can be implemented using PLA Any Boolean function in SOP form can be implemented using PAL Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 11
  • 12. Module 4 Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 12 1. Introduction. 2. Block Diagram of PLA. 3. Basic Structure of PLA. 4. Advantages & Disadvantage of PLA. 5. Comparison of PAL & PLA
  • 13. Thank you Mr. C. R. Shinde Electrical Engineering Department Matoshri College of Engineering & Research centre, Nashik If you have any query, ask me anytime on…… … .. . . . cshinde58@gmail.com chandrakant.shinde@matoshri.edu.in 9970031353 Unit 3_Module4 Matoshri College of Engineering & Research Center Nashik 13