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IET MATERIALS, CIRCUITS AND DEVICES SERIES 80
Physical Biometrics for
Hardware Security of DSP
and Machine Learning
Co-processors

Other volumes in this series:
Volume 2 Analogue IC Design: The current-mode approach C. Toumazou, F.J. Lidgey
and D.G. Haigh (Editors)
Volume 3 Analogue-Digital ASICs: Circuit techniques, design tools and applications
R.S. Soin, F. Maloberti and J. France (Editors)
Volume 4 Algorithmic and Knowledge-based CAD for VLSI G.E. Taylor and G. Russell
(Editors)
Volume 5 Switched Currents: An analogue technique for digital technology
C. Toumazou, J.B.C. Hughes and N.C. Battersby (Editors)
Volume 6 High-Frequency Circuit Engineering F. Nibler et al.
Volume 8 Low-Power High-Frequency Microelectronics: A unified approach
G. Machado (Editor)
Volume 9 VLSI Testing: Digital and mixed analogue/digital techniques S.L. Hurst
Volume 10 Distributed Feedback Semiconductor Lasers J.E. Carroll, J.E.A. Whiteaway
and R.G.S. Plumb
Volume 11 Selected Topics in Advanced Solid State and Fibre Optic Sensors
S.M. Vaezi-Nejad (Editor)
Volume 12 Strained Silicon Heterostructures: Materials and devices C.K. Maiti, N.B.
Chakrabarti and S.K. Ray
Volume 13 RFIC and MMIC Design and Technology I.D. Robertson and S. Lucyzyn
(Editors)
Volume 14 Design of High-Frequency Integrated Analogue Filters Y. Sun (Editor)
Volume 15 Foundations of Digital Signal Processing: Theory, algorithms and
hardware design P. Gaydecki
Volume 16 Wireless Communications Circuits and Systems Y. Sun (Editor)
Volume 17 The Switching Function: Analysis of power electronic circuits C. Marouchos
Volume 18 System on Chip: Next-generation electronics B. Al-Hashimi (Editor)
Volume 19 Test and Diagnosis of Analogue, Mixed-Signal and RF Integrated Circuits:
The system on chip approach Y. Sun (Editor)
Volume 20 Low-Power and Low-Voltage Circuit Design with the FGMOS Transistor
E. Rodriguez-Villegas
Volume 21 Technology Computer-Aided Design for Si, SiGe and GaAs Integrated
Circuits C.K. Maiti and G.A. Armstrong
Volume 22 Nanotechnologies M. Wautelet et al.
Volume 23 Understandable Electric Circuits M. Wang
Volume 24 Fundamentals of Electromagnetic Levitation: Engineering sustainability
through efficiency A.J. Sangster
Volume 25 Optical MEMS for Chemical Analysis and Biomedicine H. Jiang (Editor)
Volume 26 High Speed Data Converters A.M.A. Ali
Volume 27 Nano-Scaled Semiconductor Devices E.A. Gutiérrez-D (Editor)
Volume 28 Security and Privacy for Big Data, Cloud Computing and Applications
L. Wang, W. Ren, K.R. Choo and F. Xhafa (Editors)
Volume 29 Nano-CMOS and Post-CMOS Electronics: Devices and modelling
Saraju P. Mohanty and Ashok Srivastava
Volume 30 Nano-CMOS and Post-CMOS Electronics: Circuits and design
Saraju P. Mohanty and Ashok Srivastava
Volume 32 Oscillator Circuits: Frontiers in design, analysis and applications
Y. Nishio (Editor)
Volume 33 High-Frequency MOSFET Gate Drivers Z. Zhang and Y. Liu
Volume 34 RF and Microwave Module Level Design and Integration M. Almalkawi
Volume 35 Design of Terahertz CMOS Integrated Circuits for High-Speed Wireless
Communication M. Fujishima and S. Amakawa
Volume 38 System Design with Memristor Technologies L. Guckert and
E.E. Swartzlander Jr.
Volume 39 Functionality-Enhanced Devices: An alternative to Moore’s law
P-E. Gaillardon (Editor)
Volume 40 Digitally Enhanced Mixed Signal Systems C. Jabbour, P. Desgreys and
D. Dallett (Editors)

Volume 43 Negative Group Delay Devices: From concepts to applications B. Ravelo
(Editor)
Volume 45 Characterisation and Control of Defects in Semiconductors F. Tuomisto
(Editor)
Volume 47 Understandable Electric Circuits: Key concepts. 2nd Edition
M. Wang
Volume 48 Gyrators, Simulated Inductors and Related Immittances: Realizations and
applications R. Senani, D.R. Bhaskar, V.K. Singh, and A.K. Singh
Volume 49 Advanced Technologies for Next Generation Integrated Circuits
A. Srivastava and S. Mohanty (Editors)
Volume 51 Modelling Methodologies in Analogue Integrated Circuit Design G. Dundar
and M.B. Yelten (Editors)
Volume 53 VLSI Architectures for Future Video Coding. M. Martina (Editor)
Volume 54 Advances in High-Power Fiber and Diode Laser Engineering Ivan Divliansky
(Editor)
Volume 55 Hardware Architectures for Deep Learning M. Daneshtalab and
M. Modarressi
Volume 57 Cross-Layer Reliability of Computing Systems Giorgio Di Natale, Alberto
Bosio, Ramon Canal, Stefano Di Carlo, and Dimitris Gizopoulos (Editors)
Volume 58 Magnetorheological Materials and Their Applications S. Choi and
W. Li (Editors)
Volume 59 Analysis and Design of CMOS Clocking Circuits for Low-Phase Noise
W. Bae and D.K. Jeong
Volume 60 IP Core Protection and Hardware-Assisted Security for Consumer
Electronics A. Sengupta and S. Mohanty
Volume 63 Emerging CMOS Capacitive Sensors for Biomedical Applications: A
multidisciplinary approach Ebrahim Ghafar-Zadeh and Saghi Forouhi
Volume 64 Phase-Locked Frequency generation and Clocking: Architectures and
circuits for modem wireless and wireline systems W. Rhee (Editor)
Volume 65 MEMS Resonator Filters Rajendra M. Patrikar (Editor)
Volume 66 Frontiers in Hardware Security and Trust: Theory, design and practice
C.H. Chang and Y. Cao (Editors)
Volume 67 Frontiers in Securing IP Cores; Forensic detective control and obfuscation
techniques A. Sengupta
Volume 68 High-Quality Liquid Crystal Displays and Smart Devices: Vol 1 and Vol 2
S. Ishihara, S. Kobayashi, and Y. Ukai (Editors)
Volume 69 Fibre Bragg Gratings in Harsh and Space Environments: Principles and
applications B. Aı̈ssa, E.I. Haddad, R.V. Kruzelecky, and W.R. Jamroz
Volume 70 Self-Healing Materials: From fundamental concepts to advanced space
and electronics applications, 2nd Edition
B. Aı̈ssa, E.I. Haddad, R.V. Kruzelecky, and W.R. Jamroz
Volume 71 Radio Frequency and Microwave Power Amplifiers: Vol 1 and Vol 2
A. Grebennikov (Editor)
Volume 72 Tensorial Analysis of Networks (TAN) Modelling for PCB Signal Integrity
and EMC Analysis Blaise Ravelo and Zhifei Xu (Editors)
Volume 73 VLSI and Post-CMOS Electronics Volume 1: VLSI and Post-CMOS
Electronics and Volume 2: Materials, devices and interconnects R. Dhiman
and R. Chandel (Editors)
Volume 75 Understandable Electronic Devices: Key concepts and circuit design
M. Wang
Volume 76 Secured Hardware Accelerators for DSP and Image Processing
Applications Anirban Sengupta
Volume 77 Integrated Optics Volume 1: Modeling, material platforms and fabrication
techniques and Volume 2: Characterization, devices, and applications
G. Righini and M. Ferrari (Editors)

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Physical Biometrics for
Hardware Security of DSP
and Machine Learning
Co-processors
Anirban Sengupta
The Institution of Engineering and Technology

Published by The Institution of Engineering and Technology, London, United Kingdom
The Institution of Engineering and Technology is registered as a Charity in England &
Wales (no. 211014) and Scotland (no. SC038698).
† The Institution of Engineering and Technology 2023
First published 2023
This publication is copyright under the Berne Convention and the Universal Copyright
Convention. All rights reserved. Apart from any fair dealing for the purposes of research
or private study, or criticism or review, as permitted under the Copyright, Designs and
Patents Act 1988, this publication may be reproduced, stored or transmitted, in any
form or by any means, only with the prior permission in writing of the publishers, or in
the case of reprographic reproduction in accordance with the terms of licences issued
by the Copyright Licensing Agency. Enquiries concerning reproduction outside those
terms should be sent to the publisher at the undermentioned address:
The Institution of Engineering and Technology
Futures Place
Kings Way, Stevenage
Hertfordshire SG1 2UA, United Kingdom
www.theiet.org
While the authors and publisher believe that the information and guidance given in this
work are correct, all parties must rely upon their own skill and judgement when making
use of them. Neither the author nor publisher assumes any liability to anyone for any
loss or damage caused by any error or omission in the work, whether such an error or
omission is the result of negligence or any other cause. Any and all such liability is
disclaimed.
The moral rights of the author to be identified as author of this work have been
asserted by him in accordance with the Copyright, Designs and Patents Act 1988.
British Library Cataloguing in Publication Data
A catalogue record for this product is available from the British Library
ISBN 978-1-83953-821-6 (hardback)
ISBN 978-1-83953-822-3 (PDF)
Typeset in India by MPS Limited
Printed in the UK by CPI Group (UK) Ltd, Croydon
Cover Image: Paper Boat Creative/Stone via Getty Images

Contents
Acknowledgements xiii
Preface xv
Authors’ Biography xix
Professional leadership role in scientific community – editors xxi
1 Introduction: secured co-processors for machine learning and DSP
applications using biometrics 1
Anirban Sengupta and Mahendra Rathor
1.1 Security of co-processors: an introduction, hardware threats, and
conventional security solutions 1
1.2 Role of behavioral synthesis design process in security of
co-processors 5
1.3 Introduction to ML co-processors and their security 7
1.3.1 What are ML algorithms and their co-processors 7
1.3.2 Why modern systems need ML co-processors and why to
secure them 8
1.3.3 Role of behavioral synthesis in designing and securing
ML co-processors 9
1.4 Introduction to DSP co-processors and their security: a behavioral
synthesis perspective in designing and securing DSP co-processors 10
1.5 Biometric security for ML and DSP co-processors 12
1.5.1 How biometric security for hardware authentication is
different than a user authentication 13
1.5.2 Why biometric security is required for hardware protection:
advantages over traditional security mechanisms 13
1.5.3 Types of different physical biometric-based mechanisms
for hardware security 14
1.6 Questions and exercise 20
References 20
2 Integrated defense using structural obfuscation and encrypted
DNA-based biometric for hardware security 25
Anirban Sengupta and Rahul Chaurasia
2.1 Introduction 25
2.2 Background on DNA/genome sequencing 27
2.3 State-of-the-art: discussion and analysis 28
2.3.1 Hardware steganography 28

2.3.2 Hardware watermarking 29
2.3.3 Hash-based digital signature 29
2.4 Integrated defense using structural obfuscation and encrypted
DNA-based biometric for hardware security 30
2.4.1 Extracting DNA signature from IP vendor body sample 32
2.4.2 Encryption of the DNA signature using DES algorithm 35
2.4.3 Encoding of the encrypted DNA signature for conversion
into secret constraints for hardware security 40
2.4.4 Embedding of the secret DNA signature into design 44
2.5 Detection/validation of embedded encrypted DNA signature in
RT level design 47
2.6 Discussion and analysis 48
2.6.1 Security properties/parameters of encrypted DNA signature 48
2.6.2 Security analysis of structural obfuscation 49
2.6.3 Security analysis of encrypted DNA signature 50
2.6.4 Design cost analysis 52
2.7 Conclusion 53
References 54
3 Facial signature-based biometrics for hardware security and IP core
protection 57
3.1 Introduction 57
3.2 Importance of HLS for designing DSP co-processors 60
3.3 Alternative techniques used for IPP of DSP co-processors 62
3.3.1 Fingerprint biometric 62
3.3.2 Hardware watermarking and steganography 63
3.3.3 Hash-based digital signature 65
3.4 Features of facial biometrics for IPP and its advantages over
fingerprint biometrics 65
3.5 Summary of facial biometric methodology for IPP 68
3.6 Details of facial biometric methodology for IPP 70
3.6.1 Capturing facial biometric of IP vendor and subjecting to a
specific grid size and spacing 70
3.6.2 Generate facial nodal feature points 70
3.6.3 Assign naming convention on facial nodal feature points 72
3.6.4 Determining feature dimensions 73
3.6.5 Generating facial signature for IP vendor-defined feature order 74
3.7 Security properties of facial biometric methodology for hardware
security 82
3.8 Analysis and discussion 84
3.8.1 Analyzing the security strength based on varying facial
signature 84
3.8.2 Security analysis 85
viii Physical biometrics for hardware security DSP and ML co-processors

3.9 Conclusion 89
References 91
4 Secured convolutional layer hardware co-processor in convolutional
neural network (CNN) using facial biometric 93
4.1 Introduction 94
4.2 Why to design secured CNN convolutional layer co-processor
IP core? 95
4.3 Benefits of the approach 95
4.4 Summary of existing approaches in the literature 96
4.5 Background on CNN framework 97
4.6 Overview of the approach for designing a secured CNN
convolutional co-processor IP core using facial biometric 99
4.7 Details of the approach 100
4.7.1 HLS flow of the approach for designing secured
convolutional hardware IP core in CNN 100
4.7.2 Constructing DFG of CNN convolutional IP core 102
4.7.3 Scheduling the IP core design and generating register
allocation information 107
4.7.4 Details of generating facial biometric signature 110
4.7.5 Demonstration of securing IP core through facial biometric 114
4.7.6 Data path synthesis 120
4.7.7 Demonstration of the methodology 129
4.8.1 Analyzing the convolutional IP core design in terms of
computation of pixels 139
4.8.2 Analyzing the change in resources (Muxes and Demuxes)
of RTL datapath design post-implanting facial biometric
signature of IP vendor 139
4.8.3 Analyzing the security strength 140
4.8.4 Analyzing the design area 142
4.9 Conclusion 143
References 144
5 Handling symmetrical IP core protection and IP protection (IPP) of
Trojan-secured designs in HLS using physical biometrics 147
5.1 Introduction 148
5.2 Contemporary approaches for symmetric IP core protection 151
5.2.1 Symmetrical IP core protection in HLS using
watermarking and fingerprinting 154
5.3 HLS-based symmetrical IP core protection using IP buyer
fingerprint biometric and IP seller facial biometric 156
5.3.1 Summary 156
Contents ix

5.3.2 Deriving fingerprint security constraints of IP buyer 157
5.3.3 Deriving facial security constraints of IP seller 162
5.3.4 Embedding the fingerprint security constraints of IP buyer
in DSP design 168
5.3.5 Embedding the facial security constraints of IP seller in
IP buyer fingerprint biometric-embedded DSP design 171
5.4 Protecting an IP seller (vendor) right against false ownership claim
using facial biometric signature 174
5.5 Protecting an IP buyer’ right using fingerprint biometric signature 175
5.6 Detecting IP piracy before integration into SoC systems 177
5.7 Employing facial biometric for protecting Trojan-secured SoC
design against piracy 178
5.7.1 Threat model 178
5.7.2 Summary 178
5.7.3 Designing Trojan-secured design architecture 180
5.7.4 Generating facial signature-driven secret constraints for
hardware security 183
5.7.5 Embedding the extracted facial security constraints into
Trojan-secured design 185
5.8.1 Analyzing security and design cost of symmetric IP core
protection using facial and fingerprint biometric for DSP
applications 187
5.8.2 Analyzing security and design cost overhead of facial
biometric embedded Trojan-secured DSP design 190
5.9 Conclusion 193
References 195
6 Palmprint biometrics vs. fingerprint biometrics vs. digital signature
using encrypted hash: qualitative and quantitative comparison for
security of DSP coprocessors 199
Anirban Sengupta and Aditya Anshul
6.2 Threat model 202
6.3 Fingerprint biometric for IPP of DSP coprocessors: 202
6.3.1 Summary of fingerprint biometric 202
6.3.2 Details of fingerprint biometric methodology 202
6.3.3 Embedding of fingerprint biometric signature on FIR filter 205
6.3.4 Detection and validation of fingerprint biometrics for
detective control against IP piracy and nullifying fraud
claim of IP ownership 208
6.4 Palmprint biometric for IPP of DSP coprocessors 209
6.4.1 Summary of approach 209
6.4.2 Embedding of palmprint biometric signature on FIR filter 213
x Physical biometrics for hardware security DSP and ML co-processors

6.4.3 Detection and validation of palmprint biometric for
detective control against IP piracy and nullifying fraud
claim of IP ownership 213
6.5 Digital signature using encrypted hash for IPP of DSP coprocessors 214
6.5.1 Summary of approach 214
6.5.2 Details of the approach 214
6.6 Qualitative comparison between fingerprint biometric for IPP vs.
digital signature for IPP, digital signature for IPP vs. palmprint
biometric for IPP, digital signature for IPP vs. palmprint
biometric for IPP 216
6.7 Analysis and discussions of results 220
6.8 Conclusion 223
References 224
7 Secured design flow using palmprint biometrics, steganography,
and PSO for DSP coprocessors 227
7.2 Emerging and contemporary approaches for IP core
protection (IPP) 228
7.3 Threat model and PSO-driven design space exploration 228
7.3.1 PSO-driven design space exploration in HLS 228
7.3.2 Advantage of PSO over other search space algorithms 231
7.4 Palmprint biometric-based hardware security approach 231
7.4.1 Overview of the low-cost palmprint-based hardware
security approach 231
7.4.2 Details of the palmprint-based hardware security approach 234
7.5 Low-cost steganography-based hardware security approach 236
7.5.1 Overview of the low-cost steganography-based hardware
7.5.2 Details of steganography-based hardware security approach 236
7.6 Designing low-cost secured DCT core datapath using discussed
methodologies 238
7.6.1 Mathematical framework (transfer function for DCT core) 238
7.6.2 Designing DCT core datapath using low-cost palmprint
biometric hardware security 239
7.6.3 Designing DCT core datapath using low-cost
steganographic-based hardware security 244
7.7 Analysis and discussions 246
7.7.1 Design cost analysis of low-cost palmprint biometric-based
7.7.2 Design cost analysis of low-cost steganography-based
7.7.3 Security analysis of low-cost palmprint biometric-based
Contents xi

7.7.4 Security analysis of low-cost steganography-based
7.8 Conclusion 256
References 257
8 Methodology for exploration of security–design cost trade-off for
signature-based security algorithms 259
8.2 Why perform security–design cost trade-off? 261
8.3 Summary of “Signature based Security Algorithms for Hardware
IPs” in the literature 261
8.4 Methodology for exploration of security–design cost trade-off
for signature-based security 265
8.4.1 Summary 265
8.4.2 Details 266
8.5.1 Security analysis 282
8.5.2 Analyzing the impact of signature strength on fitness
value and register count for DSP applications 285
8.5.3 Analyzing the security algorithms in terms of hardware
cost, embedded security constraints, and exploration time 286
8.6 Conclusion 294
References 295
9 Taxonomy of hardware security methodologies: IP core protection
and obfuscation 299
9.2 Possible hardware threats and attacks in the design flow of
hardware IC 302
9.3 Taxonomy representation of IP core protection methodologies 304
9.3.1 Watermarking-based hardware security approach 305
9.3.2 Steganography-based hardware security approach 307
9.4 Taxonomy representation of obfuscation methodologies 311
9.4.1 Structural obfuscation-based security approach 312
9.4.2 Functional obfuscation-based security approach 314
9.5 Low-cost steganography-based hardware security approach 316
9.6 Comparison between various hardware security methodologies 318
9.7 Conclusion 320
References 322
Index 325
xii Physical biometrics for hardware security DSP and ML co-processors

Acknowledgements
I would like to thank my family and friends for the support and encouragement
throughout the execution of the book project. I would also like to thank Indian
Institute of Technology (IIT) Indore for the support in executing this work.

Preface
This book on “Hardware Security of DSP and Machine Learning Coprocessors
using Biometrics” presents state-of-the art explanations for securing and protect-
ing digital signal processing (DSP) and machine-learning coprocessors (hardware
intellectual property (IP) cores) against hardware threats. DSP coprocessors such as
FIR filters, image processing filters, discrete Fourier transform, and JPEG com-
pression hardware are extensively utilized in several real-life applications. Further
machine-learning coprocessors such as convolutional neural network (CNN)
hardware IP core can play a vital role in several applications such as face recog-
nition, medical imaging, autonomous driving, and biometric authentication. Thus
security/protection of these hardware coprocessors against hardware threats such as
IP abuse/misuse that includes fraud claim of IP ownership and IP piracy becomes
extremely vital. This book presents state-of-the art hardware security solutions for
such DSP and machine learning coprocessors using biometric as well as other
techniques.
Broadly the theme of this book includes the following:
● Chapter 1 presents an “Introduction: secured co-processors for machine-
learning and DSP applications using biometrics”. This chapter discusses
background on securing hardware coprocessors including its hardware threats.
It also discusses the role of behavioral synthesis design process in the security
and IP core protection of hardware coprocessors. It further highlights basic
details of biometric security used for machine learning and DSP coprocessors.
● Chapter 2 presents “Integrated defense using structural obfuscation and
encrypted DNA-based biometric for hardware security”. The significant
features of this chapter include highlighting the background on DNA/genome
sequencing, fundamentals of hardware watermarking, hardware steganography
and hash-based digital signature. It also discusses in details the process of
integrated defense using structural obfuscation and encrypted DNA-based
biometric for hardware security.
● Chapter 3 presents “Facial signature-based biometrics for hardware
security and IP core protection”. The significant features of this chapter
include discussion on the importance of high-level synthesis for designing-
secured DSP coprocessors., advantages of employing facial biometric over
fingerprint biometric for IP core protection of hardware coprocessors. Finally,
it discusses the detailed methodology of employing facial biometric for
securing DSP coprocessors.

● Chapter 4 presents “Secured convolutional layer hardware co-processor in
convolutional neural network (CNN) using facial biometric”. The sig-
nificant features of this chapter include discussion on why designing CNN
convolutional layer IP core is important. It also discusses the detailed approach
for designing a secured CNN convolutional coprocessor IP core using facial
biometric.
● Chapter 5 presents “Handling symmetrical IP core protection and IP
protection (IPP) of Trojan-secured designs in HLS using physical bio-
metrics”. The significant features of this chapter include a discussion on HLS-
based symmetrical IP core protection using IP buyer fingerprint biometric and
IP seller facial biometric. It also discusses the process of employing
facial biometric for protecting Trojan-secured system-on-chip design against
piracy.
● Chapter 6 presents “Palmprint biometrics vs. fingerprint biometrics vs.
digital signature using encrypted hash: qualitative and quantitative com-
parison for security of DSP coprocessors”. The significant features of this
chapter include overview on palmprint biometric based IP core protection,
fingerprint biometric-based IP core protection as well as digital signature-
based IP core protection. It also provides a qualitative and quantitative com-
parison between palmprint biometric, fingerprint biometric and digital sig-
nature in terms of IP core protection and hardware security.
● Chapter 7 presents “Secured design flow using palmprint biometrics, ste-
ganography and PSO for DSP coprocessors”. This chapter highlights the
low-cost steganography based hardware security design flow using palmprint
biometric and steganography. It also provides analysis on various case studies
in terms of design cost analysis and security.
● Chapter 8 presents “Methodology for exploration of security-design cost
tradeoff for signature-based security algorithms”. The significant features
of this chapter include motivation on performing security-design cost tradeoff,
summary of ‘signature-based security algorithms for hardware IPs’ in the lit-
erature and the methodology for exploration of security-design cost tradeoff
for signature-based security algorithms.
● Chapter 9 presents “Taxonomy of hardware security methodologies: IP
core protection and obfuscation”. The significant features of this chapter
include discussion on possible hardware threats and attacks in the design flow
of hardware integrated circuits, taxonomy representation of IP core protection
methodologies and taxonomy representation of obfuscation methodologies.
Authors believe that there is no book that presents details of hardware security
of DSP and machine learning coprocessors using biometrics, under one canopy. By
covering chapters under this special topic, it will empower readers to drive their
borders of knowledge to plunge into some latest security and design aspects of
modern hardware coprocessors, especially for DSP and machine-learning applica-
tions. The book is prepared keeping in mind that can be easily integrated to any
xvi Physical biometrics for hardware security DSP and ML co-processors

graduate level course. Furthermore, it also serves as designer’s hand-book who is
eager to integrate hardware security solutions for DSP and machine learning
applications.
—————————————————
Sincerely,
Book Author
Dr. Anirban Sengupta, Ph.D., Assoc. Professor
Fellow of IET, Fellow of British Computer Society (BCS), Fellow of IETE,
Senior Member of IEEE
IEEE Distinguished Lecturer (IEEE Consumer Electronics Society)
IEEE Distinguished Visitor (IEEE Computer Society)
Former Board Member and Former Chair, IEEE CTSoc Security and
Privacy of CE Hardware and Software Systems (SPC) Technical Committee (TC)
Former Chair, IEEE Computer Society Technical Committee on VLSI
Founder & Former Chair, IEEE Consumer Technology Society Bombay
Chapter (Now MP Chapter)
Deputy Editor-in-Chief, IET Computers & Digital Techniques,
Editor-in-Chief, IEEE VLSI Circuits and Systems Letter
Awardee, IEEE Chester Sall Memorial Consumer Electronics Award (IEEE
CE Society)
Associate Editor – IEEE Transactions on VLSI Systems, IEEE Transactions
on Consumer Electronics
Former Editorial Board Member – IEEE Transactions on Aerospace and
Electronic Systems, IEEE Access, IEEE Consumer Electronics Magazine, IET
Computers and Digital Techniques, IEEE Letters of the Computer Society, IEEE
Canadian Journal of Electrical and Computer Engineering, Elsevier
Microelectronics Journal
General Chair, 37th IEEE International Conference on Consumer Electronics
(ICCE), Las Vegas
General Chair, 23rd International Symposium on VLSI Design and Test
(VDAT-2019), India
Executive Committee, IEEE International Conference on Consumer
Electronics (ICCE) – Berlin and Las Vegas
IEEE Distinguished Lecturer Nominations Committee, IEEE CE Society
Computer Science and Engineering
Indian Institute of Technology Indore
Email: asengupt@iiti.ac.in
Web: http://www.anirban-sengupta.com
Preface xvii

Authors’ Biography
Anirban Sengupta is an associate professor in the Discipline of
Computer Science and Engineering at Indian Institute of
Technology (IIT) Indore. He has around 270 publications and
patents, 50 book chapters and 5 books.
His is a recipient of awards/honors such as Fellow of IET,
Fellow of British Computer Society, Fellow of IETE, IEEE Chester
Sall Memorial Consumer Electronics Award, IEEE Distinguished
Lecturer, IEEE Distinguished Visitor, IEEE CESoc Outstanding Editor Award,
IEEE CESoc Best Research Award from CEM, Best Research paper Award
in IEEE ICCE 2019, IEEE Computer Society TCVLSI Outstanding Editor Award
and IEEE TCVLSI Best Paper Award in IEEE iNIS 2017. He held/holds around
17 Editorial positions in IEEE/IET Journals. He is the Editor-in-Chief of IEEE
VCAL (Computer Society TCVLSI), Deputy EiC of IET Computers & Digital
Techniques and General Chair of 37th IEEE Int’l Conference on Consumer
Electronics (ICCE) 2019, Las Vegas. He is consistently ranked in Stanford
University’s Top 2% Scientists globally across all domains. Complete details
available at: http://www.anirban-sengupta.com/index.php

Professional leadership role in scientific
community – editors
● Deputy Editor-in-Chief: IET Computers and Digital Techniques (2018–
Present)
● Editor-in-Chief: IEEE VLSI Circuits & Systems Letter, IEEE CS-TC on VLSI
(2017–2020)
● Associate Editor: IEEE Transactions on VLSI Systems (TVLSI) (2018–
Present)
● Associate Editor: IEEE Transactions on Aerospace & Electronics Systems
(TAES) (2016–2020)
● Associate Editor: IEEE Transactions on Consumer Electronics (TCE) (2019–
Present)
● Guest Editor: IEEE Transactions on VLSI Systems (TVLSI) (2016–2017)
● Guest Editor: IEEE Transactions on CAD of Integrated Circuits & Systems
(TCAD) (2019–2020)
● Associate Editor, IEEE Letters of the Computer Society (LOCS) (2019–2020)
● Associate Editor: IET Computers and Digital Techniques (CDT) (2015–2018)
● Senior Editor: IEEE Consumer Electronics Magazine (CEM) (2017–2019)
● Associate/Executive Editor: IEEE Consumer Electronics Magazine (CEM)
(2016–2017)
● Associate Editor: IEEE Canadian Journal of Electrical and Computer
Engineering (2018–2020)
● Associate Editor: IEEE Access (2015–2018)
● Associate Editor: IEEE VLSI Circuits & Systems Letter (2015–2017)
● Guest Editor: IEEE Access Journal (2016–2017)
● Guest Editor: IET Computers and Digital Techniques (CDT) (2017–2018)
● Editor: Elsevier Microelectronics Journal (2016–2018)

Chapter 1
Introduction: secured co-processors for
machine learning and DSP applications
using biometrics
Anirban Sengupta1
and Mahendra Rathor2
The chapter gives an introduction on security requirements of co-processors for
machine learning (ML) and digital signal processing (DSP) applications and the
role of biometrics in securing them. This introduction of the book tries to build
interest in readers about the various DSP and ML co-processors; behavioral
synthesis design process for generating secured DSP and ML co-processors and
importance of biometric security for hardware authentication.
The chapter is organized as follows: Section 1.1 introduces about the
co-processors, different hardware threats, and conventional security solutions;
Section 1.2 highlights the significance of behavioral synthesis in designing and
securing co-processors; Section 1.3 introduces about the co-processors for ML
applications, why ML co-processors need to be secured, and how behavioral
synthesis plays a crucial role in securing ML co-processors; Section 1.4 introduces
about the behavioral synthesis perspective in designing and securing DSP
co-processors; Section 1.5 introduces about the biometric security based on
fingerprint, face, and palmprint for ML and DSP co-processors.
1.1 Security of co-processors: an introduction, hardware
threats, and conventional security solutions
Modern human life is enriched with a number of electronic devices and gadgets such
as television, cell phones, laptops, tablets, smart wearable, and digital camera. This
could be possible with the tremendous advancement in research and technology. The
technological advancement has not only made our day-to-day life sophisticated and
comfortable but also played a pivotal role in the life critical systems such as
healthcare, military, and defense. Be it a consumer field, banking, or any critical
infrastructure, co-processors used in the electronic systems have proved themselves
1
Department of Computer Science and Engineering, Indian Institute of Technology Indore, India
2
Software Innovation Center, Indian Institute of Technology BHU, India

to be very useful (Pilato et al., 2018; Sengupta et al., 2017a). Figure 1.1 shows some
typical applications of co-processors in consumer and life critical systems.
A co-processor can be defined as a dedicated hardware unit used for processing
some specific computations or executing intended functionalities. Examples of
some co-processors are as follows:
● Digital signal processing (DSP) co-processors are used for processing DSP
algorithms such as infinite impulse response (IIR) filter, finite impulse
response (FIR) filter, discrete cosine transform (DCT), inverse discrete cosine
transform (IDCT), and discrete wavelet transform (DWT) (Mahdiany et al.,
2001; Sengupta et al., 2017a).
● Multimedia co-processors are used to execute dedicated multimedia applica-
tions such as image compression/decompression, audio encoding/decoding,
and video encoding/decoding (Sengupta et al., 2018).
● ML co-processors are used to execute dedicated ML applications such as
artificial neural network (ANN), convolutional neural network (CNN), linear
regression (LR), and support vector machine (SVM) (Lemley et al., 2017;
Sengupta and Chaurasia, 2022; Spencer et al., 2019; Struharik et al., 2018;
Zhao et al., 2017).
Co-processors
Processor and other
modules
Healthcare systems Consumer electronics
Military equipment
Chip inside electronic
systems
Figure 1.1 Co-processors used in various consumer and critical systems
2 Physical biometrics for hardware security DSP and ML co-processors

The co-processors mentioned above are widely employed in modern system-
on-chip (SoC) designs to cater a wide variety of DSP, multimedia, and ML appli-
cations. The use of co-processors in the modern systems offers high performance
by offloading the general purpose processor or central processing unit from their
heavy computational load. Because of delivering acceleration in performance, the
co-processors are also referred to as hardware accelerators. Though the advantage
of achieving hardware acceleration is traded-off with the cost of additional area, the
high-performance requirement in the modern systems overpowers this limitation.
Hardware threats to co-processors or IP cores and conventional security
solutions: After giving a brief introduction on co-processor, its different types, and
utility in modern systems, let us also discuss about its security perspective. The security
threats to the co-processors have come into the limelight because of globalization of
design supply chain. A whole process of designing co-processors or hardware accel-
erators or semiconductor intellectual property (IP) cores is generally not carried within a
single house by a single entity. The current design supply chain involves various entities
or offshore design houses and fabrication units (foundries) in the journey of obtaining a
co-processor chip from its specifications. The entire very large-scale integration (VLSI)
design process of obtaining an integrated circuit (IC)/chip from its specifications is
distributed into various design phases namely determining chip specifications, high-
level synthesis (HLS)/behavioral synthesis, logic synthesis, layout or physical synthesis,
and chip fabrication (Sengupta, 2016, 2017). Some important reasons behind the
execution of these different design phases in different design houses and foundry are as
follows (Sengupta, 2020; Sengupta and Mohanty, 2019):
(i) Increasing design complexity of system-on-chips and time-to-market pressure
demands modular design paradigm where entire system functionality is divided
into different modules. The various modules, also referred to as cores, are
procured from different vendors by the SoC integrator. The procurement of pre-
designed and pre-verified IP cores or design modules from outside design
houses reduces not only the design complexity but also the design time.
(ii) Cost of building and maintaining a fabrication facility for the advanced technol-
ogy nodes is excessively high, which is not favorable for most of the SoC design
houses. Hence, IC design houses found outsourcing the fabrication of chips to
offshore foundries economically beneficial and thereby they became fabless.
Though the globalization of design supply chain offers benefits in terms of
reduction in design complexity, shorter design cycle/time and saving in the cost of
managing an advanced fabrication unit, nevertheless its dark side cannot be over-
looked. Involvement of various entities in the globalized design supply chain gives
rise to various kinds of hardware security threats such as IP piracy or cloning, IP/IC
counterfeiting, IP/IC illegal reverse engineering (RE), hardware Trojan (malicious
logic) insertion, and IC overbuilding. In the IP piracy or cloning threat, potential
rogue elements in the SoC design house or foundry may steal the IP of original
vendor and sell under his/her own brand name to earn illegal income. This may
immensely harm the revenue of genuine IP vendor/designer/owner. Whereas in IP/
IC counterfeiting threat, an adversary may sell poor quality or fake IPs or
Secured co-processors for ML and DSP applications 3

refurbished ICs under the brand name of the genuine supplier. Thereby, the coun-
terfeiting threat not only hits the original supplier’s revenue but also his/her brand
value. In the case of false claim of IP ownership threat, an adversary fraudulently
claims the ownership of the IP in the court and could be successful in the absence of
producing proper IP ownership evidence by the genuine owner. Further, the RE
attacks on IP or IC are such malicious efforts by a potential adversary which aim to
back track the design stages with the intention of stealing design intents or inserting
malicious logic or hardware Trojan. A potential hardware Trojan hidden inside the
system chips can be catastrophic in the case of critical applications such as
healthcare and defense. Some adverse effects of hardware Trojan insertion are as
follows (Sengupta et al., 2017b; Sengupta and Rathor, 2019a): (i) denial of service,
(ii) leakage of confidential or sensitive data from the critical systems, (iii) password
theft, (iv) corrupting computational output value, (v) battery explosion, and so on.
Furthermore, the IC overbuilding threat results into illegal over production of ICs
by a fabrication unit without the knowledge of the design owner. The IC over-
building threat may also severely affect the revenue of the original designer. Hence,
ensuring security of co-processors during their design process is vital not only from
designer’s perspective but also from end user’s perspective.
There are some traditional approaches for securing the co-processor or IP
core designs against the aforementioned threats. Figure 1.2 depicts the security
mechanisms deployed for different kinds of hardware threats (Sengupta, 2020).
As shown in the figure, popular security approaches against IP piracy or cloning
are logic locking (or functional obfuscation) (Roy et al., 2008; Sengupta et al.,
2019a), IP watermarking (Koushanfar et al., 2005; Sengupta and Bhadauria,
2016), and steganography (Sengupta and Rathor, 2019a). The logic locking
technique offers preventive control against piracy whereas the IP watermarking
and steganography techniques offer detective control against piracy. Moreover,
the IP watermarking and steganography techniques are also capable to secure
co-processors and IP cores against IP counterfeiting and false claim of owner-
ship threats. Further, the RE attacks on hardware can be prevented using the
logic locking technique. Hardware or structural obfuscation (Lao and Parhi,
2015; Sengupta et al., 2017a; Sengupta and Rathor, 2019b) and layout camou-
flaging are the potential techniques that make the RE of an IC and its design
arduous for an attacker (Sengupta and Mohanty, 2019). Moreover, the structural
obfuscation and camouflaging techniques are also capable to prevent the
potential hardware Trojan insertion attack in an untrustworthy design house or
foundry (Sengupta, 2020; Sengupta and Mohanty, 2019). Further, various active
and passive hardware metering techniques have been proposed to provide
security against IC overbuilding by an untrustworthy foundry (Koushanfar,
2012; Koushanfar and Qu, 2001). Besides the conventional security mechanisms
of hardware protection, recently, biometric techniques have emerged as a robust
security paradigm for hardware authentication and enabling protection against
IP piracy and counterfeiting (Sengupta and Rathor, 2020a, 2021; Sengupta
et al., 2021). We will discuss the biometric techniques for hardware security in
Section 1.5.

1.2 Role of behavioral synthesis design process in
security of co-processors
This section discusses the importance of behavioral synthesis or HLS (McFarland
et al., 1988) design process in designing secured co-processors. Since the
co-processors for DSP, multimedia, and ML applications are computationally inten-
sive and have complex designs, their lower level design descriptions such as register
transfer level (RTL) and gate level are not readily available. In contrast, their high or
algorithmic or behavioral level functional descriptions are available in the form of
mathematic equations, transfer function, or C/C++ codes. Therefore, by applying
behavioral synthesis process, the high/algorithmic level functional description of a
co-processor application can be converted into the next level of design abstraction
i.e., the RTL (Sengupta, 2020; Sengupta et al., 2010). Moreover, the HLS design
process offers the benefit of exploring an optimal design architecture using a design
space exploration (DSE) technique (Sengupta, 2020). Some DSE techniques used for
design architecture exploration are listed below:
Hardware security threats
Traditional hardware
security mechanisms
IP piracy/cloning
False claim of IP ownership
Reverser engineering attacks
Hardware trojan insertion
IC overbuilding
IP/IC counterfeiting
Logic locking/ functional
obfuscation, IP
watermarking/steganography
IP watermarking/steganography
IP watermarking/steganography
Logic locking, hardware or
structural obfuscation layout
camouflaging
Structural obfuscation, layout
camouflaging
Hardware metering: active and
passive
Figure 1.2 Various hardware security threats and respective security solutions

1. Genetic algorithm-driven DSE (GA-DSE) (Krishnan and Katkoori, 2006;
Sengupta et al., 2012).
2. Particle swarm optimization-driven DSE (PSO-DSE) (Mishra and Sengupta,
2014; Sengupta and Mishra, 2014).
3. Bacterial foraging optimization-driven DSE (BFO-DSE) (Bhadauria and
Sengupta, 2015).
4. Firefly algorithm-driven DSE (FA-DSE) (Sengupta et al., 2017c).
The above-mentioned optimization-based DSE techniques are capable to
produce a near optimal design point or resource configuration corresponding to a
low-cost solution (under area, power, and delay constraints). In contrast, if the
co-processors are designed from a relatively lower abstraction level, then the
designers have very less opportunity to explore a low-cost solution.
Besides the capability of offering an optimized design solution for a low-
cost co-processor design, the behavioral synthesis process is also proved to be
efficient for deploying a security mechanism. The following security mechan-
isms can efficiently be employed during the behavioral synthesis design phase of
co-processors: hardware watermarking, hardware steganography, hardware
obfuscation, etc. (Sengupta, 2020). Apart from the aforementioned security
techniques, recently, biometric approaches such as fingering biometric, face
biometric, and palmprint biometric have also been employed during the beha-
vioral synthesis for hardware security (Sengupta and Rathor, 2020a, 2021;
Sengupta et al., 2021). The following various phases of behavioral synthesis
offer the flexibility of embedding security constraints into the design: high-level
transformation, scheduling, functional unit allocation, register allocation, and
interconnect binding (Koushanfar et al., 2005; Le Gal and Bossuet, 2012;
Sengupta, 2017). Employing security mechanisms during an early design phase
such as behavioral synthesis also helps perform the early design-cost trade-off
and minimize the impact of embedding security constraints on overall area,
power, and performance of the system. Figure 1.3 shows a typical security and
Security
technique
Behavioral/high level
description of coprocessor
Secured and low – cost
co-processor RTL
Behavioral
synthesis design
process
1. IP watermarking/ steganography
2. Digital signature
3. Fingerprint biometric signature
4. Facial biometric signature
5. Palmprint biometric signature
6. Structural obfuscation
DSE
technique
GA-DSE
PSO-DSE
BFO-DSE
FA-DSE
Figure 1.3 Security and cost aware behavioral synthesis design process for
designing secured and low-cost co-processors

cost aware behavioral synthesis design process for designing co-processors.
Additionally, adding security mechanism with the behavioral synthesis process
also enables the security of coprocessor designs at subsequently lower abstrac-
tion levels such as RTL, gate, and layout level of designs (Sengupta, 2020).
1.3 Introduction to ML co-processors and their security
As discussed in Section 1.1, co-processors used in modern electronic systems can
be designed for various applications such as DSP and ML (Sengupta and Chaurasia,
2022). This section gives an introduction on popular ML algorithms, their different
types, and applications. Further, we discuss the need of ML co-processors, their
security perspective, and the role of behavioral synthesis in designing secured ML
co-processors.
1.3.1 What are ML algorithms and their co-processors
The modern consumer technology is empowered by ML because of its capability of
adding intelligence to various consumer electronics (CE) and healthcare devices.
The following are some popular ML algorithms that are widely employed in
modern electronic industry: convolutional neural network (CNN), deep learning,
linear regression (LR), support vector machine (SVM), k-means clustering, and so
on. Be it Internet of Things (IoTs), smart cities, smart home, smart traffic/trans-
portation, global positioning system (GPS) tracking, etc., the aforementioned ML
algorithms are playing a crucial role. Some important applications of CNN and LR-
based ML are discussed below (Bazrafkan et al., 2017; Lemley et al., 2017;
Mahdavinejad et al., 2018; Sengupta and Chaurasia, 2022; Spencer et al., 2019;
Struharik et al., 2018; Zhao et al., 2017):
● Particularly, a CNN-based ML is capable of offering high accuracy and
thereby widely applied in CE applications to perform tasks such as image
segmentation and classification, face recognition, object/curve detection,
emotion detection, and voice analyzing. Moreover, tech-giants are commonly
applying CNNs for their product recommendations, in photo search, and for
automatic tagging systems. Further, the technological advancement in auton-
omous driving, medical diagnostics and video surveillance, etc. is also driven
by CNN-based ML.
● The LR-based ML is a supervised learning technique which is applied mainly
for prediction or forecasting. The energy usage and traffic load prediction in
modern systems is driven through LR-based ML. A linear regression function
can be employed for energy efficient usage of appliances in a smart home,
temperature forecasting, prediction of traffic speed, etc. Thereby, LR-based
ML finds its significance in a variety of applications in cyber physical systems
such as smart home systems, intelligent transportation systems, GPS, IoT data,
and also in some consumer-specific applications such as camera blur spread
estimate and depth estimation from camera lens.

1.3.2 Why modern systems need ML co-processors and why
to secure them
An ML algorithm is fundamentally a mathematical and probabilistic model that
performs high computations on input data, whether the objective is classification
or prediction. For example, a CNN framework is composed of different layers
such as convolutional layer, pooling, flattening layer, and fully connected layers.
Among the various different layers, the convolutional layer involves huge com-
putations on input data. Thereby, due to high computational intensiveness, the
realization of CNN-based ML as a dedicated co-processor is imperative for
image centric applications (Sengupta and Chaurasia, 2022). Similarly, an LR-
based ML framework functions on a huge number of data points in the training
phase. Hence, it also requires high computations and huge data crunching during
the training phase. This entails offloading the functionality of LR-based ML on a
dedicated hardware platform. The dedicated hardware platforms such as co-
processor or reusable IP core, graphics processing unit (GPU), field program-
mable gate array (FPGA), and application-specific integrated circuit (ASIC) are
capable to efficiently handle the data and computational intensive functionality
of ML. Designing a dedicated co-processor for the ML models such as CNN and
LR helps satisfy the design parameter constraints, specifically performance, than
a general purpose processor counterpart. In comparison to GPUs, other hardware
platform such as a dedicated IP core or co-processor is a better alternative for
executing ML algorithms for the modern consumer and healthcare applications.
This is because many devices may not support the amount of power required to
run a GPU. For example, a GPU may need power of around 450 W, including
central processing unit and motherboard. In contrast, a dedicated co-processor for
executing only ML computations can be designed as per the specified area power
and delay constraints. Thereby, dedicated co-processors or IP cores for ML have
secured their place in modern lightweight, low-power, and high-performance
systems (Everything you Need to Know About Hardware Requirements for
Machine Learning, 2019; Hardware Accelerators for Machine Learning, 2020;
Hardware for Machine Learning, 2021).
Secured co-processor for ML: the design process of an ML co-processor
incorporates multiple offshore entities such as design houses and a foundry.
Because of this distributed supply chain, following scenarios may occur:
1. A malicious designer of an ML co-processor may secretly insert a hardware
Trojan into the design and sell the infected designs that are to be integrated in
larger systems. For example, different combinational and sequential trigger-
based hardware Trojans can be placed into the design to malfunction the ori-
ginal functionality.
2. A rogue element in the foundry may secretly insert the Trojan during the
fabrication process. For example, a hardware Trojan can be inserted by
manipulating the dopant level during the fabrication process to form a side
channel to facilitate the leakage of sensitive information.

3. A dishonest foundry may reverse engineer the GDS file to steal the IP of an
ML co-processor and sell illegally to earn illegitimate income. The adversary
may even claim the ownership of the ML co-processor IP fraudulently.
4. A dishonest foundry may breach the terms of fabricating the ML co-processor
chips and may produce extra chips for personal benefits.
5. Some poor quality or fake/counterfeit ML co-processors can be sold by an IP
broker to a system integrator. Such counterfeit ML co-processors may contain
hidden Trojan inside them or may not be as per the desired performance
specification.
The aforementioned scenarios highlight the security threats that may occur
during the design and fabrication process of ML co-processors. Hence, ensuring
security of ML co-processor is vital too. Recently, researchers have started
focusing their attention towards designing secured ML co-processors. For
instance, a CNN-based ML co-processor has been secured using a biometric
signature technique to cater the threat of IP piracy and counterfeiting. Further, a
LR-based ML co-processor has been secured using an obfuscation technique to
cater the threat of illegal RE and hardware Trojan insertion. In the next section,
we discuss how a behavioral synthesis process can be useful in designing secured
ML co-processors.
1.3.3 Role of behavioral synthesis in designing and securing
ML co-processors
As discussed earlier, ML co-processors are highly computationally intensive in nature
as they require a number of operations to be performed on huge dataset. Further, the
ML applications are generally available in the form of their algorithmic or behavioral
descriptions. Hence, the behavioral synthesis process can be easily applied to gen-
erate RTL designs of ML co-processors. Furthermore, behavioral synthesis frame-
work is amenable for embedding security features into the ML-coprocessor design.
By embedding security during the early design phase such behavioral synthesis, the
design of ML co-processor can have more control on design parameters to satisfy the
user constraints. This is possible because of the ability of behavioral synthesis fra-
mework of integrating a DSE process that helps explore a low-cost security solution.
A typical design flow of generating RTL of an ML co-processor using the behavioral
synthesis process is shown in Figure 1.4. As shown, the process is accomplished in
the following steps: (i) a high-level framework (such a mathematic or transfer func-
tion) is converted into corresponding data flow architecture that shows the depen-
dency of different operations in the ML application; (ii) the data flow architecture is
subjected to high-level transformation followed by scheduling, allocation, and bind-
ing steps of behavioral synthesis. During these steps, security mechanisms such as
structural obfuscation and embedding signature constraints can be applied to generate
a secured ML co-processor design. Moreover, a DSE process can be integrated with
the behavioral synthesis process to explore a low-cost solution for the intended ML
co-processor. Further, datapath and controller synthesis steps are executed to generate
an optimal and secured RTL of ML co-processor.

1.4 Introduction to DSP co-processors and their
security: a behavioral synthesis perspective in
designing and securing DSP co-processors
DSP co-processors are the dedicated application-specific processors or IP cores
designed to execute computationally intensive DSP algorithms. Following are
some of the most useful DSP algorithms that are widely used in modern electronic
systems: IIR filter, FIR filter, DCT, IDCT, DWT, etc. These DSP algorithms
facilitate tasks such as compression and decompression of images, audio and
videos, and filtering out noise from digital signals. Because of the wide applications
in the modern era, the market of DSPs is thriving rapidly. However, with the need
of modern electronic gadgets to become lighter in weight, efficient in energy
consumption, and good in performance, satisfying orthogonal design constraints
of area, power, and performance has become challenging. Moreover, designing
DSP co-processors beginning at RTL or logic level is not easy as their low-level
descriptions are not readily available. This is where a behavioral synthesis process
Creating data flow architecture
Performing high level
transformation, scheduling,
allocation and binding steps
of behavioral synthesis
A high level framework of ML
model
DSE process
An optimized secured RTL
of ML coprocessor
Performing datapath and controller
synthesis step of HLS
Security
mechanism
Figure 1.4 A methodology of generating secured and low-cost RTL design of ML
co-processor

comes to rescue. The behavioral synthesis process paves the way of early estima-
tion of design parameters of a DSP co-processor and hence provides the opportu-
nity to explore such a design solution which is capable to satisfy given design
constraints or generate a low-cost solution. Further, easy availability of algorithmic
description of DSP applications makes the generation of their RTL design using the
behavioral synthesis design process easier (Sengupta, 2020).
Security of DSP co-processors: with the growth in market place of DSP
co-processors, paying attention on their security has become vital. Similar to the
other IP cores, the following are the major security threats to the IP cores of DSP
co-processors: hardware Trojan insertion by a rogue DSP designer and a foundry,
piracy or cloning of DSP cores by SoC integrators or foundry, counterfeiting of
DSP cores by rival IP designers, RE attack by foundry or a design house to steal IP
or insert malicious logic. Recently, a number of research works have been proposed
in the literature which primarily focused on security of DSP co-processors.
Koushanfar et al. (2005), Le Gal and Bossuet (2012), and Sengupta and Bhadauria
(2016) proposed watermarking techniques for securing DSP cores against the threat
of IP piracy and securing IP ownership rights. These authors leveraged behavioral
synthesis framework to secure the DSP cores. Koushanfar et al. (2005) and
Sengupta and Bhadauria (2016) leveraged the register allocation and binding phase,
whereas Le Gal and Bossuet (2012) leveraged datapath synthesis phase of beha-
vioral synthesis. Further, Sengupta et al. (2018) proposed a more robust triple phase
watermarking technique where three phases such as scheduling, register allocation,
and functional unit allocation phases of behavioral synthesis were leveraged to
secure DSP cores. A physical level watermarking technique for securing DSP cores
was also proposed in the literature (Sengupta and Rathor, 2020b). Furthermore, IP
core steganography techniques (Rathor and Sengupta, 2020; Sengupta and Rathor,
2019a) have also been proposed in the literature to secure DSP cores. These tech-
niques embed vendor’s secret stego-constraints during the behavioral synthesis
framework of DSP cores. Additionally, logic locking techniques for offering pre-
venting control against piracy and RE attacks to DSP cores were proposed by
Sengupta et al. (2019a) and Rathor and Sengupta (2019). The logic locking tech-
nique integrated IP core locking blocks (ILBs) into the gate level design to generate
an encrypted DSP core. For securing DSP cores against RE and Trojan insertion
attacks, structural obfuscation techniques were proposed by Lao and Parhi (2015)
and Sengupta et al. (2017a). These techniques used high-level transformation phase
of behavioral synthesis to structurally obfuscate the design architecture of DSP
co-processors. Moreover, a multi-key-based structural obfuscation technique was
also proposed by Sengupta and Rathor (2020b) to secure the DSP cores.
Interestingly, most of the security techniques for DSP cores leveraged behavioral
synthesis process to embed the security features. This is because of the capability of
behavioral synthesis process of offering (i) different phases such as high-level
transformation, scheduling, allocation, binding, and datapath synthesis for embed-
ding security features; (ii) opportunity of integrating DSE process for finding a
low-cost security solution; (iii) security to the subsequent design levels of
DSP cores.

In the next section, beyond the conventional IP security/authentication tech-
niques, this chapter provides an introduction to some emerging biometric techni-
ques of securing ML and DSP co-processors.
1.5 Biometric security for ML and DSP co-processors
So far, traditional approaches such as hardware watermarking/steganography have been
prevalent for securing or authenticating co-processors/IP cores. However, recently,
some biometric-based hardware IP core authentication approaches have gained attention
of researches because of their natural ability to offer a unique signature. This section of
the chapter provides an insight about the following: (i) how the biometric security for
hardware authentication is different than a user authentication process; (ii) advantages of
biometric-based security techniques over traditional approaches; (iii) different physical
biometric-based hardware security techniques proposed in the literature namely fin-
gerprint biometric, facial biometric, and palmprint biometric. A thematic representation
of biometric-based hardware security approach is depicted in Figure 1.5.
11001011111110100111
000101…….….1110010
0001110101110001101
IP vendor’s physical biometric
Fingerprint Face Palmprint
Biometric signature
embedded within IP/IC
Secured IP/IC
IP vendor’s biometric signature
template
IP piracy/cloning/
false claim of IP
ownership attack
IP/ IC
counterfeiting
attack
Figure 1.5 Thematic representation of biometric security approach of securing IPs

1.5.1 How biometric security for hardware authentication is
different than a user authentication
Biometrics are biological or physical or behavioral characteristics that are lever-
aged to identify individuals. Following are the different biometrics:
● Morphological or physical biometrics uses the physical traits such as finger-
print, shape of the face, palm veins, and irises etc.
● Biological biometrics uses traits at a genetic and molecular level such as DNA/
chromosome features.
● Behavioral biometrics uses a unique behavioral pattern of an individual such as
voice pattern and handwritten signature.
Conventionally, biometric security has been applied for user authentication in
major organizations/enterprises. The biometric security systems help recognize
people using their physiological or biological or behavioral characteristics. In these
systems, biometric of the user or person to be authenticated needs to be captured
live. Hence, biometric of the user is re-captured during the verification process. On
the contrary, the hardware authentication using biometric traits is independent of
re-capturing the biometric during the IP counterfeit detection or authentication
process. Rather, a pre-stored biometric of the concerned individual is used to re-
produce the biometric constraints embedded into the design. More explicitly, the
biometric captured for the constraints generation and embedding process is stored
in a tamper-proof memory and the same is used to regenerate the biometric con-
straints during the verification of the author and authenticating the hardware IP
design. The existing biometric-based hardware security techniques in the literature
have utilized the pre-storage biometric such as facial image and palmprint image
during the verification process.
1.5.2 Why biometric security is required for hardware
protection: advantages over traditional security
mechanisms
The traditional hardware IP authentication techniques (watermarking and stega-
nography) are based on creating vendor’s secret information and embedding into
the design, which is followed by the verification of secret constraints into the
design during the detection process. However, the secret information associated
with the vendor’s watermark or stego-mark is not unique as it does not represent
vendor’s natural identity. In such a case, if the secret watermark or stego-mark is
compromised by an adversary then justifying the secret-mark for proving IP own-
ership and detecting IP cloning may become challenging for the original IP
designer. Additionally, rogue IP supplier can sell the counterfeit IPs pretending
them to be secured with the stolen watermark or stego-mark. This is how the
adversary can misuse a stolen secret mark to claim the IP ownership fraudulently or
escape the IP counterfeit detection process. The following reasons highlight the
vulnerability or replicability aspect of a watermark and a stego-mark (Sengupta and
Rathor, 2020a).

● The overall privacy or robustness of a watermark relies on the following fac-
tors: (i) types of signature literals selected; (ii) size of the signature i.e. total
number of literals; (iii) encoding of signature literals into hardware security
constraints.
● Similarly, the secrecy of a stego-mark depends on the following factors:
(i) secret design data, (ii) secret stego-key, and (iii) encoding of stego-
constraints (secret design constraints) into hardware security constraints.
If the above-mentioned secret information and the secret-mark generation
algorithm are known to an adversary then s/he can have the opportunity to replicate
the secret-mark and misuse it. This may nullify the objective of hardware water-
marking or steganography. Further, an RSA encryption and hashing-based digital
signature approach (Sengupta et al., 2019b) has also been employed to enhance the
IP core security. However, this approach is also vulnerable to forging with sig-
nature because of its dependency on encryption key. Hence, keeping in mind the
above-mentioned limitations of traditional hardware IP authentication mechanisms,
the biometric-based mechanisms have recently come into limelight. The biometric-
based IP authentication techniques are capable to offer the following advantage. In
the biometric-based techniques, vendor’s natural identity is mapped with the
hardware security constraints to be implanted into the designs. Because of the
natural uniqueness of an individual’s biometric information, the attacker can never
replicate or copy the vendor’s biometric signature and misuse for false IP owner-
ship claim or false authentication. Thereby, implanting a signature generated from
the unique biometric traits of an individual into the ML or DSP co-processor
designs provides a seamless authentication or counterfeit detection of IP cores.
1.5.3 Types of different physical biometric-based
mechanisms for hardware security
Having discussed the significance of biometric-based security mechanisms for IP core
protection, let us provide some highlights on the following recently published bio-
metric security mechanisms: (i) fingerprint biometric for hardware security (Sengupta
and Rathor, 2020a, 2020c); (ii) face biometric for hardware security (Sengupta and
Rathor, 2021); (iii) palmprint biometric for hardware security (Sengupta et al., 2021).
(i) Fingerprint biometric for hardware security
The fingerprint biometric-based hardware security approach was first introduced by
Sengupta and Rathor (2020a) to secure hardware IP cores against the IP piracy,
counterfeiting, and false claim of IP ownership threats. The approach of fingerprint
biometric-based hardware security leverages some important minutiae features such as
ridge bifurcations and ridge endings to create a fingerprint signature template and
enable the detection of the vendor’s biometric fingerprint in the IP core designs.
Since the minutiae points namely ridge bifurcations and ridge endings on a
fingertip are unique for each individual and hence offers the opportunity to dis-
tinctly identify the IP vendor’s authentic designs based on his/her fingerprint
embedded. A generic flow of the fingerprint biometric-based approach for

hardware IP authentication/counterfeit detection is depicted in Figure 1.6. As
highlighted in the figure, the approach is divided into the following different pha-
ses: (1) fingerprint biometric constraints generation; (2) biometric constraints
embedding; (3) fingerprint constraints detection. In the fingerprint biometric con-
straints generation phase, biometric fingerprint image of the IP vendor is first
subjected to quality enhancement through a Fourier transform (FFT) process.
FFT enhancement
Binarization and
thinning
Minutiae points’
extraction
1001011010110110
1001110101…….
110101111111110
Encode into
hardware security
constraints
Fingerprint
template creation
Behavioral
description of
DSP or ML
application
Create a DFG
(an intermediate
representation)
Perform
scheduling,
allocation and
binding steps
of behavioral
synthesis
Create CIG
Embed
constraints into
CIG (register
allocation
phase)
Secured IP
core with
fingerprint
biometric
Extract register
allocation
information from
the RTL design of
the IP core
IP core
under test
Matching
constraints with
the register
allocation
information
Yes No
Fingerprint
constraints
detection
Fingerprint biometric
constraints generation
Biometric
constraints
embedding
Counterfeit IP
Authentic IP
Figure 1.6 Fingerprint biometric-based approach for hardware IP
authentication/counterfeit detection

The FFT process enhances the quality in terms of fine separation of the ridge lines
and reconnecting the broken ridge lines, etc. Further, the fingerprint image is
converted into a binarized image which is then subjected to minutiae extraction
process. The following four attributes are used to characterize each minutiae point:
1. CX: x-coordinate
2. CY: y-coordinate
3. MT: minutiae type (bifurcation or ending)
4. RA: ridge angle
Next, the above-mentioned attributes of minutiae points are translated into
their corresponding binary representations, say CXb, CYb, MTb, and RAb. To
generate the fingerprint digital template, the binary values of different attributes of
each minutia are concatenated in the following manner: CXb||CXb||MTb||RAb.
Once the fingerprint digital template is obtained, it is mapped into corresponding
hardware security constraints. In the biometric constraints embedding phase, the
hardware security constraints are added to the intended design during the beha-
vioral synthesis design process. The register allocation phase of behavioral synth-
esis is used to enable the embedding of hardware security constraints. In the
embedding process, a colored interval graph (CIG) framework plays a crucial role
where the embedding of the constraints is performed in the form of extra edges.
Thus, the biometric fingerprint-based approach uses the behavioral synthesis design
process to generate a biometric fingerprint-embedded RTL design. In the finger-
print constraints detection phase, the assignment of storage variables to the regis-
ters of the design is identified in the IP core under-test. Further, this register
assignment information is matched with the biometric fingerprint constraints
obtained from the constraints’ generation process. The presence of vendor’s fin-
gerprint biometric constraints into the intended design proves the authenticity and
nullifies the false claim of IP ownership. An attacker can never claim the genuine
IP owner’s fingerprint biometric information as his/her own owing to its inherent
uniqueness feature.
(ii) Face biometric for hardware security
The face biometric-based hardware security approach was first introduced by
Sengupta and Rathor (2021) to secure hardware IP cores against IP piracy, coun-
terfeiting and false claim of IP ownership threats. A hardware IP core embedded
with the vendor’s face biometric signature can distinctly be authenticated due to the
inherent uniqueness of an individual’s facial features. A generic flow of face
biometric-based approach for hardware IP authentication/counterfeit detection is
depicted in Figure 1.7. In the face biometric signature generation phase, the fol-
lowing facial features have been used: (1) height of forehead; (2) height of face; (3)
width of nasal ridge; (4) inter pupillary distance; (5) ocular breadth; (6) bio-ocular
breadth; (7) inter ocular breadth; (8) width of face; (9) width of nasal base; (10)
nasal breadth; (11) oral commissure width. Once the features are selected, their
dimensions are evaluated using the Manhattan distance. Further, the binary values
of features dimension are concatenated to generate the intended facial signature

Generate nodal points
based on selected
facial features
Generate image with
facial features
10000010100001
1111…….1100100
01
Convert into hardware
security constraints
Forming facial
signature template
Extract CIG
using
behavioral
synthesis
process
Implant
constraints into
CIG (register
allocation
phase)
Input DSP
and ML
application
Secured IP
core with
face
biometric
Extract register
allocation
information
from the RTL
design of the IP core
IP core under test
Match the constraints
with the register
allocation information
Yes
No
Facial signature
detection
Counterfeit IP
Authentic IP
Face biometric signature
generation
Facial
signature
embedding
Figure 1.7 Facial biometric-based approach for hardware IP authentication/
counterfeit detection

digital template. In the facial signature embedding phase, the signature is converted
into the corresponding hardware security constraints using the designer’s devel-
oped mapping rules. Thus, obtained constraints corresponding to the facial
biometric are embedded into the hardware design of IP cores such as DSP and ML
co-processors. The embedding of constraints is performed during the register
allocation phase of behavioral synthesis process. Thus, a secured DSP and ML
co-processor design carrying the facial signature constraints can be generated. In
the facial signature detection phase, a pre-stored facial image with the designer’s
selected facial features is used, thus making the face biometric-based authentication
approach a contact-less technique. Figure 1.7 highlights the facial signature
detection process. The presence of IP owner’s face biometric constraints into the
intended design proves its authenticity. Hence, the face biometric-based approach
disables an attacker claiming the IP ownership due to its capability of offering
inherent uniqueness.
(iii) Palmprint biometric for hardware security
The palmprint biometric-based hardware security approach was first introduced by
Sengupta et al. (2021) to secure hardware IP cores against IP piracy, counterfeiting
and false claim of IP ownership threats. This technique generates a palmprint sig-
nature template using the unique palmprint features of an individual and embeds
into the co-processor designs during the behavioral synthesis process. Due to the
inherent uniqueness of palmprint biometric, its respective hardware security con-
straints embedded into the designs are capable of distinctly proving the IP owner. A
generic flow of palmprint biometric-based approach for hardware IP authentica-
tion/counterfeit detection is depicted in Figure 1.8. In the palmprint biometric-
based secured IP generation phase, the following palmprint features are chosen for
creating the palmprint signature template and embedding into the design using the
register allocation framework of behavioral synthesis process:
1. Distance between start of life line and end of life line
2. Distance between datum points of head line and life line
3. Width of the palm
4. Length of palm
5. Distance between first consecutive intersection points of forefinger
6. Distance between second consecutive intersection points of forefinger
7. Distance between third consecutive intersection points of forefinger
8. Distance between first consecutive intersection points of middle finger
9. Distance between second consecutive intersection points of middle finger
10. Distance between third consecutive intersection points of middle finger
11. Distance between first consecutive intersection points of ring finger
12. Distance between second consecutive intersection points of ring finger
13. Distance between third consecutive intersection points of ring finger
14. Distance between first consecutive intersection points of little finger
15. Distance between second consecutive intersection points of little finger
16. Distance between third consecutive intersection points of little finger

17. Distance between first consecutive intersection points of thumb finger
18. Distance between second consecutive intersection points of thumb finger
19. Distance between starburst point and third intersection point of thumb.
In the palmprint biometric constraints detection phase, authenticity of the
intended IP is verified using the process shown in Figure 1.8. Like the face
100001001.11…………
…010.10111000010100
011111
Secured IP core
with palmprint
biometric
Implant constraints
into CIG (register
allocation phase) during
behavioral synthesis
process
Convert into hardware
security constraints
Extract register
allocation
information from
the RTL design of
the IP core
IP core under
test
Match is found?
Palmprint
signature
detection
Counterfeit IP
Authentic IP
Palmprint biometric secured IP
generation
Yes No
Figure 1.8 Palmprint biometric-based approach for hardware IP authentication/
counterfeit detection

biometric approach, the palmprint biometric is also a contact-less verification
approach where a pre-stored palmprint image with the designer’s selected features
is used.
1.6 Questions and exercise
1. What are co-processors used in electronic systems and how are they different
from general purpose processors?
2. What are DSP co-processors, their different types, and applications?
3. What are machine-learning co-processors, their different types, and
applications?
4. Why are machine-learning co-processors required in modern systems?
5. What is the role of behavioral synthesis process in designing DSP and
machine learning co-processors?
6. What is PSO-DSE and how is it important for generating secured IP cores?
7. What are different security threats to hardware IP cores?
8. What are different security mechanisms to protect hardware IP cores?
9. What is biometric security and how is it useful for personal or enterprise level
security?
10. What is biometric security for hardware authentication and how does it differ
from a user authentication system?
11. What is fingerprint biometric-based hardware security and what are unique
fingerprint attributes used for hardware security?
12. What is face biometric-based hardware security and what are unique facial
features used for hardware security?
13. What is palmprint biometric-based hardware security and what are unique
palmprint features used for hardware security?
14. How is the biometric information embedded into the co-processor designs
verified during the authentication process?
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Chapter 2
Integrated defense using structural obfuscation
and encrypted DNA-based biometric for
hardware security
Anirban Sengupta1
and Rahul Chaurasia1
This chapter describes a robust hardware security methodology capable of providing
integrated defense using multi-layered structural obfuscation and encrypted deoxyr-
ibonucleic acid (DNA)-based biometric security (Sengupta and Chaurasia, 2022). The
presented security methodology in this chapter enables the defense against the threats
of register transfer (RT) level design modification by performing structural obfusca-
tion. Additionally, it also provides detective defense control against intellectual
property (IP) piracy using integrated encrypted DNA biometric security.
The organization of the chapter is as follows: Section 2.1 provides the intro-
duction of the chapter; Section 2.2 highlights the background details of deoxyr-
ibonucleic acid (DNA)/genome sequencing; Section 2.3 presents the discussion and
analysis of some of the major state of the art approaches; Section 2.4 explains the
encryption process to encrypt DNA-based biometric signature as well as presents
the integrated defense using structural obfuscation and encrypted DNA for hard-
ware security; Section 2.5 shows the detection and validation of embedded
encrypted DNA signature corresponding to the target register transfer level hard-
ware design; Section 2.6 discusses the security properties and design cost of the
discussed approaches; and Section 2.7 concludes the chapter.
2.1 Introduction
In the present technological era, remarkable advancements and innovations have
led to manifestations in the form of smart/portable consumer electronics (CE)
devices, smart cities, computing devices, smart health care systems, etc. All these
innovations are playing a pivotal role in providing an end consumer with easy-to-
use interface and adaptability of technology in almost every activity in our daily
life. Therefore, to analyze all the aspects of these devices, it becomes crucial to
understand their designing, security vulnerabilities, and reliability concerns.
1
Department of Computer Science and Engineering, Indian Institute of Technology Indore, India

First, this chapter discusses the underlying hardware in these devices and their
importance in terms of applications they perform. For example, in consumer
electronics and computing devices, the underlying hardware is responsible for
performing several crucial tasks ranging from image processing to audio/video
processing. Furthermore, their usages in the field of health care, robotics, Internet
of Things (IoT), and in mission critical applications cannot be overlooked. In all
these aforementioned applications, underlying digital signal processing (DSP)
hardware coprocessors play a crucial role. For example, joint picture expert
group compression and decompression (JPEG Codec), discrete Fourier transform
(DFT), fast Fourier transform (FFT), and discrete cosine transform (DCT) are
used in tasks such as image and video compression, radar applications, digital
video broadcasting, and audio and video compression. Moreover, digital filters
such as finite impulse response filter (FIR), infinite impulse response filter (IIR),
and image processing filters are used in audio processing devices, robotics vision,
biometrics, and medical imagery. It is interesting to realize that all these appli-
cations are required to perform computationally intensive and data-intensive
tasks. Therefore, it is realistic to design them as dedicated hardware coprocessors
or reusable IP cores to accelerate the device performance with higher efficacy.
So far, we have conferred the underlying DSP hardware from the perspective of
application and the need of designing them as dedicated hardware coprocessor. Next,
we discuss design aspects of these hardware coprocessors. As a designer, to design
these coprocessors, several orthogonal aspects are to be taken care of. For example,
from the designer’s perspective, design process should be less complex resulting into
lesser turnaround time. Further, from the designer’s point of view, the design cost
should be cheaper but without compromising important functionality. Additionally,
the deployed hardware design must be reliable and should not lead to any safety and
security concerns. However, from the system integrator’s perspective, it is a tiresome
task to manage the complete design process of all hardware coprocessors single-
handedly within a single company. This is because the design process offers too
much complexity, extensive turnaround time, design cost, and time to market, if done
all within a single company. Therefore, outsourcing of these hardware coprocessors
to the third-party vendors is the common and acceptable practice in the industry. This
is where, to accelerate the design turn-around time, it opens up several security
vulnerabilities in the design chain as these third-party vendors may not be trust-
worthy. Therefore, using secured (and genuine) intellectual property cores or hard-
ware coprocessors is crucial.
Now, we look into the possible security threats during the design process of such
dedicated hardware coprocessors. First, we discuss the main entities involved in the
design cycle and their role during the design process; one is the IP vendor or designer,
who is responsible to design the coprocessor. Second is the system on chip (SoC)
integrator, responsible to integrate the designs. Third entity is the foundry or manu-
facturing houses responsible for creating fabricated chip of the final hardware design.
Let us have a look at the possible security threats around all the three levels of design
process. From a system integrators perspective, he/she needs to ensure that the
imported IP core or coprocessor (from third party vendor), before being integrated in

the system, is authentic. This is because fake/pirated IP cores may be unsafe and
unreliable as they do not undergo rigorous quality checks. Therefore, the detection and
isolation of such pirated IP core designs is very crucial to restrict their integration into
SoCs. On the other hand, from an IP vendor’s perspective, a SoC integrator may
fraudulently claim the ownership of the IP core design supplied by the third-party
vendor. Therefore, the protection of IP vendor’s right is also necessary against such
threat. Another aspect is an adversary in the foundry or fab who may overproduce the
design without the consent (or knowledge) of system integrator. It is also possible that
an adversary in the foundry (untrustworthy entity) may pirate the design in terms of
counterfeiting and/or cloning. Therefore, it is evident there are several security vul-
nerabilities that exist in the hardware design chain.
This chapter mainly focuses on safeguarding the hardware IP or coprocessors
used in underlying consumer electronics and computing systems, against the threats
of reverse engineering and IP piracy. To achieve robust security against both these
threats, coprocessor design structure is first made unobvious in terms of RT level
structure through multi-level obfuscation process. This hinders an adversary in
reverse engineering the design by identifying its design functionality and hardware
architectural details. Subsequently, the generated encrypted DNA signature of an IP
vendor is implanted into the IP core design during high-level synthesis (HLS)
process. Using such DNA signature as a secret authentic mark, it ensures detective
control against pirated hardware coprocessors before being integrated into the
system (Sengupta and Chaurasia, 2022).
2.2 Background on DNA/genome sequencing
Deoxyribonucleic acid, also known as genome, is a molecule that contains the
unique biological information that makes each species unique in the sense of
characteristics and identification. DNA is comprised of chemical building blocks
called nucleotides and each nucleotide is composed of three different components
such as sugar, phosphate groups, and nitrogen bases. The sugar and phosphate
groups link the nucleotides together to form each strand of DNA. The four che-
mical elements thymine, adenine, guanine, and cytosine are the four types of
nitrogen bases. The nucleotides are joined together by covalent bonds between the
phosphate of one nucleotide and the sugar of the next, forming a phosphate–sugar
backbone “S” from which the nitrogenous bases protrude. The configuration of the
DNA molecule is highly stable, allowing it to act as a template. In general, a DNA
sequence comprises of two base pairs (BP): base pair (BP)-1, consisting of two
chemical base elements: thymine as “T” and adenine as “A” and in base pair (BP)-2
the elements are guanine as “G” and cytosine as “C.” The final structure contains
sugar–phosphate backbone as leading and lagging strands. The order or sequence of
these chemical elements is used for determining the instructions that are contained
in a strand of DNA. Thus, different sequence orders represent different and unique
information. This chapter discusses how a DNA sequence of an IP vendor can be
exploited to act as a secret authentic mark for providing detective control against
Structural obfuscation and encrypted DNA-based biometric 27

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He snapped his fingers. “Mere practice. I wanted someone to
practice on, otherwise I should have laughed in Bellamont’s face.”
This taunt was a home thrust, the more so since I had been
completely taken in at the time.
“Well,” said I, with a hint of sarcasm in my voice, in spite of my
desire not to rouse him yet. “If Louis knows this I should say that
you—”
“What of me?”
“That you are in a bad way.”
“True,” he answered, totally unmoved. “I have been in a bad way
for a long time; but I have the Earl on the hip now.”
“He has the deed to your estate.”
“I shall get it back. I gave him that to win his confidence. I never
thought he would swallow such an open bait. I took so many men
with me because I thought he would order my arrest. If I had known
what a gull he would prove I should have got inside the fort with
half the number. But the best is yet to come. Be ready to-night to go
with me to Webber’s tavern. I expect great news, glorious news;
news that will shake Yorke to its foundation. In the meantime I must
look for Louis.”
At that moment the door opened without a warning knock and
Louis Van Ramm stepped across the threshold. For a moment the
master and servant remained where they were without moving. The
patroon sat in his great leather chair. In front of him was a table
strewn with papers. A decanter of wine with a tray of glasses stood
in the center, and lying close at hand, his long, sharp pointed sword.
Within a yard of the door, glowering across the intervening table,
was the sullen figure of the white-haired dwarf.
“Well,” said the patroon viciously after two minutes of this strained
silence.
“Well,” echoed the dwarf.
“What do you come here for?”
“Money.”
“State your errand,” he cried, starting up in anger.
“That is easily done,” answered the dwarf, doggedly, at the same
time taking a cautious step or two forward. “Do not get impetuous,”

he continued with a sneer. “I have written out all that I know and
have left the writing with my friends. I have come to ask what you
will give me not to have the seals broken.”
If Louis had expected to find his master a prey to one of his usual
fits of rage, he was disappointed. In a moment the patroon had
overcome his first outbreak and smiled, leaning back upon the arm
of his chair; then he dropped his hand cautiously on the table near
the hilt of his sword.
“Now hearken, Kilian Van Volkenberg,” Louis began in an insolent
tone. “I know why the Red Band is in the fort, and I know why
William Kidd came here last night.”
The patroon had shown no emotion at the mention of the first of
these facts, but the second seemed to startle him.
“So you were somewhere near about after all, were you?”
“I was in the bottom of the sideboard last night, and heard you
discuss all your plans.”
“You lie,” said the patroon, yet he was calm withal. I could see the
shadow of fear in his face, but he gave no sign of it by word or act.
“Louis Van Ramm, you lie in your throat.”
“Perhaps, but I have written out the full account of all I heard,
and my friends will break the seals at noon unless—”
“Unless what?” for Louis paused.
“Unless you pay me a thousand pounds.”
“I could pay that, you fool, but I know you lie.” The master’s voice
was wavering and I knew he believed what he denied with so much
confidence. “This tale does not take me in. It is impossible. You
could not have overheard, and if you did there is nothing I would not
be willing to have published.”
The dwarf looked at him in contempt. For a moment I doubted
whether he really had any proof. It might all be a skilful lie to
blackmail the patroon. But not so! Louis raised his finger slowly,
pointing at his master. His mouth opened, but he waited maliciously
before he spoke, as if he knew well the fatal result of his next word.
Then he snapped out suddenly, “Jacques.”
The effect was instantaneous. With a sharp cry of rage the
patroon caught up his sword. He lunged forward before either of us

had a moment to think what he was doing, and passed the sharp
blade clean through the body of the dwarf. Louis toppled forward
across the table without uttering a sound. The glasses shattered
with a crash, and the wine from the decanter trickled out and
mingled with the blood which I can hear to this day, as it rattled with
a sharp sound on the papers which were everywhere about. The
patroon stood mopping the sweat from his brow and looking down
on the body of his henchman.
“Come with me, Vincent, come with me. If what this fellow said is
true, I am in a trap indeed. Perhaps the papers are in his room,
perhaps he did not write them, but let us see.”
We went to Louis’s room and ransacked every corner for some
sign of the papers. We sounded the floor for loose boards. We tore
open the bedding. We let no nook or cranny escape our vigilance.
But nothing rewarded our search.
“Well,” muttered Van Volkenberg moodily, “he must have told the
truth. Someone else has the papers if they were ever written at all.
Who had he for friends?” Then he swore a fearful oath, for he had
thought of the Marmadukes. “If she comes against me—” He
doubled his fists, but did not finish the sentence.
We went back to dispose of the body of Louis. When this was
done the patroon prepared to summon the remaining members of
the Red Band. I did not know what he wanted of his retainers, nor
did I care. I remembered what Louis had said to me about the loose
bricks by the oven and that I should look there in case of his death
by violence. I resolved to do a little hunting on my own account and,
sure enough, when I reached the place, I found two small packets,
which I hastily concealed about me and retired to my room. One of
the packets was marked “The Great Secret.” The other bore the date
of that very day. I tore it open. Here is what I read:
“I heard the whole conversation between Van Volkenberg and
Captain Kidd. The latter has come here to recruit the crew which is
to take the Adventure out to sea to capture pirate ships. Van
Volkenberg has agreed to furnish the eighty men needed to
complete the crew. The agreement is that as soon as they are well
at sea these men are to mutiny. Kidd is to give in without resistance.

Then they are all to turn pirates. Van Volkenberg is to get a share of
the booty and to start the rumor that this was Bellamont’s intention
from the first. There was another plan disclosed”
The account stopped abruptly, without even the formality of a
period. Louis may have been interrupted in his writing and found no
chance to finish, or he may have thought better and decided not to
tell all he knew. Of this fact, of course, no one will ever know. I was
about to break the seal of the second packet and read the Great
Secret, when I heard steps in the corridor on the way to my door.
The next moment there was a knock.
“Patroon Van Volkenberg wishes your presence in the hall,” said
the messenger.
Five minutes later I was at the door of the assembly room where
the remainder of the Red Band had already gathered and seemed to
be waiting for my appearance. This was the first time I had seen
them together by daylight, and as I glanced round upon their faces,
several questions that I had often asked myself were partly
answered. The lower class I had seen everywhere so far in and
about Yorke were men whose independence of spirit and ability to
think for themselves would not have countenanced such blind
obedience to a leader as was shown by these men of the Red Band.
But as I looked upon them now I saw the reason. Most of them were
foreigners, all of them weather-beaten soldiers or sailors, who may
have seen as many campaigns or more than I had seen myself. As
soldiers they had had obedience drilled into their very bones. But
there was another reason yet. Three of the men who stood nearest
to me had each but one ear. Several more had letters branded upon
their foreheads or upon their hands. I knew well enough what that
meant. In a time when, on the continent, as well as in the colonies,
mutilation was so common, I needed no one to tell me how many of
the members of the Red Band had served their time in prison. Surely
this was a lawless set of men. They spared no one, and every man’s
hand was against them. The newness of the patroon’s attempt to
assume rights that were no longer his may have been all that
accounted for his criminal deeds being kept a secret thus far; but I

thought, as I looked at these men, to whom could they turn if they
once deserted their present master?
Van Volkenberg had drawn largely upon his followers when he
garrisoned the fort. All of those who were left behind were now
gathered in the hall before me. I had not long to wait to learn the
purpose of the meeting. The patroon commanded silence. In a few
words he reminded his followers of the oaths of service they had all
taken to him. Then he explained that Captain William Kidd was
about to set out on an expedition for the welfare of the province.
“My men,” continued the patroon, “a task is expected of you. I
cannot now make known to you all the particulars of your new duty.
I shall entrust my plans to Edward Baine and Harold Bromm. You
know and respect both of these men. You must obey them as if I
were there myself to give orders. Each man shall receive at the
outset twenty pounds. The money has already been sent aboard
ship. You must follow yourselves as secretly as possible before night.
At midnight the anchors will be lifted and by sunrise you will be far
from shore.”
He looked about him as if to note the temper of his audience.
There was no dissatisfaction. Most of the men were already tired of
the quiet times since the elections, and welcomed this chance of
action. No question of its propriety seemed to enter their heads.
They acted like machines, ready to come and go as their master
sent them.
“Now,” continued the patroon. “In accordance with our general
custom we shall take the oath of service together.
“Edward Baine, stand forth. Do you solemnly swear to remain true
to the brotherhood of the Red Band, to advance its interests with
your life, so help you God?”
“I do, Amen.”
The oath was next administered to Harold Bromm. After that a
clause was inserted binding the men to obey the orders of these two
ringleaders. One after another the members of the band bound
themselves to this new venture. At last there were but three left,
myself and two others. I wondered whether the patroon intended to
send me along with the rest on this mutinous expedition.

“Dick Ramsey, do you solemnly swear—”
The oath was duly sworn to.
“Barnard Lee—”
He likewise assented to the oath.
All eyes turned upon me. The others looked expectant as if they
too had thought of the same question that I had just put to myself.
Perhaps even the patroon did not know what he would do till the
moment came. He looked at me as if in deliberation with himself.
There was a long pause, then I heard my name.
“Henrie St. Vincent, do you solemnly swear to remain true to the
brotherhood of the Red Band, to advance its interest with your life,
to obey Edward Baine and Harold Bromm in all things as they may
command, so help you God?”
“I do not.”
The silence of amazement followed. I could not forbear to smile at
the look on every face. Only the patroon appeared as if he had
expected my answer. He was angry rather than surprised.
“Why not?” he cried petulantly. “Why not, St. Vincent?”
“I do not care to leave Yorke,” I answered. “This duty is not within
my understanding of what I promised when I took service. If you
wish it, I will withdraw from the Red Band, but—”
“Withdraw! Such a thing was never heard of.”
There was a murmur of discontent throughout the room. Some
spoke openly and bade me remember Ronald Guy. Disobedience had
been a part of his offense.
I was standing close to the patroon and spoke to him so that no
one else could hear what I said. “Do you intend to treat me as you
treated your—” I was on the point of saying “your son,” but he cut
me short.
“No, no, if you don’t want to go you need not. No one shall go
against his will. Never mind, my men; you will lose a good blade, but
I shall gain one. I really need him here after all. It cost me an effort
to make up my mind to let him go.”
The patroon whispered to someone next him and after that two or
three men left the hall. We were detained but a few moments
longer. Then the men began to say good-by to their master. Only

about one in ten of them lived on the estate. Some of these came to
take his hand and even wept at parting. “You have been a good
master. I’ll never forget when the old woman was sick,” said one.
And another, “I’ll do my best for you. I’ve not forgot when my little
boy died.” Truly this master was good to his own, save only when his
malady was upon him.
I was much touched by what I had just witnessed. From the
assembly room I went to my own. I was anxious to read the secret
contained in the second packet which Louis had hidden in the oven.
But I was to be interrupted once again. I had hardly closed the door
behind me when I discovered that I was not alone in the room. A tall
figure, completely robed in a black mantle, stood in one corner.
When I closed the door she stepped forward.
“Mistress Van Volkenberg,” I exclaimed, “what has brought you
here?”
It took me several minutes to recover my self-possession. Miriam
meantime dropped her cloak and stood blushing before me. Her
voice trembled with confusion and she could hardly speak.
“Oh, what will you think of me?” she broke out after one or two
attempts to speak. “But I could not help it. Listen to me and let me
go. What have you done? My father has given orders to have you
watched. In a few minutes you will not be able to get away; you
must go at once.”
When she bade me go away and leave her there alone, I recalled
a former occasion when I had resolved to protect this girl if need be
against her father.
“Shall I leave you here?” I asked.
“Me? What have I to do with it? Go, go; do not stay; you must,
you must.” She laid hold of my arm and tried to push me towards
the door.
“Why do you want me to go?”
She became silent and the bright color came into her cheeks.
“You must go. I want you to save yourself.”
“I cannot go,” I answered.
“Why?”
“Because I love you.”

She stepped backward as if frightened at my simple words.
“Mistress Van Volkenberg,” I continued, “I am a plain woer. I do
not know how to tell you what I feel. My heart tells me that I love
you, but how shall I make you know it? Bid me to do something.
Prove my love. Do you care nothing for how I feel?”
She came a step closer. “I am a Catholic.”
“Does not that prove my love? You know what I have had to suffer
from your church.”
“Yes, you have told me a little,” she answered. “But—”
I would have no buts. I caught both her hands in mine and gazed
into her eyes wondering what she would say if she knew who I
really was. For a moment she held away from me. Then I felt her
sway gently forward.
“Do you love me, Miriam?”
“Yes.”
For a moment I held her in my arms. Her face lay close upon my
shoulder. I could feel her heart beating quickly, and there was a
sweet smell about her hair like fresh flowers. Then she whispered
softly:
“Call me Miriam again.”
“My sweet Miriam.”
“Ah, Henrie—why do you start?”
She lifted her face to mine. I kissed her forehead before I
answered.
“I started because you did not call me by my name. My name is
Michael Le Bourse.”
She looked at me with growing wonder in her eyes. “Michael Le
Bourse? Ruth’s brother? He is dead.”
“No, he is not dead. You did not see his body at Marmaduke’s. You
were deceived. He is alive and well, and I am he.”
As she gazed confusedly at me the wonder faded from her face.
Then in a flash she seemed to comprehend it all. She broke from me
and stood in the center of the room, burning with shame and anger.
“If you are Michael Le Bourse, what are you doing here?”
Oh, the sight was pitiful, both for her and for me. She stamped
her foot madly.

“What are you doing here? Are you a spy in my father’s house?
You wretch, I see it now. You came here to avenge your sister. You
tricked me into loving you. I hate you. I thought you were an honest
man. The shame, oh the shame to have touched you. Is this your
just religion? Where is your justice? In lying, in deceit, in being false
to women? All, all to gain your own selfish ends. The dogs in my
father’s kennels would hold better faith than that. Yet you judge
others. You say we Catholics are untrue. God shield us, we are not
ashamed to own our names.”
I tried to interrupt her. She only drew her skirts about her and
edged off as if I were diseased.
“Don’t speak to me. Your poor sister! If she were alive it would
break her heart to hear of this. She used to talk about you. I have
heard her speak so often of your honor. This would break her heart.
Stand by and let me go.”
She moved towards the door, going by the edge of the room, so
as to keep as far away from me as possible.
“Mistress Van Volkenberg,” I said when she was near the
threshold, “there is much justice in what you say.”
“Of course there is much justice in what I say.”
“But you are not right in all. I cannot explain everything now, but
let me tell you my resolution. I am willing to make amends.”
“Amends! You cannot. You are false to perdition.”
“I can confess myself and give myself up to justice.”
“Yes, your justice. Go to your sweet Earl and say, ‘Faith, I’ve been
a naughty boy, forgive me.’ And he will say, ‘Yes.’ I know him. My
father would not stand his evil practice and that is why he left the
council. So your horseback-riding governor is your amends, is it? I
see you are a coward as well as a villain. O God, can such men live
and look like other men?”
“No, mistress, this is not what I intended to do. I intended to go
to your father.”
“You dare not.”
“That will be seen.”
She opened the door and was on the point of going out when she
turned back.

“I believe you dare,” she muttered.
Then she came quickly to my side.
“Do not do it. It will do no good. It will throw him into a passion
and he might—might—oh, fly, fly before it is too late.”
She spoke beseechingly and the anger in her voice was fading like
the twilight.
“But what interest,” I asked, “can you have in a villain and a
coward?”
“None, none,” she replied, “but that such a worm should linger in
our house.”
She swept haughtily from the room without so much as a glance
behind her. Indeed I was rightly punished. My ungenerous answer
had but trampled on her sweet good will. When she went out I felt
as if all the light in my life went with her. Bitterly I reproached myself
for my folly—nay, worse than folly. But it was now too late to mend.
I could, however, carry out my resolution. I could prove that I was
not a coward. It was the more easy to do because I had already
considered the question of making myself known to the patroon, be
the consequences what they might. So, in this state of mind, fresh
from the sting of her contempt and full of despair at my own
foolishness, I sought the master of the house.

CHAPTER XXVI
THE GREAT SECRET
I found the patroon in much the same position as Louis had found
him earlier that day. A few red drops showed on the scattered
papers; otherwise all signs of the henchman’s death had
disappeared. The patroon was seated in his leather chair with his
sword in his hand when I entered.
“Close the door, Vincent,” he said.
I turned to do so, and almost immediately I heard a quick step
behind me. A mirror on the wall warned me of my danger. I sprang
aside just in time to avoid a vicious thrust of the patroon’s sword.
“Coward!” I cried. “From behind.”
“What have you to say of ‘from behind?’ I strike cowards and dogs
from behind when they won’t show their faces—why not spies as
well? Answer me that, Michael Le Bourse.”
So he, too, had found me out. I dare say he had overheard my
conversation with his daughter from some secret passage. He stood
before me now, glaring at me with pent up passion.
“Draw your sword, Mike. You have an Irish name, but a fool’s wit.
Don’t you see the humor of it? The Earl and I must wait a while. But
you and I, our time has come. You shall never have my daughter
while I live. Draw, man, draw, or I’ll spit you like a dog.”
Our swords were out and crossed in the twinkle of an eye. He
fought wildly, bent upon taking my life, and careless of his own. His
all depended on it, yet he was man enough not to call for help. I
meanwhile stood upon the defensive and nothing more.
Had we both been in earnest it would have been short shrift for
the patroon. I had the advantage, both in years and strength, as

well as in skill with my weapon. From the first I was as cool as if
drilling on parade. My very coolness seemed to exasperate him
further. After a few passes his manner began to change. I saw the
scared look in his face and the flush of blood that always came
before one of his mad seizures. Then he began to grow unsteady.
The swiftness of his blows redoubled. He left his body unguarded
twenty times. I could, had I been so minded, have run him through
with my eyes shut. Still he fought on with blind desperation.
Then we heard someone coming down the hall. There was a
woman’s cry of terror. The next moment Miriam, unmindful of her
own danger, dashed between us and caught her father in her arms.
She gave me one glance of withering contempt.
“On top of all you would murder him before my eyes. Be gone.”
I went out and down the corridor, minded to go back to Yorke. At
the door two guards stopped me and turned me back. Miriam had
told me that I was a prisoner in the house; this confirmed what she
had said and showed that my chance of escape was gone.
“We have strict orders,” said one of the guards who turned me
back, “No one is to pass out.”
I tried both of the other doors with the same ill success. But I did
not care much, I was so miserable. I felt that the end had come, and
that it mattered little how the blow fell. I went to my room—that
was not guarded away from me. As I closed the door I bethought
me of the second of Louis’s packets, which was still in my pocket
unopened. I took it out and broke the seal. As my eyes fell upon the
writing, I could not repress a cry at the startling news that was
contained in the first line.
“Sir Evelin Marmaduke is starving to death in the cave beneath the
Hanging Rock.”
Sir Evelin Marmaduke, he whom all the city mourned as dead?
Could he be still alive? Louis’s narrative was short and clear.
“Colonel Fletcher granted the Marmaduke estate to Patroon Van
Volkenberg upon the death of Sir Evelin. One day his boat was
caught in the tide about Hell Gate. The patroon and I discovered
him, half drowned and unconscious, upon the shore. The patroon
wanted to let him die, but I insisted otherwise. So he was

imprisoned in the cave beneath the rock. By accident Ruth Le Bourse
discovered our secret. We tried to keep her silent. But she would not
consent. I repent now that we handled her so roughly, but she is
better off.”
Brief as the narrative was, how clear it made everything. I
remembered the many tales I had heard from Annetje Dorn of
victuals disappearing from the larder at the dead of night; and of
comings and goings from the patroon’s part of the house in the
small hours. But what could I do? He was starving to death and
must be rescued at once. The doors below were all shut tight to me.
I fell to cursing my luck and the villainy of the patroon. I raged back
and forth like a tiger in a cage. What could be done? Suddenly the
answer came. The door swung open and Miriam stood before me.
Her haughty bearing was all gone. Her eyes were red with weeping.
“I come to be forgiven,” were her first words.
“I did not mean to kill him.”
“I know it; forgive me. He has been talking in his madness and I
know all. God forgive me; how I have been deceived. Will you go
with me to the Hanging Rock?”
I followed her outside my door to where stood Annetje. The three
of us proceeded through the crooked halls. At the outer door we
were stopped by the guards.
“Not go out?” cried Miriam. “Out of my way! I am mistress here.”
The men gave back—there was no gainsaying her when her spirit
was fully aroused—and we passed out. She bore herself with a fierce
calmness that was terrible to see. I wondered whether she could
stand the strain produced by this shattering of her idol; or whether
she would go mad.
“Do you know why we are going?” she asked in a low, painful
voice.
“Spare me,” I replied. “I know it all.”
“How long have you known it?”
“But just now. I learned it from a paper that Louis left behind.”
“You must have known many other things. I begin to understand
why you have not betrayed us long ago. I have misjudged you.
Forgive me, but there is small time for undoing now. Let me take

your hand. Come, we must run; it is a matter of minutes now. He
may die while we are coming.”
When we reached the cave Miriam produced a key which she had
secured from her father. It fitted the door of the cave which had
been walled up and turned into a dungeon. Within, upon short
examination, we discovered Sir Evelin. He was a fearful sight; thin,
lank, nothing but skin and bones. He was so weak that he could
neither speak nor walk. He looked blankly into the lantern like one
who cannot see. Annetje poured a spoonful of liquor which he took
mechanically, but he showed no sign of intelligence.
“Oh, this is terrible, terrible, terrible,” sobbed Miriam.
I lifted him up—he was as light as a child—and carried him to the
landing. We loosened a boat and got ready to take him to Yorke by
river.
“Good-by,” said Miriam. “You and Annetje must attend to this. My
place is with my father.”
“Miriam,” I cried, taking her hand.
“No, no,” she said, putting me back, “not now. Go at once and
save his life.”
I began to remonstrate, but she would not hear a word. Soon we
were aboard the boat, and then in a minute we were out upon the
black river, where we could no longer see the silent figure on the
shore. Annetje held Sir Evelin’s head in her lap and shielded his face
from the chill wind. I worked the oars. Before long we were abreast
of the first scattered lights of the town north of the wall.
Ever since I had left Yorke, I had kept the two keys the governor
had given me. I resolved now to go to the little postern gate in the
west palisade rather than to rouse the watch at the city gate in the
wall. Ever since the fright over an invasion of the French, these
gates had been locked, and I feared difficulty and delay from an
attempt to enter in that manner. So, by way of the postern, we got
him speedily to Marmaduke Hall. But the mistress was not at home.
“Where is she?” I asked.
“At the governor’s ball.”
Ah, yes; I, too, had been invited to that ball, and by the governor
himself. So I set out at once for the fort, to see the Earl and to warn

my lady of her husband’s safety.
As was natural they refused me entrance at the gate because I
had no card of introduction. But I still possessed the other key that
the governor had given me on the night before I set out from New
York upon my adventures at the manor-house. In five minutes I was
inside the fort with the wicket gate locked behind me. As I
approached the governor’s house, I thought of what an unusual
request I was about to make, and whether the guard would deliver it
or not. The earnestness of my manner, however, must have affected
him, for he did my bidding after a little persuasion. Soon he returned
with an answer that the Earl would see me. He conducted me to an
inner room, and a moment later the governor appeared.
He recognized me at once. “Ah, St. Vincent, I am glad to see you.
You are a welcome guest.”
There was a cordiality in his manner that an observer would not
have suspected. I was surprised myself, for he thought me a follower
of the patroon. In later times I understood him better. Whatever
faults he may have had, Earl Bellamont was a gentleman to the
heart.
I put my finger upon my lips and glanced about the room.
“Leave the room,” said the Earl to the guard who had
accompanied me. “What is it that you have to say that requires such
secrecy?”
“My name is not St. Vincent, sir. I am Michael Le Bourse.”
His astonishment knew no bounds, and it grew as I told my tale.
As soon as I had finished he broke out with an expression that
showed how he always thought of others before himself.
“We must send Lady Marmaduke home at once.”
He dispatched a messenger to fetch her from the ball room. He
told her what had happened with a gentleness that won my heart
more than anything he had ever done before. She had but one word
to say.
“Let me go to him; take me to my husband.”
“Accompany her, Le Bourse. At midnight, when this ceremony is
over, return to me. I shall leave orders at the gate for your
admission.”

We set out immediately in a chair. Lady Marmaduke spoke hardly a
word. Now and then she tapped the side of the chair impatiently,
and often there came a struggling sob. But she gave no other sign
of her great fear lest she come too late.
Thanks to kind Annetje’s care, Sir Evelin was much improved. He
was able to recognize his wife when she appeared, and I was glad to
note that the blank expression in his eyes had gone somewhat. I
waited till it was time to return to the fort. The mistress saw me for
a moment before I went.
“Tell him that all is well. And for you, my Michael, you have my
gratitude beyond the power of words. Now go. I shall hear your tale
through to-morrow.”

CHAPTER XXVII
THE LAST OF THE PATROON
It was past two o’clock in the morning when I finished my
consultation with the Earl. Small wonder that he walked up and
down the room at his wits’ end what to do. Captain Kidd by this time
had lifted anchor and had set sail with the lawless crew that was
destined for a time to stain the name of my patron. Nor could
Bellamont foresee that he was to come out of this malicious attack
with his honor unsullied and his respect undiminished. But a still
greater danger pressed close at hand. There was but one small
company of soldiers inside the fort who were loyal to the governor;
all the rest belonged to the patroon. They outnumbered us three to
one or perhaps more. We were in the enemy’s hands, and what
were we to do?
Louis, I found, had not warned the Earl at all. We learned later
that he had come to the fort, but had been refused admission.
Whereupon he dispatched a forged letter northward on his own
account to recall the troops. But of this we knew nothing at the
time. The troops were not at hand to help us, nor did they return in
time to be of any help. We had to plan for the instant.
At last it was arranged between us that the few faithful men in the
fort should be roused at once. As soon as they had taken possession
of the armory, which they could easily do, as almost everyone was
asleep, and the guard for the night had been chosen from the loyal
company—after they had got possession of the armory they were to
waken the members of the Red Band one by one and throw them
into irons. Why make a short story long? All this was accomplished

with success. By four in the morning every man was securely bound
and the fort saved.
“But what does this unfinished sentence mean?” said the Earl,
who held Louis’s paper in his hand. “Van Ramm breaks off suddenly,
after speaking of something else.”
Then for the first time in many hours I remembered that the
patroon had spoken of a meeting that night in the neighborhood of
Webber’s tavern.
“Your Excellency,” I cried, “it must have been of great importance
from his manner. Let me set out at once. It may not be too late.
Perchance the patroon was not well enough to go, and has put off
the meeting till the morning. The man, whoever he is, may have
remained all night at the tavern.”
A party of three horsemen was at once got ready, and Bellamont
insisted on going with us himself. It was just daylight when we
reached the inn.
“Yes,” answered the host, in reply to our questions. “There was a
stranger here last night, and he had a great spell of impatience, but
he would not stir from the room, and he stayed all night, and he is
up stairs now asleep. Shall I call him, your Excellency?”
“No,” replied Bellamont. “Let us go up to his room.”
When we knocked the stranger refused to open the door. We
made short work of that and soon the door was beaten down. We all
stood agog at what we saw within. The man had not retired. He was
fully dressed and the bed had not been slept in.
“Body of me!” exclaimed the host. “Look at his head. What is that
he has in his hands?”
What we saw was a silver crucifix and a close shaven head. The
man was a Jesuit priest.
“What are you doing here?” asked the Earl, as soon as his first
astonishment had worn off a bit.
“Body of me,” cried the host; “you’ll be hanged. That is our law.”
The priest turned a trifle pale at this, but he was no coward—that
I could see at the first glance.
“St. Jacques protect me,” he said in a calm voice, crossing himself.

“Stop that twiddle-twoddle,” interrupted the host, at the same
time catching the priest roughly by the shoulder.
“You know the laws of the province?” asked the Earl, sternly.
“Yes, I know them,” he replied, proudly. “The agent of Christ is
worthy of death in this province if he adhere to the one true faith.
Yes, Sir Tyrant, I know your laws.”
“Do you call the governor names?” yelled the host in a rage.
“Down on your knees in an instant; you’ll hang in the air in an hour.”
The priest looked at the host grimly, and then he smiled.
“Pardon me, your honor, I mistook you. I thought he was the
governor. If you are he, however—”
“Take that for your impudence,” cried the host.
He had unbuckled his leather belt and struck the priest with it
across the face. It was all done so quickly that we could hardly see
how it happened; but when I looked again, the landlord was lying on
the floor with a bloody nose and the priest was rubbing his knuckles
which ached with the sting of the blow he had given him.
“That will do,” said Bellamont with dignity. “What is your name?”
“Jacques.”
That was the word Louis had uttered in the patroon’s study. It had
brought on the blow that killed him.
“What are you doing here?”
“My instructions are secret, sir.”
“We’ll draw your secrets out,” whined the host, who was getting
upon his feet slowly, and holding his handkerchief to his nose.
Bellamont commanded him to be still, and continued talking with the
priest.
“Father Jacques, how much you know of what concerns me, I am
not aware; but this much I know of you; you came here last night
expecting to meet Patroon Van Volkenberg, who is now under the
displeasure of the government. You know the laws of this province.
If you will disclose your secrets I will give you your life. Choose.”
“I refuse,” answered the priest without a moment’s hesitation.
I could have grasped his hand, for I knew what it was to look
death in the face. But that grim sight did not stir him visibly. He was
a man, and a brave one, for all we had against him.

“If you refuse,” said the Earl, “I must search you and the room for
papers.”
The man bowed without speaking. Not much of a search was
needed, however. We had come in upon him so suddenly that he
had had no time for concealment. A packet of papers lay in full view
on the table.
A brief examination of them told the whole story. The fear in the
city of a French invasion proved to be no idle fear; but the invasion
was not to come from the north. That was the mistake and was due
to the false rumors set afloat by the patroon. There was a French
fleet a short way down the coast waiting a chance to pounce upon
the city unawares. They had been in correspondence with the
patroon for some time. His ships in the harbor were to co-operate
with the French and his men were to surrender the fort. In return for
this the old powers of the patroons were to be restored, and Van
Volkenberg made governor of the province.
It was a fanciful plan, and, I must confess, within an ace of
succeeding. But they had not reckoned against chance. The odd
trick had fallen to our lot. A week later, all was lost to them; for now
we held the high cards in our own hands.
“It is time we were going,” said the Earl, when we were done with
the papers. The tone of his voice and the brevity of his speech
showed how much he was affected by the narrow escape we had
had. “Bring that man with us.” Then he turned to the prisoner. “Have
no fear for your life, Father Jacques. It is small love I have for you,
or sympathy for your attempt to spoil my government. But I can use
you better than to weight a rope. You shall back to this French fleet
of yours and tell them that the English governor is ready for them;
but not till I have seen Van Volkenberg. Bind him, Le Bourse; we
must to the fort in haste.”
We had gone down stairs and were in the tavern doorway when
who should ride up but the man of all men we wanted most at that
moment—Van Volkenberg. He saw us standing there with the priest
a prisoner. He took in the situation at a glance. He shook his fist at
me and spat in the governor’s face.

“Zounds! Dogs!” he cried. “You think you have me. But the fort is
mine. Do you take me there!”
He clapped spurs to his horse and was off like an arrow.
“After him, Le Bourse,” cried the Earl. “You have the best horse.
Stop him alive or dead.”
The patroon had the start of me by five hundred yards. Our
horses were an even match for swiftness, but the patroon rode
lighter in body. For all that, he gained like a snail. He thundered
across the Kissing Bridge. Before the echo of his steps died away the
bridge was rocking beneath me. The city gate stood open. A guard
challenged, but he sprang back to avoid a wide sweep of the
patroon’s sword. It was straight away now along Broadway to the
fort. I could hear him shouting at the top of his voice as he drew
near:
“What ho; Van Volkenberg! Men of the Red Band! Open the gate.
Van Volkenberg, Van Volkenberg, Van Volkenberg!”
But the rallying cry of the Red Band was not answered. The
patroon halted before the gate, grinding his teeth in rage.
“What ho!” I cried, from behind, mocking his voice. “Open the
gate. Van Volkenberg! The Red Band is all asleep,” I continued,
addressing him. “They sleep late to-day in irons. Yield, in the name
of Bellamont.”
Just as I reached the point where he had stopped, he drew his
pistol and fired. My horse received the ball in his breast and
stumbled headlong, throwing me upon the ground. We were so
close, I touched the patroon’s horse when I went down. For a
moment I lay stunned. Then I gradually heard the clattering of
hoofs. I rose with difficulty just in time to see Van Volkenberg dash
down Petticoat Lane and turn northward through the city.
By this time the rest of our party rode up. They had been so
encumbered with the priest, who had purposely tried to hold them
back from joining in the pursuit, that they were too late to be of any
use in stopping the patroon. When they arrived, he must have been
at least through the gate, or well on his way north to the Hanging
Rock.

Lady Marmaduke often used to rail against the Earl because he
was forever on the wait for a better opportunity to turn up. My short
experience of him seemed to prove otherwise. For all that, she was
not so far wrong. I found, when I came to know him better, that he
was not prone to action when he had time for deliberation. But when
a thing had to be done in short order, he did it with a speed and
decision that rivaled the patroon. On the day of Jacques’ arrest,
however, Bellamont was mad with prudence. Both Lady Marmaduke
and I urged him with all our power to capture the patroon at once.
Give him a few hours and he might yet muster a large enough band
to endanger the city in its present state. There were a few men still
left at the manor-house, and the ships in the bay were mostly
manned with fighting men.
Bellamont, however, would not agree with us. He was afraid to
take decisive action. “I have still one company,” he said. “They can
defend the fort against a host. But if I send them, or even a part of
them to the Hanging Rock, I shall not be able to guard the prisoners
I have already taken. And a few men can defend the manor-house
as well as I can defend the fort. The manor-house is almost a castle
in its position.”
“But,” interrupted Lady Marmaduke, “why not strike before he can
get his defense together. I can fill out your number with twenty
armed men of my own.”
“You are too hasty,” replied the Earl. “Remember the old proverb:
Give the devil rope enough to hang himself. The patroon can never
gather head to harm us now.”
“Harm us!” exclaimed Lady Marmaduke in contempt. “Is your own
safety all you have to care for? Had you seen my poor husband as I
saw him last night, the skin nearly cut through by his sharp bones,
and too weak to say a dozen words. No, if you have nothing but
harm to fear, I have revenge to seek. While he lives I shall not rest. I
swear before God, if you will not help me I shall do it alone. Do you
suppose I can forget? My husband stolen away and me mourning
him for dead. And well nigh dead he is. Ah, I have had dreams. I
have seen this moment coming. I knew there was to be a day of
reckoning. God’s help! This day Yorke shall see great deeds. They

call me the people’s friend. I shall try the people. The voice of the
people is the voice of God.”
Lady Marmaduke strode rapidly out of the room and in a moment
she was gone.
“Follow her, Le Bourse,” said my patron. “She is at her wits’ end.
She has had great wrong. I fear she will do something rash.”
The news of the priest’s arrest had already got abroad, and also
the truth about the French fleet. Although it confirmed their fears
the people felt more at ease, for they knew now what to expect, and
had full confidence in the governor. When I reached the gate of the
fort a crowd of loiterers was gathered about the Marmaduke pump.
When my lady appeared they greeted her with cheers.
“Good friends,” she said.
“Silence there,” cried several. “Lady Marmaduke is speaking.”
In a moment there was silence.
“Good friends, good people, I believe you love me and my house.
I have come to throw myself upon your protection.”
There were more cheers, and cries of: “We will!” “Hear, hear.”
“Right or wrong we’ll follow Lady Marmaduke.”
“But it is right,” she continued, silencing them with her hand.
“There has been a great wrong. The patroon of the Hanging Rock
has been trying to sell the city to the French.”
“Down with the French! Down with the Van Volkenberg! Treason,
treason!”
There were some of my own countrymen in the crowd, but they
shouted with the rest. Our French persecutors were not considered
as fellow-countrymen in those days.
“My good friends, do not be rash. Go about the city. Summon
those who love me. Tell them to come to Marmaduke Hall in half an
hour. There I will show you proof.”
“We want no proof. To the Hanging Rock!”
“Stay, friends, stay; do as I bid you. Before Marmaduke Hall in
thirty minutes.”
She stepped into her chair and was carried home. Half an hour
later there was a great crowd before her house. She appeared on
the balcony.

“Did you love my husband?” was her first breathless question.
“Then listen to me. We thought him dead. You, I, all of us wore
black for that. It was by his will that I dug the Marmaduke well for
the people. But he was not dead. He has come back to us.”
I shall hear the cheer that followed this fact when I am dead and
in my grave.
“Wait, friends, wait till I show him to you.”
She disappeared, but soon came back, carrying her husband in
her arms. A cry of horror rose when they saw his starved condition.
“Do you remember Sir Evelin, good friends? He used to rival the Earl
upon a horse. Where are the roses in his cheeks?” Sir Evelin dropped
his head upon his wife’s shoulder from very weakness. “See, he
cannot even raise his head to look at you he loved. Can you see this
without a tear? Will you stand by and permit this to go unpunished
in a friend to Yorke? How has he lost his strength? In the prison at
Hanging Rock. Now you cry out. The patroon thought to get this
house. We have no children, and our will leaves it to the city. Van
Volkenberg wanted to rob you. He would starve your wives and
children, too. Look upon this poor man and see what the patroon
has done. He plotted to give up the city. He rumored it about that
Frontenac was coming from the north, and all the time he was
plotting for an invasion from the sea. He filled the fort with his Red
Band under the pretense of friendship. The Earl has beaten him
there, but that is not all. Give him two hours, nay, one, and he will
lead an army into the city. Look, look upon my husband. Will you not
act for your wives and children?”
Some mobs are boisterous, others are still. They are the kind most
to be feared. There was no violent outbreak of passion now, only a
smothered growl. Then, at the critical moment, a leader sprang out
on the northward side of the crowd.
“Men of Yorke,” he shouted two or three times, as he ran, “to the
Hanging Rock. Follow me!”
Without a cheer, without a sound save the rumble of their feet,
the people flowed away like a deep and sullen river through its
broken banks. I saw a bitter smile come into my lady’s face as she
lifted her husband and carried him back into the house. Then of a

sudden I cried out like a madman in the middle of the street. That
hellish mob was bound for the manor-house and Miriam was there.
For the first time I stopped to think how headless this mob was like
to be. They would not stop to question when they were once before
the house. The least they could do would be to burn it, even if the
patroon could make good its defense. Then I set out at the top of
my speed. It was little I could do, but if need be, I could die with
her, and some chance might come that would help me to save her.
In a moment I found myself mingling with the silent runners bent on
destruction. The crowd swept on in that terrible stillness. It swirled
out at the crossing of streets and jammed back resistlessly into the
narrow ways. It poured through the Land Port like a flood and across
the Kissing Bridge. Still we surged on.
Yet it was but a mob. A score of Lady Marmaduke’s retainers,
armed to the teeth, had got to the front. The rest were without
weapons. What could they do against the house of the patroon? As
they spread out among the trees in the park a volley of shots were
fired at them from the windows of the manor-house. Three of the
foremost men fell dead or wounded. Then went up their first
heartless yell of rage.
Lady Marmaduke’s men stationed themselves behind trees and
aimed with such certainty that they soon silenced the fire from the
house. If a face appeared at a window, a dozen muskets were
immediately discharged at it. Meantime, under this protection, the
mob began to attack the house with stones. The windows were all
broken at the first volley. They fetched a long beam to use as a
battering ram, and were getting ready to beat in the front door. In
this crisis, I cast about me for some means of help. But I was
powerless. Once I thought that I saw Miriam for a moment at one of
the windows. She disappeared quickly. Had someone dragged her
back, or had she been hit by one of the marksmen? Such a thought
was torment worse than death. But she might be safe. For all that I
could do nothing to save her.
But what I could not do was nobly done by another. I had drawn
back somewhat so as to go around the edges of the crowd and
come at the house from the rear. I hoped to find some way by which

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