Pin configuration of 8085

PIN CONFIGURATION OF 8085

PIN OUT DIAGRAM

It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.

The pins on the chip can be grouped into 6 groups:

1. Power supply and frequency. 2. Serial I/O ports. 3. Address Bus. 4. Data Bus.

5. Control and Status Signals. 6. Externally Initiated Signals.

Power supply and Frequency signals:

In the microprocessor operates on a singles +5V power supply connected to Vcc at pin
number 40.

The ground is connected to Vss at pin number 20.
There are 3 pin in the frequency control group 1. X0. 2. X1. 3. CLK OUT.

(i) X0&X1: X0 &X1 are the inputs from the clock generating circuit. Pin number 1&2

It is use to synchronize the operations of the 8085 microprocessor.
The microprocessor has operates at 3MHz frequency.

(ii) CLK OUT: It is a output pin. This signal is generated by microprocessor.

It can be used as the system clock for other devices. Pin number 37

Serial I/O ports: These signals are used for giving serial input and output data.

There are used two pin for serial I/O data .

1. SID: Serial Input Data. Pin number 5

This pin provides serial input data. The serial data on this pin is loaded into the seventh

bit of the accumulator when RIM instruction is executed. .

RIM stands for READ INTERRUPT MASK, which checks whether the interrupt is masked or

not.

2. SOD: Serial Out Data Pin number 4

This pin provides the serial output data. The serial data on this pin delivers its output to

the seventh bit of the accumulator when SIM instruction is executed.

Address Bus:

1. The address bus has 8 signal lines A8 – A15 which are unidirectional.

2. The address bus also a set of parallel connected lines.

3. The address bus consists of 16, 20, 24 or 32 parallel lines.

4. Address bus carries the address of the memory or I/O location to be read or written

from.

5. Address bus is available from pin number 21 to 28.

Data Bus:

1. The other 8 address bits are multiplexed (time shared) with the 8 data bits.

2. The bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time.

3. During the execution of the instruction, these lines carry the address bits during the early

part, then during the late parts of the execution, they carry the 8 data bits.

4. In order to separate the address from the data, we can use a latch to save the value

before the function of the bits changes.

5. The data bus consists of 8, 16 or 32 parallel lines. .The data bus is a bidirectional bus. The

data bus can transfer the data from CPU to memory or vice versa. The data bus also

connects the I/O ports and microprocessor.

6. Pin number 12 to 19 are used for data bus in microprocessor.

Control and Status Signals:

There are 4 main control and status signals.

ALE: Address Latch Enable

1. This signal is a pulse that become 1 when the AD0 – AD7 lines have an address on
them.It becomes 0 after that.
2. This signal can be used to enable a latch to save the address bits from the AD lines.
3. Pin number 30.

RD: Read. Active low

1. The read control signal is used to control the reading operations of microprocessor.
2. Pin number 32

WR: Write. Active low.

1. The write control signal is same as read signal.
2. Pin number 31

IO/M: Input-output/Memory

1. This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O
operation (IO/M=1).
2. Pin number 34

S1 and S0:

1. S1 & S0 are two status signals.
2. These signals are used to indicate the internal operation of microprocessor.
3. Status signals to specify the kind of operation being performed .Usually un-used in
small systems.
4. Pin number 33&29

Externally Initiated Signals:

1. These are asynchronous in nature.
2. These are 4 signals.
RESET
READY
INTERRUPT
DMA

RESET:

RESET IN: This is an input signal. Pin number-36
When the signal on this chip goes low, the program counter is set to zero.
RESET OUT: This signal is generated by microprocessor in response of the
signal RESET IN when RESET IN is logic 0, RESET OUT is logic 1.
This signal show that microprocesser in reset. Pin number-3
READY: Pin number-35
If Ready is high during a read or write cycle, it show that the memory or
peripheral is ready to send or receiving the data.
If Ready is low, the CPU wait for Ready to go high before completing the read
or write cycle.
READY signal plays important role to synchronize slower peripheral with the
faster microprocessor.
INTERRUPT SIGNALS: In the microprocessor has five interrupt signals.
1. TRAP: TRAP is a non mask able interrupts.

It is level or edge sensitive signal.
Pin number-6
2. RST7.5, RST6.5, RST5.5: These interrupts are mask able interrupts.

These are vectored interrupts and transfer the program control to the
specific memory locations.

Pin number-7, 8, and 9

3. INTR: It is mask able & non vectored interrupt.
It is used as general purpose interrupt.
INTR is level sensitive interrupt pin.
It has lowest priority interrupt.
Pin number-10

DMA: Direct Memory Access Signals

DMA is used to transfer data from memory to peripheral or peripheral to

memory without the interference of the microprocessor.

1. HOLD: HOLD is an active high signals. Its means other device is requesting
for DMA operations. Pin number-39

2. HLDA: This signal acknowledges the HOLD request:
It is active high signal.

It’s inactive by the microprocessor after the I/O device has completed the
DMA operation.

Pin number-38

Address signals: Signals associated with the lower order address bus and time multiplexed higher order address bus
comes under this type of signals.

Data Signals: Signals associated with data bus comes under this type.

Control and Status Signals: Signals which are associated with timing and control unit such HOLD, RW’, WR’ etc. comes
under this type of signals.

Interrupt Signals: We know that signals like TRAP, RST 5.5 etc. are interrupt signals. Such signals come under this
category.

Serial I/O signals: These signals are used for giving serial input and output data. Signals like SID, SOD come under this
category.

Acknowledgement Signals: Signals like INTA’, HLDA acts as acknowledgement signal for 8085 microprocessor.

Address Bus:

The pins A8-A15 denote the address bus. They are used for the most significant bit of memory address.

Address/Data Bus:

AD0-AD7 constitutes the Address/Data bus. They are time multiplexed. These pins are used for least significant bits of
address bus in the first machine clock cycle and used as data bus for second and third clock cycle.

But what is a clock cycle? What is first clock cycle and second, third so on...

A clock cycle is nothing but the time taken between two adjacent pulses of the oscillator. In simple words clock cycle
refers to the transition between o volts to 5 volts and back to 0 volts. So the first clock cycle means the first transition of
pulse from 0volts to 5 volts and then back to 0 volts.

ALE: Address Latch Enable:

In the previous article we saw how ALE helps in demultiplexing the lower order address and data bus. This signal goes
high during the first clock cycle and enables the lower order address bits. The lower order address bus is added to
memory or any external latch.

IO/M’:

Consider we have an address to be processed. But how do the processors know whether the address is for memory or
I/O functions? For this purpose a status signal called IO/M’ is used. This distinguishes whether the address is for memory
or IO. When this pin goes high, the address is for an I/O device. While the pin goes low, the address is assigned for the
memory.

S0-S1:

S0 and S1 are status signals which provides different status and functions depending on their status.

RD’:

This is an active low signal. That is, an operation is performed when the signal goes low. This signal is used to control
READ operation of the microprocessor. When this pin goes low the microprocessor reads the data from memory or I/O
device.

WR’:

WR’ is also an active low signal which controls the write operations of the microprocessor. When this pin goes low, the
data is written to the memory or I/O device.

READY:

READY is used by the microprocessor to check whether a peripheral is ready to accept or transfer data. A peripheral may
be a LCD display or analog to digital converter or any other. These peripherals are connected to microprocessor using
the READY pin. If READY is high then the periphery is ready for data transfer. If not the microprocessor waits until READY
goes high.

HOLD:

This indicates if any other device is requesting the use of address and data bus. Consider two peripheral devices. One is
the LCD and the other Analog to Digital converter. Suppose if analog to digital converter is using the address and data
bus and if LCD requests the use of address and data bus by giving HOLD signal, then the microprocessor transfers the
control to the LCD as soon as the current cycle is over. After the LCD process is over, the control is transferred back to
analog and digital converter.

HLDA:

HLDA is the acknowledgment signal for HOLD. It indicates whether the HOLD signal is received or not. After the
execution of HOLD request, HLDA goes low.

INTR:

INTR is an interrupt request signal. It has the lowest priority among the interrupts. INTR can be enabled or disabled by
using software. Whenever INTR goes high the microprocessor completes the current instruction which is being executed
and then acknowledges the INTR signal and processes it.

INTA’:

Whenever the microprocessor receives interrupt signal. It has to be acknowledged. This acknowledgement is done by
INTA’. So whenever the interrupt is received INTA’ goes high.

RST 5.5, 6.5, 7.5:

These are nothing but the restart interrupts. They insert an internal restart function automatically.

All the above mentioned interrupts are maskable interrupts. That is, they can be enabled or disabled using programs.

TRAP:

Among the interrupts of 8085 microprocessor, TRAP is the only non-maskable interrupt. It cannot be enabled or disabled
using a program. It has the highest priority among the interrupts.

PRIORITY ORDER (From highest to lowest)

TRAP

RST 7.5

RST 6.5

RST 5.5

INTR

RESET IN’:

This pin resets the program counter to 0 and resets interrupt enable and HLDA flip-flops. The CPU is held in reset
condition until this pin is high. However the flags and registers won’t get affected except for instruction register.

RESET OUT:

This pin indicates that the CPU has been reset by RESET IN’.

X1 X2:

These are the terminals which are connected to external oscillator to produce the necessary and suitable clock
operation.

CLK:

Sometimes it is necessary for generating clock outputs from microprocessors so that they can be used for other
peripherals or other digital IC’s. This is provided by CLK pin. Its frequency is always same as the frequency at which the
microprocessor operates.

Vcc and Vss:

Vcc is +5v pin and Vss is ground pin.

Thus the pin diagram and signals of 8085 microprocessor are explained in detail.

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Pin configuration of 8085

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