Vlsi assembly technology
- 1. VLSI ASSEMBLY TECHNOLOGY VLSI assembly technology covers the basic assembly operation in use today for vlsi devices. A generic assembly flow chart applying to plastic or ceramic packages is shown.
- 2. Wafer Back Grinding:- Die preparation:- Wafer Mounting: Frame loading, wafer loading, application of tape to the wafer and wafer frame, cutting of the excess tape and unloading of the mounted wafer Wafer Saw: Alignment, cutting by resin-bonded diamond wheel, cleaning .
- 3. Die Bonding:- Die Bonding is the process of attaching the silicon chip to the die pad or die cavity of the support structure. Adhesive Die Attach: Uses adhesives such as -Polyimide , epoxy and silver-filled glass as die attach material Eutectic Die Attach: Uses a eutectic alloy to attach the die to the cavity. The Au-Si eutectic alloy is the most commonly used
- 4. Die interconnection :Wire Bonding The wire is generally made up of one of the following: 1. Gold 2. Aluminum 3. Copper There are two main classes of wire bonding: 1. Ball bonding 2. Wedge bonding
- 5. Wire Bonding (Ball- Bonding):- A gold ball is first formed by melting the end of the wire. The free-air ball brought into contact with the bond pad, adequate amounts of pressure, heat, and ultrasonic forces are then applied. The wire is then run to the corresponding finger of the lead frame, forming a gradual arc or "loop" between the bond pad and the lead finger. Wire Bonding (Wedge-Bonding):- A clamped wire is brought in contact with the bond pad. Ultrasonic energy and pressure are applied. The wire is then run to the corresponding lead finger, and again pressed. The second bond is again formed by applying ultrasonic energy to the wire.
- 6. Die Interconnection:Flip Chip:- The term “Flip-chip” refers to an electronic component or semiconductor device that can be mounted directly onto a substrate, board, or carrier in a ‘face-down’ manner. Electrical connection is achieved through conductive bumps built on the surface of the chips, which is why the mounting process is ‘face- down ‘in nature. Flip -Chip Advantage: 1.Smallest Size Reduces the required board area by up to 95% Requires far less height 2. Highest Performance Reduces the delaying inductance and capacitance of the connection by a factor of 10 Highest speed electrical performance of any assembly method 3. Most Rugged 4. Lowest Cost
- 7. Tape Automated Bonding (TAB) :-A process that places bare chips onto a printed circuit board (PCB) by attaching them to a polyimide film. The film is moved to the target location, and the leads are cut and soldered to the board. The bare chip is then encapsulated ("glob topped") with epoxy or plastic.
- 8. Molding:- Molding is the process of encapsulating the device in plastic material. Transfer molding is one of the most widely used molding processes in the semiconductor industry. The cavities are filled up in a 'Christmas tree' fashion -The highest filling velocity is experienced by the first cavity. Subsequent cavities are filled with increasing velocities until the last cavity, which ends up with the second highest filling velocity. Wiresweepingand die paddle
- 9. Package Sealing:- Sealing is the process of encapsulating a hermetic package, usually by capping or putting a lid over the base or body of the package. The method of sealing is generally dependent on the type of package. Ceramic DIPs, or cerdips, are sealed by topping the base of the package with a cap using seal glass. Seal glass, like any glass, is a supercooled liquid which exhibits tremendous viscosity when cooled below its glass transition temperature.A seal glass may be classified as vitreous or Devitrifying. Marking:- Marking is the process of putting identification, traceability, and distinguishingmarks on the package of an IC. The most common Ink marking process for semiconductor products is Pad printing. Pad printing consists of transferring an ink pattern from the plate, which is a flat block with pattern depressions that are filled with ink, to the package, using a silicone rubber stamp pad. Laser marking refers to the process of engraving marks on the marking surface using a laser beam.There are many types of lasers, but the ones used or in use in the semiconductor industry include the CO2 laser, the YAG laser, and diode lasers.
- 10. Deflash/Trim/Form/Singulation(DTFS):- 1. Deflash-Removal of flashes from the package of the newly molded parts. Flashes are the excess plastic material sticking out of the package edges right after molding. 2. Trim-Cutting of the dambars that short the leads together. 3. Form-Forming of the leads into the correct shape and position. 4. Singulation-Cutting of the tie bars that attach the individual units to the leadframe, resulting in the individual separation of each unit from the leadframe.
- 11. Fabrication process sequence:- 1. Silicon manifacture 2. Wafer processing Lithography Oxide growth and removal Diffusion and ion implantation Annealing Silicon deposition Metallization 3.Testing 4. Assembly and packaging Single CrystalGrowth(I):- Pure siliconismeltedin a pot (1400º C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mm/minute) pulledout.
- 12. Single Crystal Growth(II):- The silicon crystal (in some cases also containing doping) is manufactured as a cylinder(ingot) with a diameter of 8-12 inches(1”=2.54cm). This cylinder is carefully sawed into thin(0.50-0.75 mm thick) disks called wafers, which are later polished and marked for crystal orientation.
- 13. Lithography(I): Lithography : process used to transfer patterns to each layer of the IC. Lithography sequence steps: Designer: Drawing the “layer” patterns on a layout editor. Silicon Foundry: Masks generation from the layer patterns in the design data base Printing: transfer the mask pattern to the wafer surface Process the wafer to physically pattern each layer of the IC.
- 14. Lithography(II):- 1.Photoresistapplication: The surface to be patterned is spin-coated with a light-sensitive organic polymer called photoresist. 2.Printing (exposure): The mask pattern is developed on the photoresist, with UV light exposure depending on the type of photoresist (negative or positive), the exposed or unexposed parts become resistant to certain types of solvents. 3.Development: The soluble photoresistis chemically removed . The developed photoresistacts as a mask for patterning of underlying layers and then is removed.
- 15. OxideGrowth/ OxideDeposition:- Oxide can be grown from silicon through heating in an oxidizing atmosphere Gate oxide, device isolation Oxidation consumes silicon SiO2 is deposited on materials other than silicon through reaction between gaseous silicon compounds and oxidizers. Insulation between different layers of metallization.
- 16. Etching:- Once the desired shape is patterned with photo resist, the etching process allows unprotected materials to be removed Wet etching: uses chemicals Dry or plasma etching: uses ionized gases
- 17. Diffusion and Ion Implantation: Doping materials are added to change the electrical characteristics of silicon locally through: Diffusion: Dopants deposited on silicon move through the lattice by thermal diffusion (high temperature process). Ion implantation: Highly energized donor or acceptor atoms impinge on the surface and travel below it.
- 18. Annealing:- Thermal annealing is a high temperature process which: allows doping impurities to diffuse further into the bulk repairs lattice damage caused by the collisions with doping ions