X86 Architecture
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The document provides an introduction to the x86 architecture. It discusses that x86 is based on the Intel 8086 CPU from 1978 and has evolved over numerous enhancements. The core components of x86 include 8 general purpose registers, 6 segment registers, 1 flags register, and an instruction pointer. x86 CPUs operate in either real or protected mode, with protected mode supporting a flat 32-bit memory model or multi-segmented memory model using segment registers.
![Addressing modes
The addressing mode indicates the manner in which the operand is
presented.
Register Addressing
(operand address R is in the address field)
mov ax, bx ; moves contents of register bx into ax
Immediate
(actual value is in the field)
mov ax, 1 ; moves value of 1 into register ax
or
mov ax, 010Ch ; moves value of 0x010C into register ax
Direct memory addressing
(operand address is in the address field)
.data my_var dw 0abcdh ;
my_var = 0xabcd .code mov ax, my_var ; copy my_var content in ax
(ax=0xabcd) mov ax, [my_var] ; idem as above](https://image.slidesharecdn.com/x86-150316004043-conversion-gate01/85/X86-Architecture-8-320.jpg)
X86 Architecture
- 1. By Roll No 2467, 2474, 2471 2812, 2493, 2815 2814, 2489, 2818 X86 Architecture
- 2. Intro to X86 Architecture x86 is a family of backward compatible instruction set architectures based on the Intel 8086 CPU. The 8086 was introduced in 1978 as a fully 16- bit extension of Intel's 8-bit based 8080 microprocessor The x86 architecture has 8 General-Purpose Registers (GPR), 6 Segment Registers, 1 Flags Register and an Instruction Pointer. 64-bit x86 has additional registers.
- 3. x86 Lineage The x86 architecture, which has been enhanced numerous times, comes from the Intel 8088, the CPU in the first IBM PC in 1981. The 8088 was a slower version of the 8086, which begat the 80186, 286, 386, 486, Pentium and subsequent CPU families.
- 5. Segment Registers “Segmentation provides a mechanism for dividing the processor’s addressable memory space (called the linear address space) into smaller protected address spaces called segments
- 6. The EFLAGS is a 32-bit register used as a collection of bits representing Boolean values to store the results of operations and the state of the processor.
- 7. Instruction Pointer The EIP register contains the address of the next instruction to be executed if no branching is done. EIP can only be read through the stack after a call instruction.
- 8. Addressing modes The addressing mode indicates the manner in which the operand is presented. Register Addressing (operand address R is in the address field) mov ax, bx ; moves contents of register bx into ax Immediate (actual value is in the field) mov ax, 1 ; moves value of 1 into register ax or mov ax, 010Ch ; moves value of 0x010C into register ax Direct memory addressing (operand address is in the address field) .data my_var dw 0abcdh ; my_var = 0xabcd .code mov ax, my_var ; copy my_var content in ax (ax=0xabcd) mov ax, [my_var] ; idem as above
- 9. CPU Operation Modes Real Mode Real Mode is a holdover from the original Intel 8086. You generally won't need to know anything about it (unless you are programming for a DOS-based system or, more likely, writing a boot loader that is directly called by the BIOS). The Intel 8086 accessed memory using 20-bit addresses. But, as the processor itself was 16-bit, Intel invented an addressing scheme that provided a way of mapping a 20-bit addressing space into 16-bit words. Today's x86 processors start in the so- called Real Mode, which is an operating mode that mimics the behavior of the 8086, with some very tiny differences, for backwards compatibility.
- 10. Protected Mode Flat Memory Model If programming in a modern operating system (such as Linux, Windows), you are basically programming in flat 32-bit mode. Any register can be used in addressing, and it is generally more efficient to use a full 32-bit register instead of a 16-bit register part. Additionally, segment registers are generally unused in flat mode, and it is generally a bad idea to touch them. Multi-Segmented Memory Model Using a 32-bit register to address memory the program can access (almost) all of the memory in a modern computer. For earlier processors (with only 16-bit registers) the segmented memory model was used. The 'CS', 'DS', and 'ES' registers are used to point to the different chunks of memory. For a small program (small model) the CS=DS=ES. For larger memory models, these 'segments' can point to different locations.