12 wp5 slides_authors_dp_dec_26_2012
- 1. JANUARY 28-31, 2013 SANTA CLARA CONVENTION CENTER Innovative Defense Techniques for Damping Digital to RF Crosstalk 1
- 2. Contributors • Davy Pissoort; KU Leuven: davy.pissoort@khbo.be • Hany Fahmy, Jan Van Hese; Agilent Technologies: hany_fahmy@agilent.com Jan_vanhese@agilent.com • Mehdi Mechaik, Henry Zeng, Charlie Shu, Charles Jackson; NVIDIA Corporation: mmechaik@nvidia.com hzeng@nvidia.com cshu@nvidia.com cjackson@nvidia.com 2
- 3. Background • Design of multiple antennas for mobile device communications on PCBs are major tasks due to the many sources of noise: – Skew, rise-fall time mismatch, delays – Reflections – Crosstalk – Delta-I noise – Radiation • Tasks above can be overcome by adopting early simulations in pre-layout stage of PCB designs 3
- 4. Purpose • This presentation will show: – An analysis of the main noise sources on a PCB – How to reduce the noise coupling – How to make the communication link more immune to EMI problems • Reducing the EMI radiation effects induced on the PCB antennas is a major challenge due to: – Difficulty of containing radiation at high frequencies – Small space available to design necessary circuits 4
- 5. PCB Antenna Design Challenges • PCB antennas need to be small in size at frequencies of interest for multiple bands: – BT – GSM, … • They rely heavily on ground planes: – Shape of ground plane affects antenna performance – Size of ground plane affects resonance frequencies • This has important consequences wrt EMI: – ‘Antenna currents’ can spread over total ground plane – Unwanted noise coupling caused by overlapping antenna and return currents • PCBs contain high speed buses 5
- 6. PCB Antenna Design (Contn’d) • Coupling exists between analog and digital interfaces on PCBs • In receive mode antenna sensitivity is further degraded by: – Low voltage input level (microvolts) – Coupling from digital interfaces – FCC power level limitations • In transmit mode antenna performance is further degraded by: – Coupling between output high RF power and digital PCB interfaces – Antenna mismatches 6
- 7. PCB Antenna Design Solutions • Partition PCB area by component interfaces • Analyze the return current distribution for both RF and digital interfaces • Place noisy digital interfaces away from analog parts to reduce coupling • Minimize return path discontinuities in ground plane • Minimize ground plane sharing between RF and digital interfaces 7
- 8. EMI Design process at NVIDIA • Simulate design early on to predict EMI problems • Estimate non-measurable quantities like current distribution • Identify performance failure points • Optimize design though multiple simulation iterations with accelerated computations using NVIDIA GPU hardware • Measure and certify product 8
- 9. PCB Antenna Geometry • The antenna used is a folded, multiband planar monopole antenna • Antenna is optimized for 900MHz, 1.7GHz-2.5GHz • It is 20mm x 8mm x 4mm • It is placed on one side of a ground plane • Antenna support material is a low dielectric ~ 2.2 dk 9
- 10. Influence of Solid Ground Plane Shape Width is kept at 5 cm Length is varied from 6cm to 11.5cm Length is kept at 8 cm Width is varied from 4.5cm to 6cm 10
- 11. Influence of Antenna Offset 11
- 12. Influence of U-Shaped Ground Plane Moving Edge Inward 12
- 13. Influence of U- to Γ-Shaped Ground Plane Shortening Leg Length x mm from full size The 53mm and 73mm cases correspond to actual PCB designs 13
- 14. Influence of Γ-Shaped Ground Plane • Plotting current distribution shows hot spot regions where not to place digital components Current distribution on GP at 900 MHz Current distribution on GP at 2.4GHz 14
- 15. Coupling between Antenna and Other Interfaces • Shown is a real PCB which is Digital interfaces are routed representative of wireless within yellow areas applications and allows study of coupling effects • PCB has 4-bit DDR memory buses and other differential IO interfaces • The two legs on both sides are ground extensions to other antennas and components 15
- 16. Coupling between Antenna and Other Interfaces • Four main coupling mechanisms that could cause the crosstalk between digital signals and on-board antennas: – Near-field coupling “through the air” above the PCB – Coupling by waveguide modes between the different ground planes of the PCB – Coupling by the return currents of signal interfaces and currents induced in the ground-planes by antennas – Coupling by currents induced on the PCB by power and ground pins of active components/chips 16
- 17. Influence of Shielding on Antenna Coupling • To look at near-field Transfer function from trace input to Antenna Port coupling and coupling by waveguide modes: Shielding does not affect antenna – A perfect PEC shielding- coupling can is placed above all traces on the PCB top side (shorted to ground plane) – A perfect PEC guard-ring inside the PCB substrate and around all traces (shorted to ground planes) 17
- 18. Influence of GP on Antenna Coupling Antenna currents Return current trace Current profiles for full GP 18
- 19. Influence of GP on Antenna Coupling Coupling antenna/traces for full GP 19
- 20. Influence of GP on Antenna Coupling Antenna currents Return current trace Antenna currents for GP with slot 20
- 21. Influence of GP on Antenna Coupling ±15 dB increase in coupling! Coupling antenna/traces for GP with slot 21
- 22. Influence of GP on Antenna Coupling Time domain noise voltage (in V) at antenna port. Traces are excited with a pseudo-random bit sequence of 2Gbit/s 22
- 23. Influence of GP on Antenna Coupling • Coupling between the traces’ and antenna’s current paths is the main contributing factor of noise • Hence, during the placement stage of components on the PCB one has to carefully select the place where digital interfaces are placed • Need to avoid any current return path discontinuities to prevent large current coupling 23
- 24. Reduction of Antenna and Bus Coupling • To reduce coupling between antenna and digital buses, four Bytes are excited differently: – Group1: input ports on left side of top layer, time delay = 0 – Group2: input ports on right side of top layer, time delay = Δ – Group3: input ports on left side of bottom layer , time delay = 2Δ – Group4: input ports on right side of bottom layer , time delay = 3Δ • Δ can have different values for different cases 24
- 25. Reduction of Antenna and Bus Coupling Transfer function from all trace inputs to Antenna Port Blue Green Red Cyan Group1 0 0 0 0 Group2 0 235 470 705 Group3 0 470 940 1410 Group4 0 705 1410 2115 • Coupling between traces and antenna are significantly reduced by about 50% up to 2.5 GHz by choosing appropriate values of Δ (delay) among the various groups. 25
- 26. Conclusions • Coupling between PCB antennas and digital interfaces should be carefully studied for the overall performance of a PCB • Interaction between the return currents of digital interfaces and antenna current profiles in ground planes is the main contributor to coupling. This allows for a successful component placement • In receive mode, the crosstalk from the digital interface to the antenna reduces the sensitivity of the receiving module • In transmit mode, the crosstalk from the antenna to the digital interfaces deteriorates the eye diagram and leads to higher bit error rates • Designs can be simulated and optimized by placing digital interface components outside regions of crowded current distribution and path discontinuities • Coupling caused by digital buses on PCB antennas can be reduced by about 50% by applying an appropriate phase shift between different bytes • A field solver augmented by CUDA acceleration can be used to solve for fields for large problem sizes to identify potential design problems 26