![Unit 3
T Maharshi Sanand Yadav[Assistant Professor ECE Dept]
1](https://image.slidesharecdn.com/coaunit3part2ciscvsrisc-210523135744/85/Coa-unit-3-part-2-cisc-vs-risc-1-320.jpg)
![Complex Instruction Set Architecture (CISC)
▪ The main idea is that a single
instruction will do all loading,
evaluating and storing operations
just like a multiplication command
will do stuff like loading data,
evaluating and storing it, hence it’s
complex.
▪ The CISC approach attempts to
minimize the number of instructions
per program but at the cost of
increase in number of cycles per
instruction.
Reduced Set Instruction Set Architecture (RISC)
▪ The main idea behind is to make
hardware simpler by using an
instruction set composed of a few
basic steps for loading, evaluating
and storing operations just like a load
command will load data, store
command will store the data.
▪ Reduce the cycles per instruction at
the cost of the number of instructions
per program.
T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 2](https://image.slidesharecdn.com/coaunit3part2ciscvsrisc-210523135744/85/Coa-unit-3-part-2-cisc-vs-risc-2-320.jpg)
![CISC
▪ Complex instruction, hence complex
instruction decoding.
▪ Instruction are larger than one word
size.
▪ Instruction may take more than single
clock cycle to get executed.
▪ Less number of general purpose
register as operation get performed in
memory itself.
▪ Complex Addressing Modes.
▪ More Data types.
RISC
▪ Simpler instruction, hence simple
instruction decoding.
▪ Instruction come under size of one
word.
▪ Instruction take single clock cycle to
get executed.
▪ More number of general purpose
register.
▪ Simple Addressing Modes.
▪ Less Data types.
▪ Pipelining can be achieved
T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 3](https://image.slidesharecdn.com/coaunit3part2ciscvsrisc-210523135744/85/Coa-unit-3-part-2-cisc-vs-risc-3-320.jpg)
![CISC
1. Complex Instruction Set Computer
2. Large Number of Complex Instructions
3. Instructions take varying amount of time for
execution
4. It has Multi-Clock
5. Less registers
6. More Addressing Modes
7. Pipelining is Difficult
8. Multiple Instruction sizes and formats
9. Variable Length Instructions
10. Many Instructions can Access Memory
11. Harvard or Von-Neuman Architecture
12. Emphasis on Hardware
RISC
1. Reduced Instruction Set Computer
2. Small Number Of Instructions
3. Instructions take Fixed amount of time for
Execution
4. It has a Single Clock
5. Used More Registers
6. Fewer Addressing Modes
7. Pipelining is easy
8. Instructions of same set with few Formats
9. Fixed Length Instructions
10. Only Load and Store Instructions can Access
Memory
11. Harvard Architecture
12. Emphasis on Software
T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 4](https://image.slidesharecdn.com/coaunit3part2ciscvsrisc-210523135744/85/Coa-unit-3-part-2-cisc-vs-risc-4-320.jpg)
![▪ Example – Suppose we have to add two 8-bit number:
▪ CISC approach: There will be a single command or instruction for this like ADD
which will perform the task.
▪ RISC approach: Here programmer will write first load command to load data in
registers then it will use suitable operator and then it will store result in desired
location.
▪ So, add operation is divided into parts i.e. load, operate, store due to which RISC
programs are longer and require more memory to get stored but require less
transistors due to less complex command
T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 5](https://image.slidesharecdn.com/coaunit3part2ciscvsrisc-210523135744/85/Coa-unit-3-part-2-cisc-vs-risc-5-320.jpg)
Coa unit 3 part 2 cisc vs risc
- 1. Unit 3 T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 1
- 2. Complex Instruction Set Architecture (CISC) ▪ The main idea is that a single instruction will do all loading, evaluating and storing operations just like a multiplication command will do stuff like loading data, evaluating and storing it, hence it’s complex. ▪ The CISC approach attempts to minimize the number of instructions per program but at the cost of increase in number of cycles per instruction. Reduced Set Instruction Set Architecture (RISC) ▪ The main idea behind is to make hardware simpler by using an instruction set composed of a few basic steps for loading, evaluating and storing operations just like a load command will load data, store command will store the data. ▪ Reduce the cycles per instruction at the cost of the number of instructions per program. T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 2
- 3. CISC ▪ Complex instruction, hence complex instruction decoding. ▪ Instruction are larger than one word size. ▪ Instruction may take more than single clock cycle to get executed. ▪ Less number of general purpose register as operation get performed in memory itself. ▪ Complex Addressing Modes. ▪ More Data types. RISC ▪ Simpler instruction, hence simple instruction decoding. ▪ Instruction come under size of one word. ▪ Instruction take single clock cycle to get executed. ▪ More number of general purpose register. ▪ Simple Addressing Modes. ▪ Less Data types. ▪ Pipelining can be achieved T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 3
- 4. CISC 1. Complex Instruction Set Computer 2. Large Number of Complex Instructions 3. Instructions take varying amount of time for execution 4. It has Multi-Clock 5. Less registers 6. More Addressing Modes 7. Pipelining is Difficult 8. Multiple Instruction sizes and formats 9. Variable Length Instructions 10. Many Instructions can Access Memory 11. Harvard or Von-Neuman Architecture 12. Emphasis on Hardware RISC 1. Reduced Instruction Set Computer 2. Small Number Of Instructions 3. Instructions take Fixed amount of time for Execution 4. It has a Single Clock 5. Used More Registers 6. Fewer Addressing Modes 7. Pipelining is easy 8. Instructions of same set with few Formats 9. Fixed Length Instructions 10. Only Load and Store Instructions can Access Memory 11. Harvard Architecture 12. Emphasis on Software T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 4
- 5. ▪ Example – Suppose we have to add two 8-bit number: ▪ CISC approach: There will be a single command or instruction for this like ADD which will perform the task. ▪ RISC approach: Here programmer will write first load command to load data in registers then it will use suitable operator and then it will store result in desired location. ▪ So, add operation is divided into parts i.e. load, operate, store due to which RISC programs are longer and require more memory to get stored but require less transistors due to less complex command T Maharshi Sanand Yadav[Assistant Professor ECE Dept] 5