Experimental Verification of Three phase quasi Switched Boost Inverter with an Improved PWM Control

International Journal of Power Electronics and Drive System (IJPEDS)
Vol. 10, No. 3, Sep 2019, pp. 1500~1509
ISSN: 2088-8694, DOI: 10.11591/ijpeds.v10.i3.pp1500-1509  1500
Journal homepage: http://iaescore.com/journals/index.php/IJPEDS
Experimental verification of three phase quasi switched boost
inverter with an improved PWM control
P.Sriramalakshmi, Sreedevi V.T.
School of Electrical Engineering, Vellore Institute of Technology, India
Article Info ABSTRACT
Article history:
Received Nov 19, 2018
Revised Mar 6, 2019
Accepted Mar 26, 2019
In this paper, an experimental investigation of a three phase quasi Switched
Boost Inverter (qSBI) topology is proposed and analysed with an improved
Pulse Width Modulation strategy. The qSBI is capable of providing both
boost and inversion actions in a single stage. The improved PWM control
technique can provide a higher boost with the reduced duty ratio. The
theoretical analysis presented in this work is validated using an experimental
set up of 100W qSBI topology and hardware results are shown for
verification. The improved PWM strategy is implemented and firing pulses
are generated in FPGA SPARTAN 3E kit. With the duty ratio of 0.05, the
peak ac load voltage of 80 V is obtained. The performance of three phase
qSBI is analysed with both conventional PWM strategy and improved PWM
strategy. The observations are presentated in detail.
Keywords:
Pulse width modulation
Quasi switched boost inverter
Shoot through
Simple boost control
Switched boost inverter Copyright © 2019 Institute of Advanced Engineering and Science.
All rights reserved.
Corresponding Author:
P.Sriramalakshmi,
School of Electrical Engineering,
Vellore Institute of Technology, Chennai, India
Email:sriramalakshmi.p@vit.ac.in
1. INTRODUCTION
The vast growth of sustainable energy sources like solar, fuel cells, wind and geothermal energy
etc., are gaining the major interest among most of the researchers due to the reduction of fossil fuels and
other conventional energy sources [1]. Designing a suitable power electronic converter is the major task in
transforming the available DC power to AC power in the case of solar PV systems. With the help of a
traditional three phase Voltage Source Inverters (VSI) [2, 3], the available DC voltage is inverted to a
reduced voltage level. Whenever the output voltage requirement is more than the available DC voltage, a
boost inverter needs to be connected which forms a two stage power conversion. It also increases the cost,
size and weight of the converter. Both the devices in a single leg should not be switched on at the same time.
Electro Magnetic Interference (EMI), dead time, shoot through are the other major issues in traditional
VSI [4].
To eliminate the complex two stage structure, Impedance Source Inverter (ZSI) is proposed in 2002
[5]. The modified topologies of ZSI like, a class of quasi ZSI (q-ZSI)[6], extended boost ZSI/ q-ZSI [7],
Trans Z Source Inverter (Trans ZSI)[8] are presented to obtain continuous input current. In traditional ZSI,
inductors are replaced by switched inductor cells to obtain a higher boost [9]. The tapped inductor ZSI (TL-
ZSI [10]), TZ-Source Inverter (TZSI) [11] possess all the advantages of traditional ZSI by using transformer.
There are cascaded TZSIs, alternate cascaded switched/ tapped inductor cells, cascaded multi cell Trans ZSIs
are available in literature [12-16]. All the ZSI topologies are of bulky, heavy and of large volume due to the
presence of large value of passive elements. Hence it results in higher loss and reduced efficiency. To
overcome the aforementioned issues Switched Boost Inverter (SBI) and various modulation algorithms of
SBI are proposed by researchers in [17-20].
A class of quasi-SBIs (qSBIs) is suggested in [21] to have continuous current profile. The qSBI has
a reduced count of passive elements and the features are similar to that of ZSI. A Current Fed Switched

Int J Pow Elec & Dri Syst ISSN: 2088-8694 
Experimental verification of three phase quasi switched boost inverter ... (P.Sriramalakshmi)
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Inverter (CFSI) is suggested in [22]. The CFSI has the boost factor (1-D) times higher than SBI. To produce
high voltage gain, CFSI needs to be operated at high shoot through duty ratio which results in reduced
modulation index. Switched inductor and switched capacitor based boost inverter topologies are proposed in
[23-24]. Since the conventional SBC control strategy has restriction on its modulation index, a modified
control algorithm is proposed in [25] to extend the modulation index. A single phase quasi SBI topology is
analysed with the modified SBC technique is presented in [25].
In this paper, a three phase quasi SBI with an improved simple boost PWM strategy is discussed to
resolve the drawback of reduced modulation index. Compared to the conventional SBC method, the
improved PWM technique can offer a high gain using a reduced shoot through duty ratio and higher
modulation index. So the stress across the switches, diodes and capacitors are reduced significantly. In this
modified PWM control, the switch S0 is gated during the active state of the inverter circuit. A 100 W three
phase qSBI topology is developed and tested with an input voltage of 36 V. The topology with the improved
PWM provides the boosted dc voltage of 80 V and the boost factor of 2.22 whereas the traditional PWM
offers the boost factor of only 1.11. The inverter topology is simulated in MATLAB/SIMULINK
environment and it is validated by experimentation. The experimental results are presented in detail.
2. THREE PHASE qSBI TOPOLOGY
The single phase qSBI is proposed in [21]. Figure.1 shows the circuit diagram of three phase qSBI
topology. It includes an inductor L , a capacitor C , two passive switches )
D
,
D
( 2
1 , seven active switches
)
S
S
( 6
0  and a resistive load. An LC filter is connected at the inverter output terminal to filter out the
harmonics present in the inverter output voltage.
Figure 1. Three phase quasi switched boost inverter
3. MODIFIED SBC MODULATION STRATEGY
In conventional SBC method, reference signals are compared with triangular carrier signal to
generate pulses for the inverter switches.The positive and negative envelops are compared with triangular
signal to generate shoot through pulses.The shoot through pulses are ORed with the bridge inverter pulses to
produce boosting action. The improved PWM control strategy is illustrated in Figure 2(a) [25]. A shoot
through envelop sh
V is compared with a high frequency repeating sequence saw
V (saw tooth waveform) of
magnitude 2 to obtain the pulse for the boost network switch. Again the shoot through envelop is compared
with the repeating sequence 1 (triangular carrier pulse) of double the frequency to generate the shoot through
pulse. Then, sinusoidal modulating signals are compared with the repeating sequence 2 (triangular carrier
pulse) to generate the firing pulses for the inverter switches S1 to S6. Finally, shoot through signals are added
into the signals of the switches in the H-bridge to operate along with the boost inverter switch 0
S . The
control logic is shown in Figure 2(b).

 ISSN: 2088-8694
Int J Pow Elec & Dri Syst, Vol. 10, No. 3, Sep 2019 : 1500 – 1509
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Figure 2. (a) Modified simple boost control PWM Figure 2. (b) Control logic diagram
4. STEADY STATE ANALYSIS OF THREE PHASE qSBI
With the conventional PWM technique, the circuit can operate in two modes [21]. One is the shoot
through state during which all the active devices in the circuit remains on. The other mode is the non- shoot
through state during which the inverter works as the conventional VSI. When the inverter is analysed with
the modified boost control method; there are three different operating modes namely, shoot through state,
active state-1 and active state-2 as shown in Figure 3.
(a) (b) (c)
Figure.3. operating modes of three phase qSBI
a) Shoot through state
b) Active state-1
c) Active state-2
4.1. Shoot through state
During shoot-through state [ 2
1
T
T  ], all inverter bridge switches ( 6
1 S
S  ) are on along with the
boost network switch ( )
S0 as shown in Figure 3(a). Both the diodes 2
1
D
,
D are reverse biased. The
inductor ( 1
L ) is charged by the capacitor ( 1
C ) along with the input DC source ( 1
V ).
C
1
L V
V
V 
 (1)
L
C I
I 
 (2)

1503
4.2. Active state-1
During non-shoot-through state 1 [ 3
2
T
T  ], switch 0
S is turned off as shown in Figure 3(b). The
inductor discharges through the capacitor and the duration for this interval is 2
/
T
)
D
1
( S
 . During this
mode power flows through the load
C
1
L V
V
V 
 (3)
PN
L
C I
I
I 
 (4)
4.3. Active state-2
During non-shoot-through state 2 [ 1
0 T
T  ], switch 0
S is turned on as shown in Figure 3 (c), and
the inverter circuit operates in conventional states. The switching period is same as that in the non-shoot-
through state 1.
1
L
V
V  (5)
Applying volt second balance using (1)-(5),
The capacitor voltage is given by,
1
C V
D
3
1
2
V

 (6)
Inverter input current is given by,
L
inv I
)
D
2
1
(
2
D
3
1
I


 (7)
Peak DC link voltage is derived as,
1
C
PN V
D
3
1
2
V
V


 (8)
Boost factor is given as,
D
3
1
2
V
V
B
1
PN


 (9)
The expression for the RMS output voltage of three phase qSBI with traditional SBC modulation strategy is
given by,
2
2
1
.
D
2
1
1
V
.
M
.
3
2
2
1
V
.
B
.
M
3
rms
V


 (10)
Similarly, the expression for the rms line voltage with improved PWM is given by,
2
2
1
V
.
D
3
1
2
.
M
3
2
2
1
V
.
B
.
M
3
rms
V


 (11)

 ISSN: 2088-8694
1504
5. PASSIVE COMPONENTS DESIGN
The passive components, inductance and capacitance in the qSBI topologies are chosen based on the
High Frequency(HF) peak –peak ripple content in inductor current and High Frequency(HF) peak-peak
ripple on capacitor voltage [25]. The ripple content present in the inductor current (∆IL) and in the capacitor
voltage ((∆VL) are calculated by rL% and rC% respectively. The percentage of ripple content is calculated by
the following equations.
L
I
0
P
)
D
3
1
%(
L
r
2
T
)
D
3
1
)(
D
1
(
2
V
L
g



 (12)
L
I
2
V
%
C
r
8
0
TP
)
D
3
1
)(
D
1
(
C
1


 (13)
The ripple inductor current and ripple capacitor voltage are obtained as follows,
L
I
)
D
3
1
(
L
2
T
)
D
3
1
)(
D
1
(
V
L
I
g




 (14)
C
4
T
)
D
1
(
I
C
V L 

 (15)
For the modified SBC PWM scheme, the peak values of LF (Low Frequency) inductor current and the LF
capacitor voltage are calculated as [25],
2
)
D
3
1
(
2
LC
16
m
MI
)
D
3
1
(
P
_
L
i





(16)
2
)
D
3
1
(
2
LC
16
m
LMI
4
P
_
C
V




 (17)
The values of passive components are calculated as per the expressions given in (12) and (13) [25].
The peak values can be obtained by substituting the selected inductance and capacitance into (14) and (15). If
the peak values of LF ripple are in the desired range, the values calculated are the desired one. If the values
exceed the limit, the values of passive elementss need to be increased, and need to be re-checked (16) and
(17) till the values reach the desired range.
6. SIMULATION RESULTS
The topology is simulated in MATLAB/SIMULINK environment. The simulation parameters of the
three phase qSBI are listed in Table.1. The input voltage is taken as 36 V and the inductor current which is
connected in series with the dc source is observed as 2.9 A. It is shown in Figure. 4(a). The voltage stress
across diodes and the boost network switch are obtained as 80 V as shown in Figure. 4(b). The capacitor
voltage and boosted dc link voltage are obtained as 80V as obtained in Figure.4(c).
The simulated waveform of unfiltered peak load current is shown in Figure.4(d). The peak line
voltage is obtained as 150 V at a reduced duty ratio of 0.05 which is presented in Figure. 4(e). The harmonic
spectrum is obtained as shown in Figure. 4(f).
Table.1. Simulation specification
Parameter/Components Attributes
Input voltage (Vg) 36 V
Inductance (LI) 1.3 mH
Capacitance (CI) 680 µF
Modulation index (M) 0.95
Shoot through duty ratio (D) 0.05
Switching frequency (ftri) S0 = 20 kHz
S1-S6 = 10kHz

1505
(a) (b)
(c) (d)
(e) (f)
Figure 4. Simulation results, (a) Simulated results of source voltage, (b) Diode and Switch voltage stress and
source current, (c) DC link voltage,capacitor voltage, (d) Load current waveforms And inverter bridge stress,
(e). Unfiltered load voltage waveform, (f) Harmonic spectrum
7. EXPERIMENTAL ANALYSIS OF THREE PHASE QSBI
The laboratory set up of three phase qSBI topology is shown in Figure.5. The hardware set up is
made with the same parameters as it is considered for the simulations.
Table 2. Hardware components specification
Components Manufacturer Attributes
S1-S6 MOSFET(IRFP460) 500 V, 20 A, RDSon = 0.27Ω
S0 MOSFET- IRFP4668 200 V, 130 A, RDSon = 8mΩ
D1, D2 Diode(STPS60SM200C) 200 V, 60 A, VF = 0.7V
FPGA SPARTAN 3E -
Driver circuit Gate driver(TLP250) 0.1µF, 65V, 22Ω, 1kΩ

 ISSN: 2088-8694
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Figure. 6(a) and Figure.6(b) show the pulses generated for phase A and the boost network switch
(Sa) in FPGA platform. Figure. 6(c ) shows that the inverter bridge stress. It is obvious that the switch stress
is equal to that of the dc link voltage since the dc link voltage is observed as 81 V from the Figure.6(d). The
three phase peak ac load voltages of 80V are obtained as shown in Figure. 6(e) and Figure 6(f).
(a) (b)
(c) (d)
(e) (f)
Figure 6. Experimental results, (a)Pulse for phase A, (b) Pulse for boost network switch (Sa), (c) Voltage
stress across inverter switch, (e) Load voltage waveforms of phase RY, (f) Load voltage waveforms of phase
RB Phase YB
8. PERFORMANCE ANALYSIS OF THREE PHASE QSBI
A performance analysis is done on three phase qSBI with traditional SBC control strategy and
improved PWM control strategy.

1507
8.1. Boost factor(B) Vs Shoot through duty ratio(D)
A graph as shown in Figure 7(a) is plotted between boost factor (B) and shoot through duty ratio (
D) with the following relationships. The boost factor expession for three phase qSBI with traditional PWM
strategy is given by [21],
D
2
1
1
V
V
B
g
PN


 (18)
Similarly, the boost factor expession with improved PWM strategy is given by[25]
(19)
Under the improved PWM control, the qSBI can provide higher boosted voltage as compared to the
traditional SBC modulation strategy for the same shoot-through duty ratio. At the same time, the voltage
stress across the switches is increased. It is understood from the plots that the improved SBC can provide the
higher voltage boost of 2.22 whereas the conventional SBC technique offers only 1.11 for the same duty ratio
of 0.05.
(a) (b)
Figure 7. (a) Plot between shoot through duty ratio(D) Vs Boost factor(B), (b) Plot between Modulation
index (M) Vs Voltage gain (B)
8.2 Modulation index Vs Voltage gain
The relationship between modulation index and voltage gain of the qSBI is plotted as shown in
Figure 7(b). The expression for the RMS output voltage of three phase qSBI with traditional SBC modulation
strategy is given by,
2
2
1
.
D
2
1
1
V
.
M
.
3
2
2
1
V
.
B
.
M
3
rms
V


 (20)
Similarly, the expression for the rms line voltage with improved PWM is given by,
2
2
1
V
.
D
3
1
2
.
M
3
2
2
1
V
.
B
.
M
3
rms
V


 (21)
D
3
1
2
V
V
B
g
PN




 ISSN: 2088-8694
1508
With the input of 36V, duty ratio 0.05 and modulation index of 0.95, the rms output voltage of three
phase qSBI is obtained as 46.49V wit the improved PWM whereas the traditional PWM technique offers
only 23.27V.
9. CONCLUSION
An experimental set up of three phase quasi Switched Boost Inverter topology is developed for
100W power output. It is simulated and validated with experimental results to understand the performance of
the topology with an improved PWM control strategy. It is clear that the topology can provide a higher boost
factor of 2.22 with lower duty ratio of 0.05 and it offers high quality of output voltage. Also with the
improved PWM control technique, the topology offers increased peak ac output voltage at reduced harmonic
distortion. The voltage gain of 2.11 is obtained with the input voltage of 36V. The topology can be very well
suitable for renewable energy applications. This research work can be further extended with closed loop
control techniques.
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BIOGRAPHIES OF AUTHORS
Sriramalakshmi.P was born in Tamilnadu, India. She received her B.Tech degree in
Electrical Engineering from National Institute of Technology, Silchar, India. She has
done M.E from College of Engineering, Guindy, Chennai, India. She is currently
working towards her Phd in VIT, Chennai. Her research area includes Z source
inverter, switched boost inverter topologies and single stage boost inverters.
Sreedevi V.T. was born in Kerala, India. She received her Master of Technology and
PhD from National Institute of Technology, Trichy, India. She is currently working as
professor in the School of Electrical Engineering, VIT, Chennai. Her research area
includes AC–DC converters for electric vehicles, multilevel inverters, z-source
inverters and Optimization techniques.

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