I2 c
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The document discusses the I2C (Inter-Integrated Circuit) protocol, which is a serial communication standard used to connect low-speed peripherals to embedded systems and other devices. It describes the basic I2C protocol including data transfer methods, components, and modes. It also provides code examples from an iBoot project that implement I2C read and write functionality using registers, state machines, and GPIO interfaces.
![Iboot-> I2C.c iBoot->I2C / 2 I2C Bus i2c_setup clock_gate_switch(I2C0_CLOCKGATE, ON); init_i2c(&I2C[0], FrequencyBasePeripheral); settings Frequency; divisorRequired; Prescaler; gpio_custom_io; Methods I2CError i2c_rx ( int bus, int iicaddr, const uint8_t* registers, int num_regs, void* buffer, int len); I2CError i2c_tx (int bus, int iicaddr, void* buffer, int len);](https://image.slidesharecdn.com/i2c-100513045613-phpapp02/85/I2-c-11-320.jpg)
I2 c
- 1. I2C 2010/05/13 by Sean Chen
- 2. Agenda What’s I2C? I2C Protocol Other I2C Bus I2C components NXP UM1024 Data transfer How to R/W I2C? Iboot References
- 3. What’s I2C? Definition I²C ( Inter-Integrated Circuit ) is a multi-master serial single-ended computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard , embedded system , or cellphone . Internal Bus (400 kbit/s Fast mode , 1 Mbit/s Fast mode plus or Fm+, and 3.4 Mbit/s High Speed mode );
- 4. I2C Protocol 1/2 protocol Serial Data Line(SDA) Serial Clock (SCL) RD Pull up resistors Switch on/off Speed per-byte ACK/NACK bits. keywords Master Slaver
- 5. I2C Protocol 2/2 Timing diagram Data transfer is initiated with the START bit ( S ) when SDA is pulled low while SCL stays high. Then, SDA sets the transferred bit while SCL is low (blue) and the data is sampled (received) when SCL rises (green). When the transfer is complete, a STOP bit ( P ) is sent by releasing the data line to allow it to be pulled up while SCL is constantly high.
- 6. Other I2C Bus Other I2C Bus CBUS compatibility SMBus - System Management Bus is a single-ended simple two-wire bus for the purpose of lightweight communication. Most commonly it is found in computer motherboards for communication with the power source for ON/OFF instructions. PMBus - Power Management Bus is a variant of the System Management Bus (SMBus) which is targeted at digital management of power supplies . Like SMBus, it is a relatively slow speed two wire communications protocol based on I²C . Intelligent Platform Management Interface (IPMI)
- 7. NXP UM1024 I2C components
- 8. Data transfer Data transfer Master Slaver Selection (Slave Address) Mode (R/W) Data transfer N bytes + ack
- 9. How to R/W I2C? i2c_rx Config Address registers is_write Flase bufferLen Transfer data length unit(bytes) Do I2c_readwrite FSM Case : Start ()? NT=I2CSendRegister: NT=I2CSetup; Case : I2CSendRegister .. … . ST=NT;
- 10. Iboot-> I2C.h iboot I2CState I2CStart I2CTx I2CRx I2CSendRegister … . I2CInfo I2CState uint32_t address; uint32_t frequency; uint8_t* buffer; Gpio Interface
- 11. Iboot-> I2C.c iBoot->I2C / 2 I2C Bus i2c_setup clock_gate_switch(I2C0_CLOCKGATE, ON); init_i2c(&I2C[0], FrequencyBasePeripheral); settings Frequency; divisorRequired; Prescaler; gpio_custom_io; Methods I2CError i2c_rx ( int bus, int iicaddr, const uint8_t* registers, int num_regs, void* buffer, int len); I2CError i2c_tx (int bus, int iicaddr, void* buffer, int len);
- 12. References I2C protocol 原理及應用 http://jyhshin3.blogspot.com/2009/04/ic-inter-integrated-circuit.html NXP UM10204.pdf http://www.nxp.com/documents/user_manual/UM10204.pdf WiKi I2C http://en.wikipedia.org/wiki/I%C2%B2C