Review of Basics of Digital Electronics 1 Lecture 1
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Overview
Introduction
Logic Gates
Flip Flops
Registers
Counters
Multiplexer/ Demultiplexer
Decoder/ Encoder
Review of Basics of Digital Electronics 2 Lecture 1
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Introduction
Digital Computer
A computer that stores data in terms of digits (numbers)
and proceeds in discrete steps from one state to the next
Binary digits
The states of a digital computer typically involve binary
digits. A binary digit is called a bit
RAM
CPU
O/P
Device
I/P
Device
IOP
Block diagram of a digital computer
Review of Basics of Digital Electronics 3 Lecture 1
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Logic Gates
A
X X = (A + B)’
B
Name Symbol Function Truth Table
AND
A X = A • B
X or
B X = AB
0 0 0
0 1 0
1 0 0
1 1 1
0 0 0
0 1 1
1 0 1
1 1 1
OR
A
X X = A + B
B
I A X X = A
0 1
1 0
Buffer A X X = A
A X
0 0
1 1
NAND
A
X X = (AB)’
B
0 0 1
0 1 1
1 0 1
1 1 0
NOR
0 0 1
0 1 0
1 0 0
1 1 0
XOR
Exclusive OR
A X = A  B
X or
B X = A’B + AB’
0 0 0
0 1 1
1 0 1
1 1 0
A X = (A  B)’
X or
B X = A’B’+ AB
0 0 1
0 1 0
1 0 0
1 1 1
XNOR
Exclusive NOR
or Equivalence
A B X
A B X
A X
A B X
A B X
A B X
A B X
Review of Basics of Digital Electronics 4 Lecture 1
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Flip Flops
Characteristics
- 2 stable states
- Memory capability
- Operation is specified by a Characteristic Table
The Storage elements employed in clocked sequential circuits,
capable of storing one bit of information, are called Flip Flops
The most common types of flip flops are
SR (Set Reset)
D (Data)
JK
T (Toggle)
Review of Basics of Digital Electronics 5 Lecture 1
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Clocked Flip Flops
In a large digital system with many flip flops, operations of
individual flip flops are required to be synchronized to a clock
pulse. Otherwise, the operations of the system may be
unpredictable.
S Q
c
R Q’
S Q
c
R Q’
Clock pulse allows the flip flop to change state only when there is a
clock pulse appearing at the c terminal (as shown in fig).
Edge Triggered Flip Flops
operates when operates when
clock is high clock is low
State transition occurs at the rising edge or falling edge of the clock pulse
Review of Basics of Digital Electronics 6 Lecture 1
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
S Q
c
R Q’
S R Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 indeterminate
(forbidden)
Flip Flop GraphicalSymbol Characteristic Table
SR (Set
Reset)
D (Data)
D Q(t+1)
0 0
1 1
J Q
C
K Q'
Flip Flops
Review of Basics of Digital Electronics 7 Lecture 1
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
J Q
c
R Q’
S R Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 indeterminate
(forbidden)
Flip Flop GraphicalSymbol Characteristic Table
J-K
T (Toggle)
T Q
c
T Q(t+1)
0 Q(t)
1 Q’(t)
J Q
C
K Q'
J K Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 Q’(t)
Flip Flops

More Related Content

PPTX
Lecture 2
PPTX
Lecture 9
PPTX
Lecture 8
PPTX
Lecture 10
PDF
IRJET- Analog to Digital Conversion Process by Matlab Simulink
PPT
Arithmetic micro Operations
PPTX
ST-Ericsson Internship Presentation
PPTX
8 bit alu design
Lecture 2
Lecture 9
Lecture 8
Lecture 10
IRJET- Analog to Digital Conversion Process by Matlab Simulink
Arithmetic micro Operations
ST-Ericsson Internship Presentation
8 bit alu design

What's hot (19)

PPTX
Shift Microoperations by Pir Sarfraz RSDT larkana
PDF
Lecture 06 pic programming in c
PPTX
Design and implementation of low power
PDF
Cadancesimulation
PDF
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
PDF
Enrichment towards the design of efficient 4 bit reversible subtractor 2
PDF
implementation and design of 32-bit adder
PDF
[IJET-V1I3P5] Authors :Dushyant Kumar Soni, Ashish Hiradhar
PPTX
Fluke 173x hand on final, Milano meeting
PDF
VLSI Final Design Project
DOC
Siemens s7 plc shift register instructions (shrb) plc ladder logic
PDF
Microprocessors
PPT
ALU project(segma team)
PPTX
Vlsi project presentation
PDF
Analysis of Power Optimization of Serial Communication Protocol-Memory–Switch...
PPTX
Doing the Software Right vs. Doing the Right Software
DOCX
A Computers Architecture project on Barrel shifters
PPT
8 Bit A L U
DOCX
Vlsi ieee 2014 be, b.tech_completed list(m)
Shift Microoperations by Pir Sarfraz RSDT larkana
Lecture 06 pic programming in c
Design and implementation of low power
Cadancesimulation
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
Enrichment towards the design of efficient 4 bit reversible subtractor 2
implementation and design of 32-bit adder
[IJET-V1I3P5] Authors :Dushyant Kumar Soni, Ashish Hiradhar
Fluke 173x hand on final, Milano meeting
VLSI Final Design Project
Siemens s7 plc shift register instructions (shrb) plc ladder logic
Microprocessors
ALU project(segma team)
Vlsi project presentation
Analysis of Power Optimization of Serial Communication Protocol-Memory–Switch...
Doing the Software Right vs. Doing the Right Software
A Computers Architecture project on Barrel shifters
8 Bit A L U
Vlsi ieee 2014 be, b.tech_completed list(m)
Ad

Similar to Lecture 1 (20)

PPTX
Lecture 1
PPTX
.Comp Org and Arch All_Slide_1711695396000.pptx
PPSX
Coa presentation2
PPTX
Computer organization and architecture Chapter 1 (3).PPTX
PDF
Digital electronics(EC8392) unit- 1-Sesha Vidhya S/ ASP/ECE/RMKCET
PPTX
Computer organization and architecture Chapter 1-1.pptx
PPT
Micro operations
PPTX
PPT
Degital 1
PDF
Logic And Computer Design Fundamentals 4 International Edition M Morris Mano
PPTX
Computer System Architecture
PPTX
Module-1_Part_1 (1).pptx
PPT
Week 1 Lecture.ppt
PPT
Week 1 Lecture.ppt
PPT
IntroductiontoDigitalElectronics2022-23.ppt
PPT
fffggggggggggggggggggggghhhhhhhhhhhhhhhhhh.ppt
PPT
Introduction to Digital Electronics by PPT
PPT
IntroductiontoDigitalElectronics IntroductiontoDigitalElectronics.ppt
PPT
microprocessors
PPSX
Coa presentation1
Lecture 1
.Comp Org and Arch All_Slide_1711695396000.pptx
Coa presentation2
Computer organization and architecture Chapter 1 (3).PPTX
Digital electronics(EC8392) unit- 1-Sesha Vidhya S/ ASP/ECE/RMKCET
Computer organization and architecture Chapter 1-1.pptx
Micro operations
Degital 1
Logic And Computer Design Fundamentals 4 International Edition M Morris Mano
Computer System Architecture
Module-1_Part_1 (1).pptx
Week 1 Lecture.ppt
Week 1 Lecture.ppt
IntroductiontoDigitalElectronics2022-23.ppt
fffggggggggggggggggggggghhhhhhhhhhhhhhhhhh.ppt
Introduction to Digital Electronics by PPT
IntroductiontoDigitalElectronics IntroductiontoDigitalElectronics.ppt
microprocessors
Coa presentation1
Ad

More from RahulRathi94 (20)

PPTX
Lecture 47
PPTX
Lecture 46
PPTX
Lecture 44
PPTX
Lecture 43
PPTX
Lecture 42
PPTX
Lecture 41
PPTX
Lecture 40
PPTX
Lecture 39
PPTX
Lecture 38
PPTX
Lecture 37
PPTX
Lecture 36
PPTX
Lecture 35
PPTX
Lecture 34
PPTX
Lecture 28
PPTX
Lecture 27
PPTX
Lecture 26
PPTX
Lecture 25
PPTX
Lecture 24
PPTX
Lecture 23
PPTX
Lecture 22
Lecture 47
Lecture 46
Lecture 44
Lecture 43
Lecture 42
Lecture 41
Lecture 40
Lecture 39
Lecture 38
Lecture 37
Lecture 36
Lecture 35
Lecture 34
Lecture 28
Lecture 27
Lecture 26
Lecture 25
Lecture 24
Lecture 23
Lecture 22

Recently uploaded (20)

PDF
A Late Bloomer's Guide to GenAI: Ethics, Bias, and Effective Prompting - Boha...
PPTX
Benefits of Physical activity for teenagers.pptx
PDF
1 - Historical Antecedents, Social Consideration.pdf
PPTX
MicrosoftCybserSecurityReferenceArchitecture-April-2025.pptx
PDF
NewMind AI Weekly Chronicles – August ’25 Week III
PPTX
Microsoft Excel 365/2024 Beginner's training
PDF
Zenith AI: Advanced Artificial Intelligence
PDF
Produktkatalog für HOBO Datenlogger, Wetterstationen, Sensoren, Software und ...
PDF
A proposed approach for plagiarism detection in Myanmar Unicode text
PDF
Two-dimensional Klein-Gordon and Sine-Gordon numerical solutions based on dee...
PDF
sustainability-14-14877-v2.pddhzftheheeeee
PDF
A comparative study of natural language inference in Swahili using monolingua...
PPTX
Configure Apache Mutual Authentication
PDF
OpenACC and Open Hackathons Monthly Highlights July 2025
PDF
Five Habits of High-Impact Board Members
PDF
A review of recent deep learning applications in wood surface defect identifi...
PDF
CloudStack 4.21: First Look Webinar slides
PPTX
Chapter 5: Probability Theory and Statistics
PDF
sbt 2.0: go big (Scala Days 2025 edition)
PDF
Abstractive summarization using multilingual text-to-text transfer transforme...
A Late Bloomer's Guide to GenAI: Ethics, Bias, and Effective Prompting - Boha...
Benefits of Physical activity for teenagers.pptx
1 - Historical Antecedents, Social Consideration.pdf
MicrosoftCybserSecurityReferenceArchitecture-April-2025.pptx
NewMind AI Weekly Chronicles – August ’25 Week III
Microsoft Excel 365/2024 Beginner's training
Zenith AI: Advanced Artificial Intelligence
Produktkatalog für HOBO Datenlogger, Wetterstationen, Sensoren, Software und ...
A proposed approach for plagiarism detection in Myanmar Unicode text
Two-dimensional Klein-Gordon and Sine-Gordon numerical solutions based on dee...
sustainability-14-14877-v2.pddhzftheheeeee
A comparative study of natural language inference in Swahili using monolingua...
Configure Apache Mutual Authentication
OpenACC and Open Hackathons Monthly Highlights July 2025
Five Habits of High-Impact Board Members
A review of recent deep learning applications in wood surface defect identifi...
CloudStack 4.21: First Look Webinar slides
Chapter 5: Probability Theory and Statistics
sbt 2.0: go big (Scala Days 2025 edition)
Abstractive summarization using multilingual text-to-text transfer transforme...

Lecture 1

  • 1. Review of Basics of Digital Electronics 1 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Overview Introduction Logic Gates Flip Flops Registers Counters Multiplexer/ Demultiplexer Decoder/ Encoder
  • 2. Review of Basics of Digital Electronics 2 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Introduction Digital Computer A computer that stores data in terms of digits (numbers) and proceeds in discrete steps from one state to the next Binary digits The states of a digital computer typically involve binary digits. A binary digit is called a bit RAM CPU O/P Device I/P Device IOP Block diagram of a digital computer
  • 3. Review of Basics of Digital Electronics 3 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Logic Gates A X X = (A + B)’ B Name Symbol Function Truth Table AND A X = A • B X or B X = AB 0 0 0 0 1 0 1 0 0 1 1 1 0 0 0 0 1 1 1 0 1 1 1 1 OR A X X = A + B B I A X X = A 0 1 1 0 Buffer A X X = A A X 0 0 1 1 NAND A X X = (AB)’ B 0 0 1 0 1 1 1 0 1 1 1 0 NOR 0 0 1 0 1 0 1 0 0 1 1 0 XOR Exclusive OR A X = A  B X or B X = A’B + AB’ 0 0 0 0 1 1 1 0 1 1 1 0 A X = (A  B)’ X or B X = A’B’+ AB 0 0 1 0 1 0 1 0 0 1 1 1 XNOR Exclusive NOR or Equivalence A B X A B X A X A B X A B X A B X A B X
  • 4. Review of Basics of Digital Electronics 4 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Flip Flops Characteristics - 2 stable states - Memory capability - Operation is specified by a Characteristic Table The Storage elements employed in clocked sequential circuits, capable of storing one bit of information, are called Flip Flops The most common types of flip flops are SR (Set Reset) D (Data) JK T (Toggle)
  • 5. Review of Basics of Digital Electronics 5 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Clocked Flip Flops In a large digital system with many flip flops, operations of individual flip flops are required to be synchronized to a clock pulse. Otherwise, the operations of the system may be unpredictable. S Q c R Q’ S Q c R Q’ Clock pulse allows the flip flop to change state only when there is a clock pulse appearing at the c terminal (as shown in fig). Edge Triggered Flip Flops operates when operates when clock is high clock is low State transition occurs at the rising edge or falling edge of the clock pulse
  • 6. Review of Basics of Digital Electronics 6 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT S Q c R Q’ S R Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 indeterminate (forbidden) Flip Flop GraphicalSymbol Characteristic Table SR (Set Reset) D (Data) D Q(t+1) 0 0 1 1 J Q C K Q' Flip Flops
  • 7. Review of Basics of Digital Electronics 7 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT J Q c R Q’ S R Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 indeterminate (forbidden) Flip Flop GraphicalSymbol Characteristic Table J-K T (Toggle) T Q c T Q(t+1) 0 Q(t) 1 Q’(t) J Q C K Q' J K Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 Q’(t) Flip Flops