SlideShare a Scribd company logo
Presented to:

Prof.Dr. : Ihab Talkhan
by
Eng. Amr Abd El latief Abd El Al

Eng. Mohammad Ahmed Hamed
Agenda
Introduction
Benefits of data Compression
Why does compression works (on testing vector)
Test vector compression schemes Categories
Data compression techniques
Hufman Coding method
Agenda
Geometric methods.
Conclusion
References
Introduction
• Test Levels: System Testing, Chip Testing


Board Testing.

• Increasing integration density results in:
•

larger designs
• more scan cells
• more faults.
Introduction (Cont.)
• external testing: involves storing all test vectors and test

response on an external tester.
• Tester Challenges:
•
•
•
•

limited speed
memory,
I/O channels
Bandwidth.
Introduction (Cont.)
 Overcoming approaches :
stand-alone BIST:



But it has a low fault detection probability due to
RPR Faults


hybrid BIST:






use a combination of BIST and test vectors

test data compression. (Described Here)
DataCompression Benefits
• First,
it reduces the amount of data stored on the tester,
•Second,
it can reduces the test time for a given test data bandwidth
TestVectors Characteristics




Test vectors are highly compressible because typically
only 1% to 5% of their bits are specified (care)bits. The
rest are don’t-cares.

because faults are structurally related in the circuit test
cubes also tend to be highly correlated
The compression technique categories
1 . Run-length based codes.
2 . Dictionary codes.
3 . Statistical codes (Huffman coding)
4 . Linear decompression.
5 . Broadcast scan methods
6 . Geometric methods.
Run-length-based codes
• simple form of data compression
• runs of data means line of data

• Good method for data that contains many such runs
Run-length-based codes
 Note:
Careful ordering of the test cubes maximizes the number of 0s in the
difference vectors, thereby improving the effectiveness of run-length
coding.

Dictionary codes.
1 -partitions the original data into n-bit symbols.
2 - Uses a dictionary to store each unique symbol.
3 - encoding each n-bits using a b-bit code word
corresponds to the symbol’s index in the dictionary
(b<n)
Dictionary codes.
Hoffman Method Example
Huffman Algorithm


initialization : put all symbols on a list sorted according to their frequency count





repeat until the list has only one symbol left:
from the list pick two symbols with the lowest frequency counts
form a Huffman sub-tree that has these two symbols as a child nodes
and create a parent node

Assign the sum of the children's freuency counts to the parent and insert it into the list such that
order is maintained






Delete the children from the list

Assign a code word for each leaf based on the path from the root
Apply on the Test Vector pattern
Hoffman Method Implementation
Linear decompression










The technique is based on a linear decompressor which consists of wires,XOR gates and flip-flops.
It has two types
a) Static reseeding
Compute a seed for each cube, the seed is loaded in the LFSR and it produces the test vectors, so we
store only the seed.
it has two disadvantages
- It must be as large as the test vector length.
- The circuit is idle during the vector generation
b) Dynamic reseeding
Solves the problem of static reseeding, it uses a network that expands the output to fill n output scan
chains while creating the result
Linear decompression
Broadcast scan method
 Uses the fact that many bits are don't care, it can be either independent or
dependent
 Independent case
 -------------- 1) Apply ATPG TO Both circuits.

 2) NOw we have a set of patterns to detect CUT-2 and part of CUT-1 Faults.
 3) Apply the don't care bits to detect CUT-1 Faults
 4) NOw we have a `minimized set` with appropriate fault coverage/
Dependent Broadcast scan method











To allow the compression of the test vectors and to avoid the problem of equal cells in the scan chain,
we apply Illinois scan based compression technique.
In this technique instead of applying the test output of the ATPG to the scan chain, we partition it to
few partitions, we then either apply it as (broadcast - in parallel) and take the output of all stages, or
apply it serially(the output of stage i is the input of stage i+1) and so on, based on the partitioning
mechanism this technique is divided into
1) Static reconfiguration (uses a multiplexer to get the set of scan chains)
2) Dynamic reconfiguration (The configuration change every slice which is more flexible)
Illionis scan uses two modes of operations:
- Broadcast : Broadcasts one tester channel to multiple chains
- Scan : applies them in serial
The configuration can be done using a multiplexer to choose which channels the tester channel will
broadcast to.
Dependent Broadcast scan method
Geometric method
 The geometric method uses a loseless compression technique.
 It depends on four main shapes: point - line - traingle - rectangle
 The algorithm goes like this

 1) Start with a random test vector as a start point
 2) Sort all of the other vectors depending on their correlation with the first vector.
 3) Use shape covering algorithm to choose the largest shape that cover a group of zeros or
ones.

 4) Choose the optimal result of covering shapes
 5) Encode the results
Geometric method(Cont.)
Comparison of different techniques
 While most techniques discussed have good performance on commercial use
there are few drawbacks
 1) Linear decompression has the simplest structure (only XOR Gates and
registers) for cases of multiple scan chains we need to compress/decompress
each chain independently which takes more time and not parallelizable.

 2) Broadcast scan is also simple to implement, but it has a redundancy issue
(i.e. many scan chains may have the same bit value at the same location)
 3) Geometric method is less efficient and only experimentally tested, and
require more computation than other methods
References




[1] Survey of Test Vector Compression Techniques,Nur A. Touba
[ 2]An Efficient Test Vector Compression Scheme Using Selective Huffman Coding
3] Using a Single Input to Support Multiple Scan Chains,Kuen-Jong Lee Jih-Jeen Chen,Cheng-Hua
Huang



[4] LFSR-Based Test-Data Compression with Self-Stoppable Seeds, M. Koutsoupia E. Kalligeros X.
Kavousianos D. Nikolos


[5] An Efficient Test Vector Compression Technique Based on Geometric Shapes , Saif al Zahir, Aiman
El-Maleh, and Esam Khan


[6] Reconfiguration Technique for Reducing Test Time and Test
Data Volume in Illinois Scan Architecture Based Designs, Amit R. Pandey† and Janak H. Patel

Questions
thanks

More Related Content

PPTX
Vlsi Synthesis
PDF
2019 3 testing and verification of vlsi design_sta
PPTX
ATPG flow chart
DOCX
Power Reduction Techniques
PDF
Sta by usha_mehta
PDF
Jtag presentation
PDF
Design for Test [DFT]-1 (1).pdf DESIGN DFT
Vlsi Synthesis
2019 3 testing and verification of vlsi design_sta
ATPG flow chart
Power Reduction Techniques
Sta by usha_mehta
Jtag presentation
Design for Test [DFT]-1 (1).pdf DESIGN DFT

What's hot (20)

PPT
01 Transition Fault Detection methods by Swetha
PPTX
Spyglass dft
PDF
Soc architecture and design
PDF
Design for Testability
PDF
Loc, los and loes at speed testing methodologies for automatic test pattern g...
PPTX
Design for testability and automatic test pattern generation
PPTX
01 Silicon Diagnosis survey by Swetha
PDF
Understanding cts log_messages
PDF
11 static timing_analysis_2_combinational_design
PDF
Design and Verification of the UART and SPI protocol using UVM
PPTX
Physical Design Flow Challenges at 28nm on Multi-million Gate Blocks
PPTX
Scan insertion
PPTX
PDF
Physical Verification.pdf
PDF
Pre-Si Verification for Post-Si Validation
PDF
MIPI DevCon 2021: MIPI D-PHY and MIPI CSI-2 for IoT: AI Edge Devices
PDF
Implementing Useful Clock Skew Using Skew Groups
PPTX
Low power in vlsi with upf basics part 1
PPT
PPTX
ASIC Design Flow | Physical Design | VLSI
01 Transition Fault Detection methods by Swetha
Spyglass dft
Soc architecture and design
Design for Testability
Loc, los and loes at speed testing methodologies for automatic test pattern g...
Design for testability and automatic test pattern generation
01 Silicon Diagnosis survey by Swetha
Understanding cts log_messages
11 static timing_analysis_2_combinational_design
Design and Verification of the UART and SPI protocol using UVM
Physical Design Flow Challenges at 28nm on Multi-million Gate Blocks
Scan insertion
Physical Verification.pdf
Pre-Si Verification for Post-Si Validation
MIPI DevCon 2021: MIPI D-PHY and MIPI CSI-2 for IoT: AI Edge Devices
Implementing Useful Clock Skew Using Skew Groups
Low power in vlsi with upf basics part 1
ASIC Design Flow | Physical Design | VLSI
Ad

Viewers also liked (20)

PPTX
Scaun cu rotile cu verticalizare
PPTX
Ivf treatment
PPTX
NETQ geschiedenis en toekomst
PPTX
Visual fingerprinting for malicious websites
PPTX
3. synergy and convergence
PPTX
Tools for Team Leadership
PDF
Jamie A Cowan, Timendo - Solocal Group UK Event "How To Drive Online Traffic ...
PPT
Laterna - Opus 20
PPTX
AS Media camera angles pp
PPT
Intro to audience theory
PPTX
M arga
PPTX
Tv drama 3 representation of masculinity
PPTX
Flame retardants, Germany conference:45th idc, international detergency confe...
PPTX
DOCX
Taken 9 shot sequence
PPTX
Head injury by Mahdi alshehri
PPTX
Iker capitalization
PPTX
Northern Illinois Rockford Heart Walk Slated for May of 2015
PPTX
TEORI BAB 3
PPTX
2 Chicks with Chocolate - Social Media Strategy
Scaun cu rotile cu verticalizare
Ivf treatment
NETQ geschiedenis en toekomst
Visual fingerprinting for malicious websites
3. synergy and convergence
Tools for Team Leadership
Jamie A Cowan, Timendo - Solocal Group UK Event "How To Drive Online Traffic ...
Laterna - Opus 20
AS Media camera angles pp
Intro to audience theory
M arga
Tv drama 3 representation of masculinity
Flame retardants, Germany conference:45th idc, international detergency confe...
Taken 9 shot sequence
Head injury by Mahdi alshehri
Iker capitalization
Northern Illinois Rockford Heart Walk Slated for May of 2015
TEORI BAB 3
2 Chicks with Chocolate - Social Media Strategy
Ad

Similar to Test vector compression in Digital Testing (20)

PPTX
Test vector compression
PDF
A Novel Method for Encoding Data Firmness in VLSI Circuits
PDF
Featured Pattern Run Length Coding for Test Data Compression
PPTX
Huffman data compression-decompression
PDF
40120130405015 2
PDF
COMPARATIVE ANALYSIS OF SIMULATION TECHNIQUES: SCAN COMPRESSION AND INTERNAL ...
PDF
Compression tech
PPT
4366 chapter7
PDF
Bt34433436
PDF
Heuristic approach to optimize the number of test cases for simple circuits
PDF
Heuristic approach to optimize the number of test cases for simple circuits
PDF
Heuristic approach to optimize the number of test cases for simple circuits
PDF
Reducing Power Consumption during Test Application by Test Vector Ordering
PDF
Graph Methods for Generating Test Cases with Universal and Existential Constr...
PPT
Lec5 Compression
PPTX
Reliable multimedia transmission under noisy condition
PDF
Data structures
PDF
PPTX
Design for testability for Beginners PPT for FDP.pptx
PDF
AI Lesson 06
Test vector compression
A Novel Method for Encoding Data Firmness in VLSI Circuits
Featured Pattern Run Length Coding for Test Data Compression
Huffman data compression-decompression
40120130405015 2
COMPARATIVE ANALYSIS OF SIMULATION TECHNIQUES: SCAN COMPRESSION AND INTERNAL ...
Compression tech
4366 chapter7
Bt34433436
Heuristic approach to optimize the number of test cases for simple circuits
Heuristic approach to optimize the number of test cases for simple circuits
Heuristic approach to optimize the number of test cases for simple circuits
Reducing Power Consumption during Test Application by Test Vector Ordering
Graph Methods for Generating Test Cases with Universal and Existential Constr...
Lec5 Compression
Reliable multimedia transmission under noisy condition
Data structures
Design for testability for Beginners PPT for FDP.pptx
AI Lesson 06

More from Amr Abd El Latief (11)

PPTX
master-journey.pptx
PPTX
Micro frontend
PPTX
I feel presentation [autosaved]
PPTX
Design p atterns
PPTX
AngularJs advanced Topics
PPTX
Angular js slides
PPTX
Data mining concepts and work
PPTX
Designing energy efficient lte
PPT
Stock market analysis using ga and neural network
DOCX
Chromium os architecture report
PPTX
Marketing plane of cadbry bupply kids
master-journey.pptx
Micro frontend
I feel presentation [autosaved]
Design p atterns
AngularJs advanced Topics
Angular js slides
Data mining concepts and work
Designing energy efficient lte
Stock market analysis using ga and neural network
Chromium os architecture report
Marketing plane of cadbry bupply kids

Recently uploaded (20)

PPTX
sap open course for s4hana steps from ECC to s4
PPTX
Spectroscopy.pptx food analysis technology
PDF
Electronic commerce courselecture one. Pdf
PDF
Per capita expenditure prediction using model stacking based on satellite ima...
PDF
Approach and Philosophy of On baking technology
PDF
Diabetes mellitus diagnosis method based random forest with bat algorithm
PPTX
Cloud computing and distributed systems.
PDF
Blue Purple Modern Animated Computer Science Presentation.pdf.pdf
PDF
Unlocking AI with Model Context Protocol (MCP)
PDF
Advanced methodologies resolving dimensionality complications for autism neur...
PPTX
Digital-Transformation-Roadmap-for-Companies.pptx
PDF
Encapsulation_ Review paper, used for researhc scholars
PDF
Peak of Data & AI Encore- AI for Metadata and Smarter Workflows
PPTX
Detection-First SIEM: Rule Types, Dashboards, and Threat-Informed Strategy
PDF
KodekX | Application Modernization Development
PPTX
ACSFv1EN-58255 AWS Academy Cloud Security Foundations.pptx
PDF
Network Security Unit 5.pdf for BCA BBA.
PDF
Review of recent advances in non-invasive hemoglobin estimation
PDF
Machine learning based COVID-19 study performance prediction
PPT
Teaching material agriculture food technology
sap open course for s4hana steps from ECC to s4
Spectroscopy.pptx food analysis technology
Electronic commerce courselecture one. Pdf
Per capita expenditure prediction using model stacking based on satellite ima...
Approach and Philosophy of On baking technology
Diabetes mellitus diagnosis method based random forest with bat algorithm
Cloud computing and distributed systems.
Blue Purple Modern Animated Computer Science Presentation.pdf.pdf
Unlocking AI with Model Context Protocol (MCP)
Advanced methodologies resolving dimensionality complications for autism neur...
Digital-Transformation-Roadmap-for-Companies.pptx
Encapsulation_ Review paper, used for researhc scholars
Peak of Data & AI Encore- AI for Metadata and Smarter Workflows
Detection-First SIEM: Rule Types, Dashboards, and Threat-Informed Strategy
KodekX | Application Modernization Development
ACSFv1EN-58255 AWS Academy Cloud Security Foundations.pptx
Network Security Unit 5.pdf for BCA BBA.
Review of recent advances in non-invasive hemoglobin estimation
Machine learning based COVID-19 study performance prediction
Teaching material agriculture food technology

Test vector compression in Digital Testing

  • 1. Presented to: Prof.Dr. : Ihab Talkhan by Eng. Amr Abd El latief Abd El Al Eng. Mohammad Ahmed Hamed
  • 2. Agenda Introduction Benefits of data Compression Why does compression works (on testing vector) Test vector compression schemes Categories Data compression techniques Hufman Coding method
  • 4. Introduction • Test Levels: System Testing, Chip Testing  Board Testing. • Increasing integration density results in: • larger designs • more scan cells • more faults.
  • 5. Introduction (Cont.) • external testing: involves storing all test vectors and test response on an external tester. • Tester Challenges: • • • • limited speed memory, I/O channels Bandwidth.
  • 6. Introduction (Cont.)  Overcoming approaches : stand-alone BIST:  But it has a low fault detection probability due to RPR Faults  hybrid BIST:    use a combination of BIST and test vectors test data compression. (Described Here)
  • 7. DataCompression Benefits • First, it reduces the amount of data stored on the tester, •Second, it can reduces the test time for a given test data bandwidth
  • 8. TestVectors Characteristics   Test vectors are highly compressible because typically only 1% to 5% of their bits are specified (care)bits. The rest are don’t-cares. because faults are structurally related in the circuit test cubes also tend to be highly correlated
  • 9. The compression technique categories 1 . Run-length based codes. 2 . Dictionary codes. 3 . Statistical codes (Huffman coding) 4 . Linear decompression. 5 . Broadcast scan methods 6 . Geometric methods.
  • 10. Run-length-based codes • simple form of data compression • runs of data means line of data • Good method for data that contains many such runs
  • 11. Run-length-based codes  Note: Careful ordering of the test cubes maximizes the number of 0s in the difference vectors, thereby improving the effectiveness of run-length coding. 
  • 12. Dictionary codes. 1 -partitions the original data into n-bit symbols. 2 - Uses a dictionary to store each unique symbol. 3 - encoding each n-bits using a b-bit code word corresponds to the symbol’s index in the dictionary (b<n)
  • 15. Huffman Algorithm  initialization : put all symbols on a list sorted according to their frequency count     repeat until the list has only one symbol left: from the list pick two symbols with the lowest frequency counts form a Huffman sub-tree that has these two symbols as a child nodes and create a parent node Assign the sum of the children's freuency counts to the parent and insert it into the list such that order is maintained    Delete the children from the list Assign a code word for each leaf based on the path from the root
  • 16. Apply on the Test Vector pattern
  • 18. Linear decompression          The technique is based on a linear decompressor which consists of wires,XOR gates and flip-flops. It has two types a) Static reseeding Compute a seed for each cube, the seed is loaded in the LFSR and it produces the test vectors, so we store only the seed. it has two disadvantages - It must be as large as the test vector length. - The circuit is idle during the vector generation b) Dynamic reseeding Solves the problem of static reseeding, it uses a network that expands the output to fill n output scan chains while creating the result
  • 20. Broadcast scan method  Uses the fact that many bits are don't care, it can be either independent or dependent  Independent case  -------------- 1) Apply ATPG TO Both circuits.  2) NOw we have a set of patterns to detect CUT-2 and part of CUT-1 Faults.  3) Apply the don't care bits to detect CUT-1 Faults  4) NOw we have a `minimized set` with appropriate fault coverage/
  • 21. Dependent Broadcast scan method         To allow the compression of the test vectors and to avoid the problem of equal cells in the scan chain, we apply Illinois scan based compression technique. In this technique instead of applying the test output of the ATPG to the scan chain, we partition it to few partitions, we then either apply it as (broadcast - in parallel) and take the output of all stages, or apply it serially(the output of stage i is the input of stage i+1) and so on, based on the partitioning mechanism this technique is divided into 1) Static reconfiguration (uses a multiplexer to get the set of scan chains) 2) Dynamic reconfiguration (The configuration change every slice which is more flexible) Illionis scan uses two modes of operations: - Broadcast : Broadcasts one tester channel to multiple chains - Scan : applies them in serial The configuration can be done using a multiplexer to choose which channels the tester channel will broadcast to.
  • 23. Geometric method  The geometric method uses a loseless compression technique.  It depends on four main shapes: point - line - traingle - rectangle  The algorithm goes like this  1) Start with a random test vector as a start point  2) Sort all of the other vectors depending on their correlation with the first vector.  3) Use shape covering algorithm to choose the largest shape that cover a group of zeros or ones.  4) Choose the optimal result of covering shapes  5) Encode the results
  • 25. Comparison of different techniques  While most techniques discussed have good performance on commercial use there are few drawbacks  1) Linear decompression has the simplest structure (only XOR Gates and registers) for cases of multiple scan chains we need to compress/decompress each chain independently which takes more time and not parallelizable.  2) Broadcast scan is also simple to implement, but it has a redundancy issue (i.e. many scan chains may have the same bit value at the same location)  3) Geometric method is less efficient and only experimentally tested, and require more computation than other methods
  • 26. References    [1] Survey of Test Vector Compression Techniques,Nur A. Touba [ 2]An Efficient Test Vector Compression Scheme Using Selective Huffman Coding 3] Using a Single Input to Support Multiple Scan Chains,Kuen-Jong Lee Jih-Jeen Chen,Cheng-Hua Huang  [4] LFSR-Based Test-Data Compression with Self-Stoppable Seeds, M. Koutsoupia E. Kalligeros X. Kavousianos D. Nikolos  [5] An Efficient Test Vector Compression Technique Based on Geometric Shapes , Saif al Zahir, Aiman El-Maleh, and Esam Khan  [6] Reconfiguration Technique for Reducing Test Time and Test Data Volume in Illinois Scan Architecture Based Designs, Amit R. Pandey† and Janak H. Patel 

Editor's Notes

  • #6: compressed form in the tester memory and transferred to the chip wherethey are decompressed and applied to the coresstand-alone BISTBut it has a low fault detection probability due to RPR Faultsrandom-pattern-resistanthybrid BISTSuitable for manufacuring test only (more cost effective)Hybrid BIST involves storing some data on the tester to help detect RPR faultsThe simplestapproach is to perform ATPG for RPR faults not detectedby pseudorandom BIST to obtain a set of deterministic testpatterns that “top up” the fault coverage to the desiredlevel, and then store those patterns directly on the tester.test data compression.
  • #10: The amount of compression depends on n how skewed the frequency of occurrence is for thedifferent codewordss. If all of the codewords occur with equal frequency,then no compression can be achievedtest vectors in a test set tend to have a lot of correlationsThe don’t care bits (X’s) provide flexibility to allow a blockto be encoded with more than one possible codeword. The shortest possibleskewed
  • #12: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 22, NO. 6, JUNE 2003