THE CMOS VLSI DESIGN
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VLSI (Very Large Scale Integration) is a technology that integrates thousands of transistors into a single silicon chip, revolutionizing electronic device design over previous methods. CMOS (Complementary Metal Oxide Semiconductor) is the primary fabrication method for VLSI, which includes various processes, such as n-well, p-well, and twin-tub, each addressing specific challenges like body effect and latch-up problems. Bicmos technology combines CMOS with bipolar junction transistors to overcome CMOS limitations in output load handling, enhancing overall circuit performance.
THE CMOS VLSI DESIGN
- 1. VLSI DESIGN A COMPLETE VISION OF VLSI DESIGN STYLES Surya Teja Swamy, Vijay Vemuri II/IV - B. Tech , ECE, KL University, Guntur.
- 2. WHAT IS VLSI ? • VLSI refers • V : Very • L : Large • S : Scale • I : Integrated Circuits
- 3. CONT… • VLSI is a process of creating an integrated circuit (IC) by combining thousands of transistors into a single Silicon Chip. • Before VLSI there are other design process * SSI - 10-100 * MSI - 100-1000 * LSI - 1000-20000 * ULSI - 1000000-100lakhs * GSI - >100lakhs
- 4. MOORE’S LAW • Regarding this IC technology “ ” introduced a law • For every 18 months transistors are doubled.
- 5. MOORE’S LAW • Regarding this IC technology “GORDON MOORE” introduced a law • For every 18 months transistors are doubled.
- 7. VLSI DESIGN • In present days all the Electronic Devices are made of using these VLSI CHIPS. • These VLSI are designed by CMOS. • In Earlier they used several types of active devices.
- 8. COMPARISON OF AVAILABLE TECHNOLOGY
- 9. VLSI DESIGN USING CMOS • CMOS ---- C M O S
- 10. VLSI DESIGN USING CMOS • CMOS ---- Complementary Metal Oxide Semiconductor
- 11. VLSI DESIGN USING CMOS • CMOS ---- Complementary Metal Oxide Semiconductor • Combination of PMOS and NMOS • The output of the CMOS is Complement. • For getting true value we need to take a “Invertor” at the output.
- 12. TYPES OF CMOS FABRICATIONS • N-WELL PROCESS • P-WELL PROCESS • TWIN TUB PROCESS
- 14. CONT.. CMOS P-well inverter showing VDD and VSS Substrate connections
- 15. Formation of n-well regions Define nMOS and pMOS active areas Field and Gate Oxidations (thinox) Form and Pattern Polysilicon p+ diffusion n+ diffusion Contact cuts Deposit and pattern metallization Over glass with cuts for bonding pads
- 16. DRAWBACKS OF N-WELL &P-WELL • In both N-WELL and P-WELL we may got come across two problems. Body Effect & Latch Up problem • To over come this drawback, we are going for “Twin Tub”.
- 17. TWIN-TUB PROCESS * It is made with both n-well and p-well region. * Epitaxial layer: High purity silicon grown with accurately determined dopant concentrations
- 18. CONT… • At present the CMOS technologists are using “TWIN TUB” process. • As It is giving effective result. • Also it is more efficient.
- 19. DRAWBACKS OF CMOS • CMOS is quite good for all the ELECTRONIC Gadgets. • As they required 0-5V voltage. • But coming to the ANALOG Equipment's … CMOS is poor to use. • For that problem we are going to use BICMOS technology.
- 20. COMPARISON BETWEEN CMOS AND BIPOLAR TECHNOLOGIES CMOS • Low static power dissipation • High input impedance • High noise margin • High packing density • High delay sensitivity to load • Low output drive current • Low gm • Bidirectional capability • A near ideal switching device • Scalable threshold voltage BIPOLAR TECHNOLOGIES • High power dissipation • Low input impedance • Low voltage swing logic • Low packing density • Low delay sensitivity to load • High output drive current • High gm • Essentially unidirectional
- 21. BICMOS… • BICMOS BJT + CMOS
- 22. BICMOS… • BICMOS BJT + CMOS • As the drawback of CMOS is output load. • At the output of the circuits we use BJT. • Entire circuit is designed with CMOS.
- 23. CROSS SECTIONAL VIEW Bi-CMOS(n-p-n Transistor (orbit 2 um CMOS)
- 24. n-well BiCMOS fabrication process steps BI C M O S F A B R I C A T I O N P R O C E S S
Editor's Notes
- #4: Examples: SSI = logic gates & FF’s MSI = counters,mux,adders LSI = 8-bit micro processors, ROM, RAM VLSI =16 bit & 32 bit micro processors ULSI = special processors, virtual reality machines, GSI = smart sensors
- #8: Active devices : vacuum tubes;diodes;tx(BJT,JFET,MOSFET,CMOS,BICMOS)
- #17: BODY EFFECT : increase in Substrate vlge the depletion layer increases twrds substrate. And 4 ltl vgs curr vl b mre at drain. LatchUp : formation of ions b/w well n sub.
- #20: ANALOG Equipment's loud speakers…