Instruction cycle presentation
- 4. CONTENTS
- 5. An instruction cycle is also known as fetch- decode-execute cycle It is the process by which a computer retrieves the program instruction from the memory, determines what actions the instruction dictates and carries out those actions
- 6. Fetch an instruction from memory Decode the instruction Execute the instruction
- 7. In this step the sequence counter is initialized to zero The address of first instruction from PC is loaded into address register during the first clock cycle
- 8. The instruction is decoded by the instruction decoder of a processor DIRECT ADDRESSING nothing is going done in clock pulse INDIRECT ADDRESSING The effective address in being read from the memory
- 9. In this phase the processor execute the instruction Signals are passed to the relevant function units of the CPU to perform the action required
- 10. Program counter (PC) Memory address register (MAR) Memory data register (MDR) Instruction register (IR) Control unit (CU) Arithmetic logic unit (ALU) Floating point unit(FPU)
- 11. An incrementing counter that keeps track of the memory address of the instruction that is to be executed next or in other words, holds the address of the instruction to be executed next.
- 12. Holds the address of active memory location on which CPU currently in execution state
- 13. A two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory. (This is also known as the memory buffer register (MBR)
- 14. It holds the instruction currently being executed or decoded
- 15. The CU is a component of CPU that direct the operation of processor .it tells the computer’s memory , ALU , and input output devices how to respond to the program’s instruction
- 16. Performs mathematical and logical operations. Performs mathematical and logical operations.
- 17. Performs floating-point operations