Method for Converter Synchronization with RF Injection

Joshua P. Bruckmeyer & Ivica Kostanic
Signal Processing: An International Journal (SPIJ), Volume (9) : Issue (4) : 2015 46
Method for Converter Synchronization with RF Injection
Joshua P. Bruckmeyer jbruckme@harris.com
Space and Intelligence Systems
Harris Corporation
Melbourne, FL- 32902, USA
Ivica Kostanic kostanic@fit.edu
Department of ECE
Florida Institute of Technology
Melbourne, FL- 32901, USA
Abstract
This paper presents an injection method for synchronizing analog to digital converters (ADC).
This approach can eliminate the need for precision routed discrete synchronization signals of
current technologies, such as JESD204. By eliminating the setup and hold time requirements at
the conversion (or near conversion) clock rate, higher sample rate systems can be synchronized.
Measured data from an existing multiple ADC conversion system was used to evaluate the
method. Coherent beams were simulated to measure the effectiveness of the method. The
results show near theoretical coherent processing gain.
Keywords: Time Dissemination, Sampled Data Circuits, Calibration, Array Signal Processing,
and Phased Arrays.
1. INTRODUCTION
Radio Frequency (RF) sampling ADCs are replacing entire Intermediate Frequency (IF) sampling
and Zero Intermediate Frequency (ZIF) sampling subsystems, lowering the overall system power
[1]. As this technology matures, it is pushing converters to antenna enabling phased array
antennas with elemental digital beam formers. The key is to ensure every converter adds
coherently; this requires array level synchronization [2].
Modern converters support synchronization with a chip reset and/or auto sync function. For
example the emerging JESD204B standard provides two mechanisms to support synchronization
across several converters. Both methods require a synchronization signal to arrive at each
converter in the system at the same time [3]. The key is to ensure that the setup and hold time of
the synchronization signal relative to the clock is met across the entire span of data converters
[3][4]. This is impractical at best at high sample rates (above a Gigahertz) and in distributed
arrays.
The authors of [2] proposed a closed-loop deterministic phase synchronization algorithm as a
solution to distributed synchronization. Their method estimates the phase offset from each
transmitter and uses a feedback channel to command the transmitter to adjust its output phase in
a multiple input single output (MISO) system [2]. By expanding this method to a multiple input
multiple output (MIMO) or single input multiple output (SIMO) system, the receiver can perform
the phase adjustment, eliminating the receiver to transmitter feedback network. Furthermore, if an
internal injection calibration is used, the multiple output system can be synchronized without an
external corporative transmitter.
In [5] the authors proposed adaptively equalizing the channel mismatches in time-interleaved
ADCs (TIADCs) by injecting a known training signal into the ADC input. Since the analog input
and clock signal split after ADC input, they become part of the calibration loop itself. The authors

showed that this method could mitigate interleaving spurs while avoiding complicated error
estimation or measurement. To expand this method to synchronizing several ADCs inputs, a
distribution network is needed for the training signal. Since this distribution network will not be
used for normal operation, its characteristics need to be de-embedded.
Research on injection calibration for narrow band bean formers is also well established. The
authors of [6] studied an injection method, where a transmitted output is switched into all of the
receive channels. The goal stipulated is to correct amplitude and phase errors between the
channels. By expanding this method to estimate and correct for temporal delays, the injection
calibration method could correct for amplitude, phase, and temporal errors.
This paper expands upon the existing body of research by providing a converter synchronization
method that is not subject to the setup and hold time limitations of discrete signaling. An RF
injection method is proposed to correct time and phase delays between the converters. This
proposed method addresses the physical implications of clock and data routing and is easily
scaled to support several converters. A method to de-embed the contributions from the calibration
network itself will also be presented.
2. METHODOLOGY
To establish a representative context basis, a system model is first described. The system serves
as the basis for the mathematical assumptions and boundary conditions. The synchronization
method and sub functions are then described.
2.1 System Model
The injection calibration system spans RF to digital signal processing (DSP) fabric as shown in
figure 1. The DSP fabric contains a baseband calibration signal generator to generate a
pseudorandom signal, d . This calibration signal is modulated onto an RF carrier and is
represented by 'd . The signal 'd is injected into the RF analog input x , forming 'x . Where 'x is
a P x 1 vector, where P is the number of phase centers (converter channels). The DSP fabric
then uses training information, d , to synchronize the P phase centers in time.
FIGURE 1: System Block Diagram.
2.2 Assumptions and Boundary Conditions
We start with the assumption that the input signal is observed by each of the phase centers. We
also assume the presence of an additive white Gaussian noise channel. Furthermore we assume
that the transmitted signal is a data sequence that is linearly modulated onto a carrier. Therefore,
we can represent the input in its equivalent complex baseband form as [7]:
( ) ( ) ( )t t t= +x s q (1)
Where ( )ts is a modulated signal, ( )tq represents zero mean additive noise which is independent
of the data [7], and all vectors are P x 1 in dimension. Assuming the training injection operation is
an unbiased linear operation, x' can be represented in its baseband equivalent form as [8]:
[ ]'( ) ( ) ( )t t t= +x cf s q (2)

The vector ( )fcf is the calibration factor that compensates the circuits outside the calibration
loop and the inherent skew of the calibration network. The symbol is the Hadamard product
matrix operator commonly referred to as the element multiplication. All vectors are P x 1 in
dimension. The vector ( )fcf can be directly measured with standard network analyzer equipment
[9], or measured as a residual calibration vector on the system output after the calibration process
has been completed [10][11].
The channel u output contains the coherently down-converted and digitized signal for all P
phase centers. Assuming a well sampled signal and that ADC quantization noise has a negligible
contribution, the channel output may be described as:
[ ]( ) '( ) '( )t t d t= +u x h (3)
Assuming the following two factors: (1) a well-designed calibration signal, '( )d t , that does not
correlate to input signal, ( )tx , and (2) that the ADC quantization noise has a negligible
contribution , the input to the DSP can be expressed as:
( ) ( )n d n≅ ⋅u h | [ ]'( ) '( ) 0E t d t⋅ ≅x (4)
This equation bounds the problem and variables for the synchronization process: where ( )nu is
estimated by direct measurement, ( )d n is a priori known to the system and h is the variable
being solved for.
2.3 Synchronization Method
A representative synchronization circuit is shown in figure 2. The method is based on the well-
known cross correlation technique to establish the course sample alignment between the
channels [12].
FIGURE 2: Synchronization Method.
For this synchronization method, the key technique is how to estimate the sample and sub-
sample (phase) differences between the channels. To get the desired output, the following steps
are proposed:
Step 1: The calibration signal generator authors a known baseband modulated signal. The
calibration signal, d , is modulated outside the DSP fabric on an RF carrier and injected into the
circuit. This injection can be as simple as an RF switch or, as shown, an RF coupler.

Step 2: The DSP fabric performs a cross correlation between the received signal, u , and the
known calibration signal, d , for all phase centers. The ADC samples are also buffered to account
for the processing delay of the cross-correlation and phase estimator steps.
Step 3: The sample and sub-sample (phase) difference between the phase centers is estimated.
The integer sample delay is the sample index that contains the peak cross-correlation energy
[13]:
( ) [ ( ) ( )]E d t tτ τ= ⋅ −R u (5)
arg max[ ( )]τ τ∆ =t R (6)
The residual phase can be estimated by the complex angle of the peak cross-correlation energy
[14]:
arg [ ( )]τ τθ = ∠ R (7)
Step 4: Samples are read out of the buffer starting at the estimated ∆t for each phase center.
The depth of the buffer defines the amount of temporal channel-to-channel skew this method can
compensate for.
Step 5: The conjugant of the phase estimated in Step 3 is applied to each phase center. This
completes the temporal alignment of all of the phase centers to the calibration signal, d .
2.4 De-embedding Residual Offsets
To remove the temporal effects of the portion of the circuit not spanned by the calibration loop, an
external calibration signal is required. The following steps can be used to de-embed these offsets:
Step 1: In any practical system there will be amplitude and phase differences between the
external illumination signal and the phase centers. A calibrated external test apparatus, such as a
network analyzer, should be used to measure this. Let TS be the P x 1 complex vector that has
the channel-to-channel illumination differences.
Step 2: Use the synchronization method described in the synchronization method section to
temporally align the internal calibration network.
Step 3: Estimate the residual channel-to-channel steering vector of the illumination waveform.
There are many methods and waveforms available to do this. One common method is singular
value decomposition using a continuous-wave (CW) signal. A convenience matrix, Rxx , is
formed by:
(:, ) (:, )'
n
n n= ⋅∑Rxx u u (8)
Where the symbol, : , represents all P channels, and the symbol, '
, is the complex transpose.
Eigenvalue decomposition is used to solve for the eigenvectors. The eigenvalue with the highest
energy is assumed to correspond to the illumination waveform [15].
[ , ] ( )eig=V D Rxx (9)
arg max ( )nindex diag= D (10)

Finally, the steering vector representing the channel-to-channel estimate, SV , is formed by
normalizing the Eigenvector.
(:, )
(:, )
index
index
=
V
SV
V
(11)
Step 4: Remove the test setup, TS , bias:
*
=
SV
CalVector
TS
(12)
The Calibration Vector, CalVector , is a P x 1 complex vector containing the residual calibration
vector, and the symbol, *
, is the complex conjugant. Applying this vector can align all phase
centers at an approximate zero phase channel-to-channel offset.
2.5 Figure of Merit
To illustrate the performance of the proposed method, coherent beams are formed. If all of the
ADC channels are ideally time aligned, they should coherently add and result in a 10*log10(P)
power signal-to-noise gain [16].
To establish a performance improvement for both the pre- and post- synchronization cases, the
non-coherent video power is defined as:
*
VideoPower = ∑∑u u⊙ (13)
The steering vector used for the pre- synchronization beam is:
( ,1)ones P
P
=PreSV (14)
The pre-synchronization video power is estimated by:
.'= ⋅PreBeam PreSV u (15)
PrePower = ⋅∑ *
PreBeam PreBeam (16)
Where PreBeam is a 1 x n vector, n is the number of samples, and the symbol, .' , is a non-
conjugant transpose. Similarly the post-synchronization video power is estimated by:
.'= ⋅PostBeam CalVector u (17)
PostPower = ⋅∑ *
PostBeam PostBeam (18)
3. RESULTS AND DISCUSSION
To illustrate the system performance benefit from this method, simulations were performed using
measured hardware characteristics. The measured data are from an existing multiple ADC
elemental digital beam former array with elemental sample storage, also known as pre-detection
(PRE-D) capability. Specifically, two dual channel Texas Instruments ADC10D1000 devices
operating at 480 MSPS were used. The signal was injected at 225 MHz into all four channels and
the chip-to-chip synchronization methods were disabled.
The power of the pre-synchronized channel response with a Pulse Position Modulation (PPM)

illumination waveform is shown figure 3. Notably, there is a clear temporal delay between the
ADC channels. The coherent beam also shows clear destructive interference.
2.02 2.04 2.06 2.08 2.1 2.12 2.14 2.16 2.18 2.2
x 10
4
-10
0
10
20
30
40
50
60
70
80
Raw Uncorrected ADC Output
Sample
Power
ADC Channel 1
ADC Channel 2
ADC Channel 3
ADC Channel 4
Beam
FIGURE 3: Pre-synchronization Signal.
In contrast the power of the post-synchronized channel response with the same PPM illumination
waveform is shown in figure 4. All of the ADC channels are temporally aligned, and there is clear
coherent beam gain.
1.96 1.98 2 2.02 2.04 2.06 2.08 2.1 2.12
x 10
4
-10
0
10
20
30
40
50
60
70
80
Time Alligned ADC Output
Sample
Power
ADC Channel 1
ADC Channel 2
ADC Channel 3
ADC Channel 4
Beam
FIGURE 4: Post-synchronization Signal.
The numeric power estimates are shown in Table 1. As would be expected, the pre-
synchronization beam shows a numeric loss in gain compared to the non-coherent video beam.
In contrast, the post-synchronization method shows excellent performance, experiencing only
0.06 dB of loss compared to the optimal power combining of 6 dB.
Parameter Raw Video Pre-Sync. Beam Post-Sync. Beam
Power (MW) 1.03 1.27 4.06
Gain from Raw (dB) - 0.91 5.94
TABLE 1: Simulated Synchronization Gain.
The simulated performance is similar to the results from the Automatic Calibration method using
Transmitting signals (ACT). The ACT method used an injected source to calibrate channel-to-

channel amplitude and phase errors with a single tap correction term. ACT resulted in 0.05 dB
residual calibration error when calibrating a three phase center adaptive array [6]. The high
degree of correlation in the results indicates the injection based synchronization method was
successful in compensating for temporal delays without impacting system performance.
4. CONCLUSION AND FUTURE WORK
The simulation results show that injection based synchronization can be used to synchronize
several data converts. The signal processing required is straight forward, and can readily be
implemented in modern software defined radio fabric. Implementing this method can eliminate the
need for discrete synchronization signals and lower the complexity of implementing distributed
ADC systems.
Future work could focus on distribution of the injection signal over large distances to support
distributed aperture systems. This could include the use of a distributed precision timing base,
such as GPS, to synchronize the injection signal.
5. REFERENCES
[1] Texas Instruments Incorporated. “RF-Sampling and GSPS ADCs, Breakthrough ADCs
Revolutionize Radio Architectures.” 2012, [On-line]. Available: www.ti.com/litv/pdf/snwt001
[Feb. 23, 2015].
[2] R. Hu et al. "A closed-loop deterministic phase synchronization algorithm for distributed
beamforming." Wireless Communications and Networking Conference (WCNC), 2014 IEEE,
pp.452,456, 6-9 April 2014.
[3] H. Saheb, S. Haider. "Scalable high speed serial interface for data converters: Using the
JESD204B industry standard." Design & Test Symposium (IDT), 2014 9th International, vol.,
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[4] Texas Instruments Incorporated. “AN-2132 Synchronizing Multiple GSPS ADCs in a System:
The AutoSync Feature.” 2013, [On-line]. Available: www.ti.com/lit/an/snaa073f/snaa073f.pdf
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