Some advanced instructions of the 8085 microprocessors
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This document provides instructions for advanced operations in the 8085 microprocessor, including instructions for 16-bit data transfers using the HL register pair, instructions related to 16-bit registers, and advanced arithmetic instructions. It describes instructions like LHLD, SHLD, XCHG for 16-bit transfers, SPHL and XTHL for the stack pointer, PCHL for the program counter, and arithmetic instructions like ACI, ADC, SBB, SBI, and DAD for 16-bit addition and subtraction. An example program is provided to add two 16-bit numbers using DAD.
Some advanced instructions of the 8085 microprocessors
- 1. FOR B.TECH (ECE) 3RD YEAR STUDENTS (HELPFUL IN UPTU/GBTU EXAM) (MICROPROCESSOR) BY ER. ANUPAM KUMAR (anupamkumarmtec@gmail.com) ELECTRONICS & COMMUNICATION ENGINEERING ASHOKA INSTITUTE OF TECHNOLOGY & MANAGEMENT, VARANASI, UTTAR PRADESH, INDIA SOME ADVANCED INSTRUCTIONS OF THE 8085 MICROPROCESSORS ADVANCE INSTRUCTIONS FOR 16-BIT DATA/ADDRESS TRANSFER 1.1 LHLD16-bit address ; load HL register pair For example- Assume HL contains 3F90H i.e. H=3FH and L=90H. 2030H and 2031H memory locations contain are AFH & 24H respectively. No flags are modified. 1.2 SHLD16-bit address ; Store HL register pair This instructions works just reverse to the LHLD. For example- Assume HL contains 3F90H i.e. H=3FH & L=90H.The memory location 2030H contains AFH & 24His contains of 2031H. No flags are modified. 1.3 XCHG- Exchange the contents of HL register pair is 3F90H and contains of DE is 929FH. Instruction Cycle-Op-code fetch machine cycle only. No flags are modified.
- 2. 2.2 ADVANCED INSTRUCTIONS RELATED TO THE 8085 16BIT REGISTERS 2.1 SPHL none ;the contents of HL register pair copies into stack pointer(SP):SP HL The contents is copied in same manner into stack pointer(sp) as in HL register pair i.e. the contents of H AND L registers copied into higher byte & lower byte of stack pointer(SP) respectively. No flags are modified. 2.2 XTHL none; this instructions exchange the top (pointed by SP) contents of stack memory with the contents of HL register pair. The contents of stack memory location pointed by stack pointer, exchange with the contents of L register & the contents of next memory location with the contents of H register. However, after execution of this instruction the contents or position of Stack Pointer (SP) remain same as before. For example-Assume the contents of SP is 2FFEH, HL=203FH i.e. H=20H & L=3FH and the contents of memory locations 2FFEH hold 72H and 2FFFH contains AFH. SP 2FFE 2FFF 3000 72 AF XTHL; after execution of this instruction the contents of HL is AF72H (H=AFH and L=72H), the contents of stack pointer SP is remains as before i.e. SP=2FFEH and the contents of memory location 2FFEH is 3FH and 2FFFH contains 20H. Instruction cycle: Op-code fetch, two consecutive memory read, and two consecutive memory write machine cycles. No flags are modified. 2.3 PCHL none; data of HL register pair transfer to the Program Counter (PC): PC HL
- 3. The contents is copied in same manner into Program Counter (PC) as in HL register pair i.e. H into higher-order byte and L into low-order byte of Program Counter (PC). Instruction Cycle: Op-code fetch (takes 6-T States) machine cycle only. No flags are modified. For Example: W.A.A.P. to transfer program control/execution without using JMP or CALL instructions. Assume program execution starts from 2000H program memory location and we want to execute program/instructions from 3000H. ORG 2000H 2000H LXI H, 3000H ; HL=3000H 2003 PCHL ; after execution of this one-byte instruction PC hold 3000H and execution transfer to location 3000H 2004H MVI A, 1FH ; not executed ……. 3000H MVI A, 1FH ; Program execution starts from here i.e. A=1FH 3002H HLT 10.3 ADVANCE INSTRUCTION FOR ARITHMETIC OPERATIONS ACI- ADD IMMEDIATE TO A WITH CARRY ADC- ADD REGISTER/MEMORY TO A WITH CARRY SBB- SUBTRACT REGISTER/MEMORY WITH BORROW FROM A SBI- SUBTRACT IMMEDIATE WITH BORROW FROM A Another advanced instructions in this group DAD (add register pair to HL register pair) which is related to 16-bit register pair. DAD Reg. pair/SP Pointer. ; Double Addition (in sense of 16-bit) of HL register pair or Stack The default operand of this instruction is HL register pair i.e. to the register pair (BC, DE, HL or SP) is added to the contents of the HL register pair and the result/sum is saved in the HL register pair. Only carry flag is affected by this instruction i.e. if the sum is larger than 16-bits the carry flag is set. The contents of the source register pair are not altered.
- 4. Example: DAD H ; add the contents of reg. pair itself or multiply by 2. Instruction cycle: Op-code fetches Bus Idle and Bus Idle machine cycles. Flags: no flags are modified except Carry. PROGRAM: Add two 16-bit numbers. LHLD 4000H ; Get first 16-bit number XCHG ; Save first 16-bit number in DE LHLD 4002H ; Get second 16-bit number in HL DAD D ; Add DE and HL SHLD 4004H locations 4004H and 4005H HLT ; Store 16-bit result in memory ; Terminate program execution