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International Journal of Power Electronics and Drive System (IJPEDS)
Vol. 8, No. 2, June 2017, pp. 835~843
ISSN: 2088-8694, DOI: 10.11591/ijpeds.v8i2.pp835-843  835
Journal homepage: http://iaesjournal.com/online/index.php/IJPEDS
Performance Analysis of Modified SVPWM Strategies for
Three Phase Cascaded Multi-level Inverter fed Induction Motor
Drive
Ravikumar Bhukya1
, P. Satish kumar2
Department of Electrical Engineering, University College of Engineering Osmania University, India
Article Info ABSTRACT
Article history:
Received Jan 2, 2017
Revised Mar 2, 2017
Accepted Mar 16, 2017
This paper presents new modified space vector pulse width modulation
techniques (Phase disposition-Space vector pulse width modulation,
Alternative Phase Opposition disposition- Space vector pulse width
modulation and Phase Opposition disposition-Space vector pulse width
modulation) are analyzed for three-phase cascaded multi-level inverter fed
induction motor from the point of view of the Phase voltages, line voltage,
stator current,speed,torque and Total harmonic distortion.in the proposed
modified technique the reference signals are generated by adding offset
voltage to the reference phase voltages.This modified SVPWM technique
does not involve region indentification,sector identification for switching
vector determination as are required in the conventional multi level SVPWM
technique,it is also reduces the computation time compared to the
conventional space vector PWM technique.The necessary calculations for
generation of new modified SVPWM for the modulation strategies have
presented in detail. It is observed that the modified SVPWM modulation
ensures excellent, close to optimized pulse distribution results and THD is
compared to for five-level, seven-level, nine-level and eleven-level Cascaded
H-Bride Multi-level Inverter fed to Induction motor. Theoretical
investigations were confirmed by the digital simulations using
MATLAB/SIMULINK software.
Keyword:
APODSVPWM
Cascaded inverter
Induction motor
Modified SVPWM
Offeset voltage
PDSVPWM
PODSVPWM
THD
Copyright © 2017 Institute of Advanced Engineering and Science.
All rights reserved.
Corresponding Author:
Ravikumar Bhukya,
Department of Electrical Engineering,
University College of Engineering Osmania University,
Hyderabad, Telangana, India.
Email: Rkpurnanaik2014@gmail.com, satish_8020@yahoo.co.in
1. INTRODUCTION
In the late 1990s, multilevel inverters are the most attractive solution for high power and medium
voltage drive when high power IGBTs is commercially available in the market. Multilevel inverters are
implemented to overcome the disadvantages of traditional two-level inverter [1]. More on the various
multilevel topologies and their applications can be found in [2]. Since the concept of the multilevel PWM
inverter was introduced [3]. Various modulation strategies have been developed and studied in great
detail [4]-[6].
Several multicarrier techniques have developed to reduce the distortion in multilevel inverter, based
on the classical SPWM with triangular carriers, some methods use carrier disposition and others use phase
shifting of multiple carrier signals [7]-[9]. Multilevel inverter structures have been developed to overcome
shortcomings in solid-state switching device ratings so they can be applied to higher voltage systems.
The multilevel voltage source inverters [10].
 ISSN: 2088-8694
IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843
836
In this paper the Modified SVPWM (Phase disposition-Space vector pulse width modulation,
Alternative Phase Opposition disposition- Space vector pulse width modulation and Phase Opposition
disposition-Space vector pulse width modulation) strategy of five-level, seven-level, nine-level and eleven-
level inverters are compared for THD. The paper mainly deals with the computation and the comparison of
the motor harmonic losses of different PWM solutions and with the selection of the solutions providing the
best results. Finally, the drive harmonic losses will be compared for each technique.
2. THREE-PHASE N LEVEL CASCADED MULTI-LEVEL INVERTER
The three phase N-level cascaded multilevel inverter (CMI) or Series H-bridge Multi-Level Inverter
topology shown in Figure 1. Each cell contains four active switching device and a minimum of one dc
capacitor to form a single-phase H-bridge inverter.The different cells are connected as depicted in Figure 1
to construct a three-phase configuration. With this configuration, each cell in a leg will provide three-level
output phase voltages (VaN, VbN and VcN) and five level line voltages (Vab, Vbc and Vca). The number of
incremental voltage step is increased by connecting additional cell in series, where the number of phase
voltage is formulated as (nth
-cell*2)+1, and the number of levels in line voltage are 2M-1, where M is the
number of level in phase voltage [11].
Figure 1. N-level cascaded inverter
3. PROPOSED MODIFIED SVPWM TECHNIQUE
In the SPWM scheme for two-level inverters, each reference phase voltage is compared with the
triangular carrier and the individual pole voltages are generated, independent of each other [12]. To obtain
the maximum possible peak amplitude of the fundamental phase voltage, in linear modulation, a common
mode voltage, Toffset, is added to the reference phase voltages. where the magnitude of Toffset is given by
Toffset= (1)
In Equation, Tmax is the maximum magnitude of the three sampled reference phase voltages, while
Tmin is the minimum magnitude of the three sampled reference phase voltages, in a sampling interval.
The addition of the common mode voltage, Toffset, results in the active inverter switching vectors being
centered in a sampling interval, making the SPWM technique equivalent to the modified reference PWM
technique. Above Equation is based on the fact that, in a sampling interval, the reference phase which has
lowest magnitude (termed the min-phase) crosses the triangular carrier first, and causes the first transition in
the inverter switching state. While the reference phase, which has the maximum magnitude (termed the max-
phase), crosses the carrier last and causes the last switching transition in the inverter switching states in a two
level modified reference PWM scheme [13]. Thus the switching periods of the active vectors can be
determined from the (max-phase and min-phase) sampled reference phase voltage amplitudes in a two-level
inverter scheme [14]-[15].
To obtain the maximum possible peak amplitude of the fundamental phase voltage in linear
modulation, the procedure for this is given in [16], an offset time, offset T, is added to the reference phase
voltages where the magnitude of Toffset given Equation (2)-(7).
Vdcn
R Y B
Q5
Q6
Q7
Q8
Vdc2
R5
R6
R7
R8
Vdc2
Q1
Q2
Q3
Q4
Vdc1
R1
R2 R4
Vdc1
Pn3
Pn4
Vdcn Vdcn
P1
P2
P3
P4
P5
P6
P7
P8
Pn1
Pn2
Qn1
Qn2
Qn3
Qn4 Rn2
Rn1
R3
Rn4
Vdc1
Vdc2
Rn3
IJPEDS ISSN: 2088-8694 
Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya)
837
Ta= (2)
Tb= (3)
Tc= (4)
Ta,Tb and Tc are the imaginary switching time periods proportional to the instantaneous values of the
reference phase voltages.
Toffset= Tmin (5)
To= Toffeset (6)
Toffset= Tmin (7)
Shown in Figure 2. Modified Phase disposition-Space vector pulse width modulation pulse
generation, Figure 3. Modified Phase Opposition disposition-Space vector pulse width modulation pulse
generation and Figure 4. Modified Alternative Phase Opposition disposition- Space vector pulse width
modulation pulse generation.
Figure 2. Modified PD-SVPWM pulse generation
Figure 3. Modified POD-SVPWM pulse generation
Figure 4. Modified APOD-SVPWM pulse generation
 ISSN: 2088-8694
IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843
838
4. SIMULATION RESULTS
An five level,seven level nine level and eleven level cascaded multilevel inverter fed with Induction
motor is simulated. The carrier frequency fc is 1 kHz. The modulating pulses are generated by the comparing
the reference wave with the triangular waves. For m level cascaded multilevel inverter m-1 carrier waves
required and the simulation study is carried out using MATLAB/SIMULINK.
4.1. Five-level Modified SVPWM Technique
The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The
total harmonic distortion of the output voltage is about 12.43% (PD-SVPWM), 12.72% (POD-SVPWM)
and 13.29% (APOD-SVPWM) Figure 5, Figure 6, and Figure 7. Shown in the harmonic spectrum for the
Line voltage of the inverter. It is observed that the significant harmonics are located around the
carrier frequency fc for the line voltage waveform in PD-SVPWM and POD-SVPWM. It is observed that
the total harmonic distortion is less in PD-SVPWM technique with comparison to other modified space
vector PWM and SPWM techniques. Figure 8 indicates output stator current of the load, we can observe the
system is unstable from 0 to 0.1 sec. Due to transient behavior of the system at the starting from 0.1 sec.
System has attained steady state conditions.The speed and torque characteristics of induction motor fed to
five-level inverter has shown in Figure 9 from the Figure it can be seen that the steady state operation of
system has achieved at 0.15 sec.
Figure 5. THD for five level modified PD-SVPWM Figure 6. THD for five level modified POD-
SVPWM
Figure 7. THD for five level modified APOD-
SVPWM
Figure 8. Five level output stator current of the
inverter
IJPEDS ISSN: 2088-8694 
Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya)
839
Figure 9. Five level output torque and speed of the inverter
4.2. Seven-level Modified SVPWM Technique
The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The
total harmonic distortion of the output voltage is about 9.08% (PD-SVPWM), 9.23% (POD-SVPWM)
and 9.89% (APOD-SVPWM). Figure 10, Figure 11, and Figure 12. Shown in the harmonic spectrum for the
Line voltage of inverter.It is observed that the most significant harmonics are centered as sidebands
around the carrier frequency fc and therefore no harmonics occur at fc for APODSVPWM technique.
It is observed that the total harmonic distortion is less in PD-SVPWM technique with comparison to other
modified space vector PWM and SPWM techniques.
Figure 13 indicates output stator current of the load, we can observe the system is unstable from 0 to
0.2 sec.Due to transient behavior of the system at the starting from 0.2 sec. System has attained steady state
conditions.The speed and torque characteristics of induction motor fed to seven-level inverter has shown in
Figure 14 from the Figure it can be seen that the steady state operation of system has achieved at 0.25 sec.
Figure 10. THD for seven level modified PD-SVPWM Figure 11. THD for seven level modified POD-
SVPWM
Figure 12. THD for seven level modified POD-
SVPWM
Figure 13. Seven level output stator current of the
inverter
 ISSN: 2088-8694
IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843
840
Figure 14. Seven level output torque and speed of the inverter
4.3. Nine-level Modified SVPWM Technique
The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The
total harmonic distortion of the output voltage is about 7.67% (PD-SVPWM),8.00% (POD-SVPWM) and
8.62% (APOD-SVPWM) when using Modified SVPWM technique on nine-level cascaded multi-level
inverter. Figure 15, Figure 16, and Figure 17. Shown in the harmonic spectrum for the Line voltage of
inverter. It is observed that the total harmonic distortion is less in PD-SVPWM technique with comparison to
other modified SVPWM and SPWM techniques.
Figure 18 indicates output stator current of the load, we can observe the system is unstable from 0 to
0.4 sec.Due to transient behavior of the system at the starting from 0.4 sec. System has attained steady state
conditions.The speed and torque characteristics of induction motor fed to nine-level inverter has shown in
Figure 19 from the Figure it can be seen that the steady state operation of system has achieved at 0.35 sec.
Figure 15. THD for nine level modified PD-
SVPWM
Figure 16. THD for nine level modified POD-
SVPWM
Figure 17. THD for nine level modified APOD-
SVPWM
Figure 18. Nine level output stator current of the
inverter
IJPEDS ISSN: 2088-8694 
Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya)
841
Figure 19. Nine level output torque and speed of the inverter
4.4. Eleven-level Modified SVPWM Technique
The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The
total harmonic distortion of the output voltage is about 5.42% (PD-SVPWM), 7.19% (POD-SVPWM) and
7.80% (APOD-SVPWM) when using Modified SVPWM technique on eleven-level cascaded multi-level
inverter. Figure 20, Figure 21 and Figure 22. Shown in the harmonic spectrum for the Line voltage of
inverter.It is observed that the total harmonic distortion is less in PD-SVPWM technique with comparison to
other modified space vector PWM techniques and SPWM techniques.
Figure 23 indicates output stator current of the load, we can observe the system is unstable from 0 to
0.35 sec.Due to transient behavior of the system at the starting from 0.35 sec.System has attained steady state
conditions.The speed and torque characteristics of induction motor fed to eleven-level inverter has shown in
Figure 24 from the Figure it can be seen that the steady state operation of system has achieved at 0.35 sec.
Figure 20. THD for Eleven level modified PD-
SVPWM
Figure 21. THD for Eleven level modified POD-
SVPWM
Figure 22. THD for Eleven level modified APOD-
SVPWM
Figure 23. Eleven output stator current of the inverter
 ISSN: 2088-8694
IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843
842
Figure 24. Eleven output torque and speed of the inverter
This proposed modified SVPWM signal generation does not involve region identification, sector
identification or look up tables for switching vector determination required in the conventional multilevel
SVPWM technique. This scheme is computationally efficient when compared to conventional multilevel
SVPWM scheme.we can observed that all level(five-level,seven-level,nine-level and eleven-level) of the
cascaded multi level inverter the total harmonic distortion is less in PD-SVPWM technique with comparison
to other conventional space vector PWM techniques and all other SPWM techniques.The comparisons of
total harmonic distortion of the output voltage using Modified SVPWM (PD-SVPWM, POD-SVPWM
and APOD-SVPWM) technique on five-level, seven-level, nine-level and eleven-level cascaded multi-level
inverter shown in Table 1.
Table 1. The Comparisons of THD for Five, Seven, Nine and Eleven Cascaded Inverter.
Outputvoltagelevel Modifiedsvpwmtechnique %THD(V)
Five-level PD
POD
APOD
12.43
12.72
13.29
Seven-level PD
POD
APOD
9.08
9.23
9.89
Nine-level
Eleven-level
PD
POD
APOD
PD
POD
APOD
7.67
8.00
8.62
5.42
7.19
7.80
5. CONCLUSION
The reference signals generated by using modified svpwm techniques.this method does not involes
region iditifications,sector iditifications for switching vector determention requied in conventional SVPWM
technique.In this paper the comparison of modified SVPWM most proffered control strategies applied to
three phase Cascaded inverter are presented. The waveforms clearly depicting that almost all the control
strategies are functioning well in controlling the line voltage, phase voltage, stator current, speed and torque.
The THD of the pd-svpwm,pod-svpwm,apod-svpwm strategies when compared all levels(five,seven,nine and
eleven),it is obvious that pd-svpwm is the most efficient control strategy for all levels(five,seven,nine and
eleven).It is obvious that pd-svpwm(eleven-level) is the most efficient control strategy with low THD of
about 5.42% among those control strategies. The output line voltage quantity is better when using
PD-SVPWM.
ACKNOWLEDGMENT
We thank the University Grants Commission (UGC), Govt. of India, New Delhi for providing Major
Research Project to carry out the Research work on Multi-Level Inverters.
IJPEDS ISSN: 2088-8694 
Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya)
843
APPENDIX
Table 2. System parameters of the induction motor
Parameters Specifications
Input voltage 400VRMS(PhasePhase)
Inverter voltage 100(Volts)
Rotor speed
Fundamentalfrequency
Switching frequency
Modulation index
1440(RPM)
50(Hz)
1K(Hz)
0.866
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[2] G.Sridhar,P.SatishKumar, M.Sushama,” Phase Disposition PWM Technique for Eleven Level Cascaded Multilevel
Inverter with Reduced Number of Carriers”, TELKOMNIKA Indonesian Journal of Electrical Engineering Vol. 15,
No. 1, July 2015, pp.49~56.
[3] Pradeep M.Bhagwat, V.R.Stefanovic,” Generalized Structure of a Multilevel PWM Inverter”, IEEE Transactions on
industry Applications, Vol.1A-19,No.6,November/December 1983.
[4] Gautam Sinha, Thomas A. Lipo, “A Four Level Rectifier-Inverter System for Drive Applications”, IEEE
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Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded Multi-level Inverter fed Induction Motor Drive

  • 1. International Journal of Power Electronics and Drive System (IJPEDS) Vol. 8, No. 2, June 2017, pp. 835~843 ISSN: 2088-8694, DOI: 10.11591/ijpeds.v8i2.pp835-843  835 Journal homepage: http://iaesjournal.com/online/index.php/IJPEDS Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded Multi-level Inverter fed Induction Motor Drive Ravikumar Bhukya1 , P. Satish kumar2 Department of Electrical Engineering, University College of Engineering Osmania University, India Article Info ABSTRACT Article history: Received Jan 2, 2017 Revised Mar 2, 2017 Accepted Mar 16, 2017 This paper presents new modified space vector pulse width modulation techniques (Phase disposition-Space vector pulse width modulation, Alternative Phase Opposition disposition- Space vector pulse width modulation and Phase Opposition disposition-Space vector pulse width modulation) are analyzed for three-phase cascaded multi-level inverter fed induction motor from the point of view of the Phase voltages, line voltage, stator current,speed,torque and Total harmonic distortion.in the proposed modified technique the reference signals are generated by adding offset voltage to the reference phase voltages.This modified SVPWM technique does not involve region indentification,sector identification for switching vector determination as are required in the conventional multi level SVPWM technique,it is also reduces the computation time compared to the conventional space vector PWM technique.The necessary calculations for generation of new modified SVPWM for the modulation strategies have presented in detail. It is observed that the modified SVPWM modulation ensures excellent, close to optimized pulse distribution results and THD is compared to for five-level, seven-level, nine-level and eleven-level Cascaded H-Bride Multi-level Inverter fed to Induction motor. Theoretical investigations were confirmed by the digital simulations using MATLAB/SIMULINK software. Keyword: APODSVPWM Cascaded inverter Induction motor Modified SVPWM Offeset voltage PDSVPWM PODSVPWM THD Copyright © 2017 Institute of Advanced Engineering and Science. All rights reserved. Corresponding Author: Ravikumar Bhukya, Department of Electrical Engineering, University College of Engineering Osmania University, Hyderabad, Telangana, India. Email: Rkpurnanaik2014@gmail.com, satish_8020@yahoo.co.in 1. INTRODUCTION In the late 1990s, multilevel inverters are the most attractive solution for high power and medium voltage drive when high power IGBTs is commercially available in the market. Multilevel inverters are implemented to overcome the disadvantages of traditional two-level inverter [1]. More on the various multilevel topologies and their applications can be found in [2]. Since the concept of the multilevel PWM inverter was introduced [3]. Various modulation strategies have been developed and studied in great detail [4]-[6]. Several multicarrier techniques have developed to reduce the distortion in multilevel inverter, based on the classical SPWM with triangular carriers, some methods use carrier disposition and others use phase shifting of multiple carrier signals [7]-[9]. Multilevel inverter structures have been developed to overcome shortcomings in solid-state switching device ratings so they can be applied to higher voltage systems. The multilevel voltage source inverters [10].
  • 2.  ISSN: 2088-8694 IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843 836 In this paper the Modified SVPWM (Phase disposition-Space vector pulse width modulation, Alternative Phase Opposition disposition- Space vector pulse width modulation and Phase Opposition disposition-Space vector pulse width modulation) strategy of five-level, seven-level, nine-level and eleven- level inverters are compared for THD. The paper mainly deals with the computation and the comparison of the motor harmonic losses of different PWM solutions and with the selection of the solutions providing the best results. Finally, the drive harmonic losses will be compared for each technique. 2. THREE-PHASE N LEVEL CASCADED MULTI-LEVEL INVERTER The three phase N-level cascaded multilevel inverter (CMI) or Series H-bridge Multi-Level Inverter topology shown in Figure 1. Each cell contains four active switching device and a minimum of one dc capacitor to form a single-phase H-bridge inverter.The different cells are connected as depicted in Figure 1 to construct a three-phase configuration. With this configuration, each cell in a leg will provide three-level output phase voltages (VaN, VbN and VcN) and five level line voltages (Vab, Vbc and Vca). The number of incremental voltage step is increased by connecting additional cell in series, where the number of phase voltage is formulated as (nth -cell*2)+1, and the number of levels in line voltage are 2M-1, where M is the number of level in phase voltage [11]. Figure 1. N-level cascaded inverter 3. PROPOSED MODIFIED SVPWM TECHNIQUE In the SPWM scheme for two-level inverters, each reference phase voltage is compared with the triangular carrier and the individual pole voltages are generated, independent of each other [12]. To obtain the maximum possible peak amplitude of the fundamental phase voltage, in linear modulation, a common mode voltage, Toffset, is added to the reference phase voltages. where the magnitude of Toffset is given by Toffset= (1) In Equation, Tmax is the maximum magnitude of the three sampled reference phase voltages, while Tmin is the minimum magnitude of the three sampled reference phase voltages, in a sampling interval. The addition of the common mode voltage, Toffset, results in the active inverter switching vectors being centered in a sampling interval, making the SPWM technique equivalent to the modified reference PWM technique. Above Equation is based on the fact that, in a sampling interval, the reference phase which has lowest magnitude (termed the min-phase) crosses the triangular carrier first, and causes the first transition in the inverter switching state. While the reference phase, which has the maximum magnitude (termed the max- phase), crosses the carrier last and causes the last switching transition in the inverter switching states in a two level modified reference PWM scheme [13]. Thus the switching periods of the active vectors can be determined from the (max-phase and min-phase) sampled reference phase voltage amplitudes in a two-level inverter scheme [14]-[15]. To obtain the maximum possible peak amplitude of the fundamental phase voltage in linear modulation, the procedure for this is given in [16], an offset time, offset T, is added to the reference phase voltages where the magnitude of Toffset given Equation (2)-(7). Vdcn R Y B Q5 Q6 Q7 Q8 Vdc2 R5 R6 R7 R8 Vdc2 Q1 Q2 Q3 Q4 Vdc1 R1 R2 R4 Vdc1 Pn3 Pn4 Vdcn Vdcn P1 P2 P3 P4 P5 P6 P7 P8 Pn1 Pn2 Qn1 Qn2 Qn3 Qn4 Rn2 Rn1 R3 Rn4 Vdc1 Vdc2 Rn3
  • 3. IJPEDS ISSN: 2088-8694  Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya) 837 Ta= (2) Tb= (3) Tc= (4) Ta,Tb and Tc are the imaginary switching time periods proportional to the instantaneous values of the reference phase voltages. Toffset= Tmin (5) To= Toffeset (6) Toffset= Tmin (7) Shown in Figure 2. Modified Phase disposition-Space vector pulse width modulation pulse generation, Figure 3. Modified Phase Opposition disposition-Space vector pulse width modulation pulse generation and Figure 4. Modified Alternative Phase Opposition disposition- Space vector pulse width modulation pulse generation. Figure 2. Modified PD-SVPWM pulse generation Figure 3. Modified POD-SVPWM pulse generation Figure 4. Modified APOD-SVPWM pulse generation
  • 4.  ISSN: 2088-8694 IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843 838 4. SIMULATION RESULTS An five level,seven level nine level and eleven level cascaded multilevel inverter fed with Induction motor is simulated. The carrier frequency fc is 1 kHz. The modulating pulses are generated by the comparing the reference wave with the triangular waves. For m level cascaded multilevel inverter m-1 carrier waves required and the simulation study is carried out using MATLAB/SIMULINK. 4.1. Five-level Modified SVPWM Technique The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The total harmonic distortion of the output voltage is about 12.43% (PD-SVPWM), 12.72% (POD-SVPWM) and 13.29% (APOD-SVPWM) Figure 5, Figure 6, and Figure 7. Shown in the harmonic spectrum for the Line voltage of the inverter. It is observed that the significant harmonics are located around the carrier frequency fc for the line voltage waveform in PD-SVPWM and POD-SVPWM. It is observed that the total harmonic distortion is less in PD-SVPWM technique with comparison to other modified space vector PWM and SPWM techniques. Figure 8 indicates output stator current of the load, we can observe the system is unstable from 0 to 0.1 sec. Due to transient behavior of the system at the starting from 0.1 sec. System has attained steady state conditions.The speed and torque characteristics of induction motor fed to five-level inverter has shown in Figure 9 from the Figure it can be seen that the steady state operation of system has achieved at 0.15 sec. Figure 5. THD for five level modified PD-SVPWM Figure 6. THD for five level modified POD- SVPWM Figure 7. THD for five level modified APOD- SVPWM Figure 8. Five level output stator current of the inverter
  • 5. IJPEDS ISSN: 2088-8694  Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya) 839 Figure 9. Five level output torque and speed of the inverter 4.2. Seven-level Modified SVPWM Technique The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The total harmonic distortion of the output voltage is about 9.08% (PD-SVPWM), 9.23% (POD-SVPWM) and 9.89% (APOD-SVPWM). Figure 10, Figure 11, and Figure 12. Shown in the harmonic spectrum for the Line voltage of inverter.It is observed that the most significant harmonics are centered as sidebands around the carrier frequency fc and therefore no harmonics occur at fc for APODSVPWM technique. It is observed that the total harmonic distortion is less in PD-SVPWM technique with comparison to other modified space vector PWM and SPWM techniques. Figure 13 indicates output stator current of the load, we can observe the system is unstable from 0 to 0.2 sec.Due to transient behavior of the system at the starting from 0.2 sec. System has attained steady state conditions.The speed and torque characteristics of induction motor fed to seven-level inverter has shown in Figure 14 from the Figure it can be seen that the steady state operation of system has achieved at 0.25 sec. Figure 10. THD for seven level modified PD-SVPWM Figure 11. THD for seven level modified POD- SVPWM Figure 12. THD for seven level modified POD- SVPWM Figure 13. Seven level output stator current of the inverter
  • 6.  ISSN: 2088-8694 IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843 840 Figure 14. Seven level output torque and speed of the inverter 4.3. Nine-level Modified SVPWM Technique The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The total harmonic distortion of the output voltage is about 7.67% (PD-SVPWM),8.00% (POD-SVPWM) and 8.62% (APOD-SVPWM) when using Modified SVPWM technique on nine-level cascaded multi-level inverter. Figure 15, Figure 16, and Figure 17. Shown in the harmonic spectrum for the Line voltage of inverter. It is observed that the total harmonic distortion is less in PD-SVPWM technique with comparison to other modified SVPWM and SPWM techniques. Figure 18 indicates output stator current of the load, we can observe the system is unstable from 0 to 0.4 sec.Due to transient behavior of the system at the starting from 0.4 sec. System has attained steady state conditions.The speed and torque characteristics of induction motor fed to nine-level inverter has shown in Figure 19 from the Figure it can be seen that the steady state operation of system has achieved at 0.35 sec. Figure 15. THD for nine level modified PD- SVPWM Figure 16. THD for nine level modified POD- SVPWM Figure 17. THD for nine level modified APOD- SVPWM Figure 18. Nine level output stator current of the inverter
  • 7. IJPEDS ISSN: 2088-8694  Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya) 841 Figure 19. Nine level output torque and speed of the inverter 4.4. Eleven-level Modified SVPWM Technique The output voltage of the inverter for line to line is about 410V when using Modified SVPWM.The total harmonic distortion of the output voltage is about 5.42% (PD-SVPWM), 7.19% (POD-SVPWM) and 7.80% (APOD-SVPWM) when using Modified SVPWM technique on eleven-level cascaded multi-level inverter. Figure 20, Figure 21 and Figure 22. Shown in the harmonic spectrum for the Line voltage of inverter.It is observed that the total harmonic distortion is less in PD-SVPWM technique with comparison to other modified space vector PWM techniques and SPWM techniques. Figure 23 indicates output stator current of the load, we can observe the system is unstable from 0 to 0.35 sec.Due to transient behavior of the system at the starting from 0.35 sec.System has attained steady state conditions.The speed and torque characteristics of induction motor fed to eleven-level inverter has shown in Figure 24 from the Figure it can be seen that the steady state operation of system has achieved at 0.35 sec. Figure 20. THD for Eleven level modified PD- SVPWM Figure 21. THD for Eleven level modified POD- SVPWM Figure 22. THD for Eleven level modified APOD- SVPWM Figure 23. Eleven output stator current of the inverter
  • 8.  ISSN: 2088-8694 IJPEDS Vol. 8, No. 2, June 2017 : 835 – 843 842 Figure 24. Eleven output torque and speed of the inverter This proposed modified SVPWM signal generation does not involve region identification, sector identification or look up tables for switching vector determination required in the conventional multilevel SVPWM technique. This scheme is computationally efficient when compared to conventional multilevel SVPWM scheme.we can observed that all level(five-level,seven-level,nine-level and eleven-level) of the cascaded multi level inverter the total harmonic distortion is less in PD-SVPWM technique with comparison to other conventional space vector PWM techniques and all other SPWM techniques.The comparisons of total harmonic distortion of the output voltage using Modified SVPWM (PD-SVPWM, POD-SVPWM and APOD-SVPWM) technique on five-level, seven-level, nine-level and eleven-level cascaded multi-level inverter shown in Table 1. Table 1. The Comparisons of THD for Five, Seven, Nine and Eleven Cascaded Inverter. Outputvoltagelevel Modifiedsvpwmtechnique %THD(V) Five-level PD POD APOD 12.43 12.72 13.29 Seven-level PD POD APOD 9.08 9.23 9.89 Nine-level Eleven-level PD POD APOD PD POD APOD 7.67 8.00 8.62 5.42 7.19 7.80 5. CONCLUSION The reference signals generated by using modified svpwm techniques.this method does not involes region iditifications,sector iditifications for switching vector determention requied in conventional SVPWM technique.In this paper the comparison of modified SVPWM most proffered control strategies applied to three phase Cascaded inverter are presented. The waveforms clearly depicting that almost all the control strategies are functioning well in controlling the line voltage, phase voltage, stator current, speed and torque. The THD of the pd-svpwm,pod-svpwm,apod-svpwm strategies when compared all levels(five,seven,nine and eleven),it is obvious that pd-svpwm is the most efficient control strategy for all levels(five,seven,nine and eleven).It is obvious that pd-svpwm(eleven-level) is the most efficient control strategy with low THD of about 5.42% among those control strategies. The output line voltage quantity is better when using PD-SVPWM. ACKNOWLEDGMENT We thank the University Grants Commission (UGC), Govt. of India, New Delhi for providing Major Research Project to carry out the Research work on Multi-Level Inverters.
  • 9. IJPEDS ISSN: 2088-8694  Performance Analysis of Modified SVPWM Strategies for Three Phase Cascaded …. (Ravikumar Bhukya) 843 APPENDIX Table 2. System parameters of the induction motor Parameters Specifications Input voltage 400VRMS(PhasePhase) Inverter voltage 100(Volts) Rotor speed Fundamentalfrequency Switching frequency Modulation index 1440(RPM) 50(Hz) 1K(Hz) 0.866 REFERENCES [1] M. Satyanarayana and P.Satish kumar,”Analysis and Design of Solar Photo Voltaic Grid Connected Inverter”, Indonesian Journal of Electrical Engineering and Informatics (IJEEI) Vol. 3, No. 4, December 2015, pp. 199~208. [2] G.Sridhar,P.SatishKumar, M.Sushama,” Phase Disposition PWM Technique for Eleven Level Cascaded Multilevel Inverter with Reduced Number of Carriers”, TELKOMNIKA Indonesian Journal of Electrical Engineering Vol. 15, No. 1, July 2015, pp.49~56. [3] Pradeep M.Bhagwat, V.R.Stefanovic,” Generalized Structure of a Multilevel PWM Inverter”, IEEE Transactions on industry Applications, Vol.1A-19,No.6,November/December 1983. [4] Gautam Sinha, Thomas A. Lipo, “A Four Level Rectifier-Inverter System for Drive Applications”, IEEE Transactions on Industry Applications, Vol. 30, No. 4, July 1994, pp. 938-944. [5] G.Carrara, S. Gardella, M. Marchesoni, R. Salutari, G. Sciutto, “A new Multilevel PWM Method: A Theoretical Analysis”, Proc. PESC 1990, pp. 363-371. [6] José Rodriguez, Jih-Sheng Lai and Fang Zheng Peng, “Multilevel Inverters: A Survey of Topologies, Controls, and Applications”, IEEE Transactions on Industrial Electronics, Vol. 49, No. 4, August 2002, Pp 724-738. [7] Levi. E, Bojoi. R., Profumo. F., Toliyat, et al, “Multiphase induction motor drives - a technology status review”, IET Electr. Power Appl., 2007, 1, (4), pp. 489–516. [8] Ryu, H.M., Kim, J.H. and Sul, S.K, “Analysis of multi-phase space vector pulse width modulation based on multiple d–q spaces concept’, IEEE Trans. Power Electron. 2005, 20, (6), pp. 1364–1371. [9] Holmes, D., Lipo, T.A.: “Pulse width modulation for power converters – principles and practice”. IEEE Press Series on Power Engineering (Wiley, Piscataway, NJ, USA, 2003). [10] Wang, FEI: “Sine-triangle versus space vector modulation for threelevel PWM voltage source inverters”. Proc. IEEE-IAS Annual Meeting, Rome, 2000, pp. 2482–2488. [11] F. Z. Peng and J. S. Lai, “Multilevel cascade voltage-source inverter with separate DC sources,” U.S. Patent 5 642 275, June 24, 1997. [12] K. Thorborg and A. Nystorm, “Staircase PWM: an uncomplicated and efficient modulation technique for ac motor drives,” IEEE Transactions on Power Electronics, Vol. PE3, No.4, 1988, pp. 391-398. [13] J. Rodriguez, J.-S. Lai, and F. Z. Peng, “Multi-level inverter: a survey of topologies, controls, and applications,” IEEE Trans.Ind.Electron, vol. 49, no. 4, pp. 724–738, Aug. 2002. [14] Gui- jia su, senior member ,IEEE “Multilevel DC-Link Inverter ”, IEEE Trans. on Indapplications, vol.41, issue 4, pp.724-738,may/june 2005. [15] W. Yao, H. Hu, and Z. Lu, “Comparisons of space-vector modulation and carrier-based modulation of multilevel inverter,” IEEE Trans. Power Electron, vol. 23, no. 1, pp. 45– 51, Jan. 2008. [16] M. H. Ohsato, G. Kimura, and M. Shioya, “Five-stepped PWM inverter used in photo-voltaic systems,” IEEE Transactions on Industrial Electronics, Vol. 38, October, 1991, pp. 393-397.